1724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0-only 2724ba675SRob Herring/* 3724ba675SRob Herring * Copyright (C) 2014 STMicroelectronics Limited. 4724ba675SRob Herring * Author: Peter Griffin <peter.griffin@linaro.org> 5724ba675SRob Herring */ 6724ba675SRob Herring#include "stih410-clock.dtsi" 7724ba675SRob Herring#include "stih407-family.dtsi" 8724ba675SRob Herring#include "stih410-pinctrl.dtsi" 9724ba675SRob Herring#include <dt-bindings/gpio/gpio.h> 10724ba675SRob Herring/ { 11724ba675SRob Herring aliases { 12724ba675SRob Herring bdisp0 = &bdisp0; 13724ba675SRob Herring }; 14724ba675SRob Herring 15724ba675SRob Herring usb2_picophy1: phy2 { 16724ba675SRob Herring compatible = "st,stih407-usb2-phy"; 17724ba675SRob Herring #phy-cells = <0>; 18724ba675SRob Herring st,syscfg = <&syscfg_core 0xf8 0xf4>; 19724ba675SRob Herring resets = <&softreset STIH407_PICOPHY_SOFTRESET>, 20724ba675SRob Herring <&picophyreset STIH407_PICOPHY0_RESET>; 21724ba675SRob Herring reset-names = "global", "port"; 22724ba675SRob Herring 23724ba675SRob Herring status = "disabled"; 24724ba675SRob Herring }; 25724ba675SRob Herring 26724ba675SRob Herring usb2_picophy2: phy3 { 27724ba675SRob Herring compatible = "st,stih407-usb2-phy"; 28724ba675SRob Herring #phy-cells = <0>; 29724ba675SRob Herring st,syscfg = <&syscfg_core 0xfc 0xf4>; 30724ba675SRob Herring resets = <&softreset STIH407_PICOPHY_SOFTRESET>, 31724ba675SRob Herring <&picophyreset STIH407_PICOPHY1_RESET>; 32724ba675SRob Herring reset-names = "global", "port"; 33724ba675SRob Herring 34724ba675SRob Herring status = "disabled"; 35724ba675SRob Herring }; 36724ba675SRob Herring 37724ba675SRob Herring soc { 38724ba675SRob Herring ohci0: usb@9a03c00 { 39724ba675SRob Herring compatible = "st,st-ohci-300x"; 40724ba675SRob Herring reg = <0x9a03c00 0x100>; 41724ba675SRob Herring interrupts = <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>; 42724ba675SRob Herring clocks = <&clk_s_c0_flexgen CLK_TX_ICN_DISP_0>, 43724ba675SRob Herring <&clk_s_c0_flexgen CLK_RX_ICN_DISP_0>; 44724ba675SRob Herring resets = <&powerdown STIH407_USB2_PORT0_POWERDOWN>, 45724ba675SRob Herring <&softreset STIH407_USB2_PORT0_SOFTRESET>; 46724ba675SRob Herring reset-names = "power", "softreset"; 47724ba675SRob Herring phys = <&usb2_picophy1>; 48724ba675SRob Herring phy-names = "usb"; 49724ba675SRob Herring 50724ba675SRob Herring status = "disabled"; 51724ba675SRob Herring }; 52724ba675SRob Herring 53724ba675SRob Herring ehci0: usb@9a03e00 { 54724ba675SRob Herring compatible = "st,st-ehci-300x"; 55724ba675SRob Herring reg = <0x9a03e00 0x100>; 56724ba675SRob Herring interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>; 57724ba675SRob Herring pinctrl-names = "default"; 58724ba675SRob Herring pinctrl-0 = <&pinctrl_usb0>; 59724ba675SRob Herring clocks = <&clk_s_c0_flexgen CLK_TX_ICN_DISP_0>, 60724ba675SRob Herring <&clk_s_c0_flexgen CLK_RX_ICN_DISP_0>; 61724ba675SRob Herring resets = <&powerdown STIH407_USB2_PORT0_POWERDOWN>, 62724ba675SRob Herring <&softreset STIH407_USB2_PORT0_SOFTRESET>; 63724ba675SRob Herring reset-names = "power", "softreset"; 64724ba675SRob Herring phys = <&usb2_picophy1>; 65724ba675SRob Herring phy-names = "usb"; 66724ba675SRob Herring 67724ba675SRob Herring status = "disabled"; 68724ba675SRob Herring }; 69724ba675SRob Herring 70724ba675SRob Herring ohci1: usb@9a83c00 { 71724ba675SRob Herring compatible = "st,st-ohci-300x"; 72724ba675SRob Herring reg = <0x9a83c00 0x100>; 73724ba675SRob Herring interrupts = <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>; 74724ba675SRob Herring clocks = <&clk_s_c0_flexgen CLK_TX_ICN_DISP_0>, 75724ba675SRob Herring <&clk_s_c0_flexgen CLK_RX_ICN_DISP_0>; 76724ba675SRob Herring resets = <&powerdown STIH407_USB2_PORT1_POWERDOWN>, 77724ba675SRob Herring <&softreset STIH407_USB2_PORT1_SOFTRESET>; 78724ba675SRob Herring reset-names = "power", "softreset"; 79724ba675SRob Herring phys = <&usb2_picophy2>; 80724ba675SRob Herring phy-names = "usb"; 81724ba675SRob Herring 82724ba675SRob Herring status = "disabled"; 83724ba675SRob Herring }; 84724ba675SRob Herring 85724ba675SRob Herring ehci1: usb@9a83e00 { 86724ba675SRob Herring compatible = "st,st-ehci-300x"; 87724ba675SRob Herring reg = <0x9a83e00 0x100>; 88724ba675SRob Herring interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; 89724ba675SRob Herring pinctrl-names = "default"; 90724ba675SRob Herring pinctrl-0 = <&pinctrl_usb1>; 91724ba675SRob Herring clocks = <&clk_s_c0_flexgen CLK_TX_ICN_DISP_0>, 92724ba675SRob Herring <&clk_s_c0_flexgen CLK_RX_ICN_DISP_0>; 93724ba675SRob Herring resets = <&powerdown STIH407_USB2_PORT1_POWERDOWN>, 94724ba675SRob Herring <&softreset STIH407_USB2_PORT1_SOFTRESET>; 95724ba675SRob Herring reset-names = "power", "softreset"; 96724ba675SRob Herring phys = <&usb2_picophy2>; 97724ba675SRob Herring phy-names = "usb"; 98724ba675SRob Herring 99724ba675SRob Herring status = "disabled"; 100724ba675SRob Herring }; 101724ba675SRob Herring 102724ba675SRob Herring sti-display-subsystem@0 { 103724ba675SRob Herring compatible = "st,sti-display-subsystem"; 104724ba675SRob Herring #address-cells = <1>; 105724ba675SRob Herring #size-cells = <1>; 106724ba675SRob Herring 107724ba675SRob Herring reg = <0 0>; 108724ba675SRob Herring assigned-clocks = <&clk_s_d2_quadfs 0>, 109724ba675SRob Herring <&clk_s_d2_quadfs 1>, 110724ba675SRob Herring <&clk_s_c0_pll1 0>, 111724ba675SRob Herring <&clk_s_c0_flexgen CLK_COMPO_DVP>, 112724ba675SRob Herring <&clk_s_c0_flexgen CLK_MAIN_DISP>, 113724ba675SRob Herring <&clk_s_d2_flexgen CLK_PIX_MAIN_DISP>, 114724ba675SRob Herring <&clk_s_d2_flexgen CLK_PIX_AUX_DISP>, 115724ba675SRob Herring <&clk_s_d2_flexgen CLK_PIX_GDP1>, 116724ba675SRob Herring <&clk_s_d2_flexgen CLK_PIX_GDP2>, 117724ba675SRob Herring <&clk_s_d2_flexgen CLK_PIX_GDP3>, 118724ba675SRob Herring <&clk_s_d2_flexgen CLK_PIX_GDP4>; 119724ba675SRob Herring 120724ba675SRob Herring assigned-clock-parents = <0>, 121724ba675SRob Herring <0>, 122724ba675SRob Herring <0>, 123724ba675SRob Herring <&clk_s_c0_pll1 0>, 124724ba675SRob Herring <&clk_s_c0_pll1 0>, 125724ba675SRob Herring <&clk_s_d2_quadfs 0>, 126724ba675SRob Herring <&clk_s_d2_quadfs 1>, 127724ba675SRob Herring <&clk_s_d2_quadfs 0>, 128724ba675SRob Herring <&clk_s_d2_quadfs 0>, 129724ba675SRob Herring <&clk_s_d2_quadfs 0>, 130724ba675SRob Herring <&clk_s_d2_quadfs 0>; 131724ba675SRob Herring 132724ba675SRob Herring assigned-clock-rates = <297000000>, 133724ba675SRob Herring <297000000>, 134724ba675SRob Herring <0>, 135724ba675SRob Herring <400000000>, 136724ba675SRob Herring <400000000>; 137724ba675SRob Herring 138724ba675SRob Herring ranges; 139724ba675SRob Herring 140724ba675SRob Herring sti-compositor@9d11000 { 141724ba675SRob Herring compatible = "st,stih407-compositor"; 142724ba675SRob Herring reg = <0x9d11000 0x1000>; 143724ba675SRob Herring 144724ba675SRob Herring clock-names = "compo_main", 145724ba675SRob Herring "compo_aux", 146724ba675SRob Herring "pix_main", 147724ba675SRob Herring "pix_aux", 148724ba675SRob Herring "pix_gdp1", 149724ba675SRob Herring "pix_gdp2", 150724ba675SRob Herring "pix_gdp3", 151724ba675SRob Herring "pix_gdp4", 152724ba675SRob Herring "main_parent", 153724ba675SRob Herring "aux_parent"; 154724ba675SRob Herring 155724ba675SRob Herring clocks = <&clk_s_c0_flexgen CLK_COMPO_DVP>, 156724ba675SRob Herring <&clk_s_c0_flexgen CLK_COMPO_DVP>, 157724ba675SRob Herring <&clk_s_d2_flexgen CLK_PIX_MAIN_DISP>, 158724ba675SRob Herring <&clk_s_d2_flexgen CLK_PIX_AUX_DISP>, 159724ba675SRob Herring <&clk_s_d2_flexgen CLK_PIX_GDP1>, 160724ba675SRob Herring <&clk_s_d2_flexgen CLK_PIX_GDP2>, 161724ba675SRob Herring <&clk_s_d2_flexgen CLK_PIX_GDP3>, 162724ba675SRob Herring <&clk_s_d2_flexgen CLK_PIX_GDP4>, 163724ba675SRob Herring <&clk_s_d2_quadfs 0>, 164724ba675SRob Herring <&clk_s_d2_quadfs 1>; 165724ba675SRob Herring 166724ba675SRob Herring reset-names = "compo-main", "compo-aux"; 167724ba675SRob Herring resets = <&softreset STIH407_COMPO_SOFTRESET>, 168724ba675SRob Herring <&softreset STIH407_COMPO_SOFTRESET>; 169724ba675SRob Herring st,vtg = <&vtg_main>, <&vtg_aux>; 170724ba675SRob Herring }; 171724ba675SRob Herring 172724ba675SRob Herring sti-tvout@8d08000 { 173724ba675SRob Herring compatible = "st,stih407-tvout"; 174724ba675SRob Herring reg = <0x8d08000 0x1000>; 175724ba675SRob Herring reg-names = "tvout-reg"; 176724ba675SRob Herring reset-names = "tvout"; 177724ba675SRob Herring resets = <&softreset STIH407_HDTVOUT_SOFTRESET>; 178724ba675SRob Herring #address-cells = <1>; 179724ba675SRob Herring #size-cells = <1>; 180724ba675SRob Herring assigned-clocks = <&clk_s_d2_flexgen CLK_PIX_HDMI>, 181724ba675SRob Herring <&clk_s_d2_flexgen CLK_TMDS_HDMI>, 182724ba675SRob Herring <&clk_s_d2_flexgen CLK_REF_HDMIPHY>, 183724ba675SRob Herring <&clk_s_d0_flexgen CLK_PCM_0>, 184724ba675SRob Herring <&clk_s_d2_flexgen CLK_PIX_HDDAC>, 185724ba675SRob Herring <&clk_s_d2_flexgen CLK_HDDAC>; 186724ba675SRob Herring 187724ba675SRob Herring assigned-clock-parents = <&clk_s_d2_quadfs 0>, 188724ba675SRob Herring <&clk_tmdsout_hdmi>, 189724ba675SRob Herring <&clk_s_d2_quadfs 0>, 190724ba675SRob Herring <&clk_s_d0_quadfs 0>, 191724ba675SRob Herring <&clk_s_d2_quadfs 0>, 192724ba675SRob Herring <&clk_s_d2_quadfs 0>; 193724ba675SRob Herring }; 194724ba675SRob Herring 195724ba675SRob Herring sti_hdmi: sti-hdmi@8d04000 { 196724ba675SRob Herring compatible = "st,stih407-hdmi"; 197724ba675SRob Herring reg = <0x8d04000 0x1000>; 198724ba675SRob Herring reg-names = "hdmi-reg"; 199724ba675SRob Herring #sound-dai-cells = <0>; 200724ba675SRob Herring interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>; 201724ba675SRob Herring interrupt-names = "irq"; 202724ba675SRob Herring clock-names = "pix", 203724ba675SRob Herring "tmds", 204724ba675SRob Herring "phy", 205724ba675SRob Herring "audio", 206724ba675SRob Herring "main_parent", 207724ba675SRob Herring "aux_parent"; 208724ba675SRob Herring 209724ba675SRob Herring clocks = <&clk_s_d2_flexgen CLK_PIX_HDMI>, 210724ba675SRob Herring <&clk_s_d2_flexgen CLK_TMDS_HDMI>, 211724ba675SRob Herring <&clk_s_d2_flexgen CLK_REF_HDMIPHY>, 212724ba675SRob Herring <&clk_s_d0_flexgen CLK_PCM_0>, 213724ba675SRob Herring <&clk_s_d2_quadfs 0>, 214724ba675SRob Herring <&clk_s_d2_quadfs 1>; 215724ba675SRob Herring 216724ba675SRob Herring hdmi,hpd-gpio = <&pio5 3 GPIO_ACTIVE_LOW>; 217724ba675SRob Herring reset-names = "hdmi"; 218724ba675SRob Herring resets = <&softreset STIH407_HDMI_TX_PHY_SOFTRESET>; 219724ba675SRob Herring ddc = <&hdmiddc>; 220724ba675SRob Herring }; 221724ba675SRob Herring 222724ba675SRob Herring sti-hda@8d02000 { 223724ba675SRob Herring compatible = "st,stih407-hda"; 224724ba675SRob Herring status = "disabled"; 225724ba675SRob Herring reg = <0x8d02000 0x400>, <0x92b0120 0x4>; 226724ba675SRob Herring reg-names = "hda-reg", "video-dacs-ctrl"; 227724ba675SRob Herring clock-names = "pix", 228724ba675SRob Herring "hddac", 229724ba675SRob Herring "main_parent", 230724ba675SRob Herring "aux_parent"; 231724ba675SRob Herring clocks = <&clk_s_d2_flexgen CLK_PIX_HDDAC>, 232724ba675SRob Herring <&clk_s_d2_flexgen CLK_HDDAC>, 233724ba675SRob Herring <&clk_s_d2_quadfs 0>, 234724ba675SRob Herring <&clk_s_d2_quadfs 1>; 235724ba675SRob Herring }; 236724ba675SRob Herring 237724ba675SRob Herring sti-hqvdp@9c00000 { 238724ba675SRob Herring compatible = "st,stih407-hqvdp"; 239724ba675SRob Herring reg = <0x9C00000 0x100000>; 240724ba675SRob Herring clock-names = "hqvdp", "pix_main"; 241724ba675SRob Herring clocks = <&clk_s_c0_flexgen CLK_MAIN_DISP>, 242724ba675SRob Herring <&clk_s_d2_flexgen CLK_PIX_MAIN_DISP>; 243724ba675SRob Herring reset-names = "hqvdp"; 244724ba675SRob Herring resets = <&softreset STIH407_HDQVDP_SOFTRESET>; 245724ba675SRob Herring st,vtg = <&vtg_main>; 246724ba675SRob Herring }; 247724ba675SRob Herring }; 248724ba675SRob Herring 249724ba675SRob Herring bdisp0:bdisp@9f10000 { 250724ba675SRob Herring compatible = "st,stih407-bdisp"; 251724ba675SRob Herring reg = <0x9f10000 0x1000>; 252724ba675SRob Herring interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; 253724ba675SRob Herring clock-names = "bdisp"; 254724ba675SRob Herring clocks = <&clk_s_c0_flexgen CLK_IC_BDISP_0>; 255724ba675SRob Herring }; 256724ba675SRob Herring 257724ba675SRob Herring hva@8c85000 { 258724ba675SRob Herring compatible = "st,st-hva"; 259724ba675SRob Herring reg = <0x8c85000 0x400>, <0x6000000 0x40000>; 260724ba675SRob Herring reg-names = "hva_registers", "hva_esram"; 261724ba675SRob Herring interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, 262724ba675SRob Herring <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>; 263724ba675SRob Herring clock-names = "clk_hva"; 264724ba675SRob Herring clocks = <&clk_s_c0_flexgen CLK_HVA>; 265724ba675SRob Herring }; 266724ba675SRob Herring 267724ba675SRob Herring thermal@91a0000 { 268724ba675SRob Herring compatible = "st,stih407-thermal"; 269724ba675SRob Herring reg = <0x91a0000 0x28>; 270724ba675SRob Herring clock-names = "thermal"; 271724ba675SRob Herring clocks = <&clk_sysin>; 272724ba675SRob Herring interrupts = <GIC_SPI 205 IRQ_TYPE_EDGE_RISING>; 273*e00d100aSRaphael Gallais-Pou #thermal-sensor-cells = <0>; 274724ba675SRob Herring }; 275724ba675SRob Herring 276724ba675SRob Herring cec@94a087c { 277724ba675SRob Herring compatible = "st,stih-cec"; 278724ba675SRob Herring reg = <0x94a087c 0x64>; 279724ba675SRob Herring clocks = <&clk_sysin>; 280724ba675SRob Herring clock-names = "cec-clk"; 281724ba675SRob Herring interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>; 282724ba675SRob Herring interrupt-names = "cec-irq"; 283724ba675SRob Herring pinctrl-names = "default"; 284724ba675SRob Herring pinctrl-0 = <&pinctrl_cec0_default>; 285724ba675SRob Herring resets = <&softreset STIH407_LPM_SOFTRESET>; 286724ba675SRob Herring hdmi-phandle = <&sti_hdmi>; 287724ba675SRob Herring }; 288724ba675SRob Herring }; 289724ba675SRob Herring}; 290