xref: /linux/arch/arm/boot/dts/st/ste-hrefprev60.dtsi (revision 06d07429858317ded2db7986113a9e0129cd599b)
1*724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0-or-later
2*724ba675SRob Herring/*
3*724ba675SRob Herring * Copyright 2012 ST-Ericsson AB
4*724ba675SRob Herring *
5*724ba675SRob Herring * Device Tree for the HREF+ prior to the v60 variant.
6*724ba675SRob Herring */
7*724ba675SRob Herring
8*724ba675SRob Herring#include "ste-href-ab8500.dtsi"
9*724ba675SRob Herring#include "ste-href.dtsi"
10*724ba675SRob Herring
11*724ba675SRob Herring/ {
12*724ba675SRob Herring	gpio_keys {
13*724ba675SRob Herring		button@1 {
14*724ba675SRob Herring			gpios = <&tc3589x_gpio 7 GPIO_ACTIVE_HIGH>;
15*724ba675SRob Herring		};
16*724ba675SRob Herring	};
17*724ba675SRob Herring
18*724ba675SRob Herring	soc {
19*724ba675SRob Herring		/* Enable UART1 on this board */
20*724ba675SRob Herring		serial@80121000 {
21*724ba675SRob Herring			status = "okay";
22*724ba675SRob Herring		};
23*724ba675SRob Herring
24*724ba675SRob Herring		i2c@80004000 {
25*724ba675SRob Herring			tps61052@33 {
26*724ba675SRob Herring				compatible = "ti,tps61052";
27*724ba675SRob Herring				reg = <0x33>;
28*724ba675SRob Herring			};
29*724ba675SRob Herring
30*724ba675SRob Herring			tc35892@42 {
31*724ba675SRob Herring				compatible = "toshiba,tc35892";
32*724ba675SRob Herring				reg = <0x42>;
33*724ba675SRob Herring				interrupt-parent = <&gpio6>;
34*724ba675SRob Herring				interrupts = <25 IRQ_TYPE_EDGE_RISING>;
35*724ba675SRob Herring				pinctrl-names = "default";
36*724ba675SRob Herring				pinctrl-0 = <&tc35892_hrefprev60_mode>;
37*724ba675SRob Herring
38*724ba675SRob Herring				interrupt-controller;
39*724ba675SRob Herring				#interrupt-cells = <1>;
40*724ba675SRob Herring
41*724ba675SRob Herring				tc3589x_gpio: tc3589x_gpio {
42*724ba675SRob Herring					compatible = "tc3589x-gpio";
43*724ba675SRob Herring					interrupts = <0>;
44*724ba675SRob Herring
45*724ba675SRob Herring					interrupt-controller;
46*724ba675SRob Herring					#interrupt-cells = <2>;
47*724ba675SRob Herring					gpio-controller;
48*724ba675SRob Herring					#gpio-cells = <2>;
49*724ba675SRob Herring				};
50*724ba675SRob Herring			};
51*724ba675SRob Herring		};
52*724ba675SRob Herring
53*724ba675SRob Herring		spi@80002000 {
54*724ba675SRob Herring			/*
55*724ba675SRob Herring			 * On the first generation boards, this SSP/SPI port was connected
56*724ba675SRob Herring			 * to the AB8500.
57*724ba675SRob Herring			 */
58*724ba675SRob Herring			pinctrl-names = "default";
59*724ba675SRob Herring			pinctrl-0 = <&ssp0_hrefprev60_mode>;
60*724ba675SRob Herring			status = "okay";
61*724ba675SRob Herring		};
62*724ba675SRob Herring
63*724ba675SRob Herring		// External Micro SD slot
64*724ba675SRob Herring		mmc@80126000 {
65*724ba675SRob Herring			cd-gpios = <&tc3589x_gpio 3 GPIO_ACTIVE_HIGH>;
66*724ba675SRob Herring		};
67*724ba675SRob Herring
68*724ba675SRob Herring		pinctrl {
69*724ba675SRob Herring			/* Set this up using hogs */
70*724ba675SRob Herring			pinctrl-names = "default";
71*724ba675SRob Herring			pinctrl-0 = <&ipgpio_hrefprev60_mode>;
72*724ba675SRob Herring
73*724ba675SRob Herring			ssp0 {
74*724ba675SRob Herring				ssp0_hrefprev60_mode: ssp0_hrefprev60_default {
75*724ba675SRob Herring					hrefprev60_mux {
76*724ba675SRob Herring						function = "ssp0";
77*724ba675SRob Herring						groups = "ssp0_a_1";
78*724ba675SRob Herring					};
79*724ba675SRob Herring					hrefprev60_cfg1 {
80*724ba675SRob Herring						pins = "GPIO145_C13"; /* RXD */
81*724ba675SRob Herring						ste,config = <&in_pd>;
82*724ba675SRob Herring					};
83*724ba675SRob Herring
84*724ba675SRob Herring				};
85*724ba675SRob Herring			};
86*724ba675SRob Herring			sdi0 {
87*724ba675SRob Herring				/* This additional pin needed on early MOP500 and HREFs previous to v60 */
88*724ba675SRob Herring				sdi0_default_mode: sdi0_default {
89*724ba675SRob Herring					hrefprev60_mux {
90*724ba675SRob Herring						function = "mc0";
91*724ba675SRob Herring						groups = "mc0dat31dir_a_1";
92*724ba675SRob Herring					};
93*724ba675SRob Herring					hrefprev60_cfg1 {
94*724ba675SRob Herring						pins = "GPIO21_AB3"; /* DAT31DIR */
95*724ba675SRob Herring						ste,config = <&out_hi>;
96*724ba675SRob Herring					};
97*724ba675SRob Herring
98*724ba675SRob Herring				};
99*724ba675SRob Herring			};
100*724ba675SRob Herring			tc35892 {
101*724ba675SRob Herring				tc35892_hrefprev60_mode: tc35892_hrefprev60 {
102*724ba675SRob Herring					hrefprev60_cfg {
103*724ba675SRob Herring						pins = "GPIO217_AH12";
104*724ba675SRob Herring						ste,config = <&gpio_in_pu>;
105*724ba675SRob Herring					};
106*724ba675SRob Herring				};
107*724ba675SRob Herring			};
108*724ba675SRob Herring			ipgpio {
109*724ba675SRob Herring				 ipgpio_hrefprev60_mode: ipgpio_hrefprev60 {
110*724ba675SRob Herring					hrefprev60_mux {
111*724ba675SRob Herring						function = "ipgpio";
112*724ba675SRob Herring						groups = "ipgpio0_c_1", "ipgpio1_c_1";
113*724ba675SRob Herring					};
114*724ba675SRob Herring					hrefprev60_cfg1 {
115*724ba675SRob Herring						pins = "GPIO6_AF6", "GPIO7_AG5";
116*724ba675SRob Herring						ste,config = <&in_pu>;
117*724ba675SRob Herring					};
118*724ba675SRob Herring				 };
119*724ba675SRob Herring			};
120*724ba675SRob Herring		};
121*724ba675SRob Herring	};
122*724ba675SRob Herring};
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