xref: /linux/arch/arm/boot/dts/socionext/uniphier-ld6b-ref.dts (revision cdd5b5a9761fd66d17586e4f4ba6588c70e640ea)
1*724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0+ OR MIT
2*724ba675SRob Herring//
3*724ba675SRob Herring// Device Tree Source for UniPhier LD6b Reference Board
4*724ba675SRob Herring//
5*724ba675SRob Herring// Copyright (C) 2015-2016 Socionext Inc.
6*724ba675SRob Herring//   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
7*724ba675SRob Herring
8*724ba675SRob Herring/dts-v1/;
9*724ba675SRob Herring#include "uniphier-ld6b.dtsi"
10*724ba675SRob Herring#include "uniphier-ref-daughter.dtsi"
11*724ba675SRob Herring#include "uniphier-support-card.dtsi"
12*724ba675SRob Herring
13*724ba675SRob Herring/ {
14*724ba675SRob Herring	model = "UniPhier LD6b Reference Board";
15*724ba675SRob Herring	compatible = "socionext,uniphier-ld6b-ref", "socionext,uniphier-ld6b";
16*724ba675SRob Herring
17*724ba675SRob Herring	chosen {
18*724ba675SRob Herring		stdout-path = "serial0:115200n8";
19*724ba675SRob Herring	};
20*724ba675SRob Herring
21*724ba675SRob Herring	aliases {
22*724ba675SRob Herring		serial0 = &serial0;
23*724ba675SRob Herring		serial1 = &serial1;
24*724ba675SRob Herring		serial2 = &serial2;
25*724ba675SRob Herring		serial3 = &serialsc;
26*724ba675SRob Herring		i2c0 = &i2c0;
27*724ba675SRob Herring		i2c1 = &i2c1;
28*724ba675SRob Herring		i2c2 = &i2c2;
29*724ba675SRob Herring		i2c3 = &i2c3;
30*724ba675SRob Herring		i2c4 = &i2c4;
31*724ba675SRob Herring		i2c5 = &i2c5;
32*724ba675SRob Herring		i2c6 = &i2c6;
33*724ba675SRob Herring		ethernet0 = &eth;
34*724ba675SRob Herring	};
35*724ba675SRob Herring
36*724ba675SRob Herring	memory@80000000 {
37*724ba675SRob Herring		device_type = "memory";
38*724ba675SRob Herring		reg = <0x80000000 0x80000000>;
39*724ba675SRob Herring	};
40*724ba675SRob Herring};
41*724ba675SRob Herring
42*724ba675SRob Herring&ethsc {
43*724ba675SRob Herring	interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
44*724ba675SRob Herring};
45*724ba675SRob Herring
46*724ba675SRob Herring&serialsc {
47*724ba675SRob Herring	interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
48*724ba675SRob Herring};
49*724ba675SRob Herring
50*724ba675SRob Herring&serial0 {
51*724ba675SRob Herring	status = "okay";
52*724ba675SRob Herring};
53*724ba675SRob Herring
54*724ba675SRob Herring&serial1 {
55*724ba675SRob Herring	status = "okay";
56*724ba675SRob Herring};
57*724ba675SRob Herring
58*724ba675SRob Herring&serial2 {
59*724ba675SRob Herring	status = "okay";
60*724ba675SRob Herring};
61*724ba675SRob Herring
62*724ba675SRob Herring&gpio {
63*724ba675SRob Herring	xirq4-hog {
64*724ba675SRob Herring		gpio-hog;
65*724ba675SRob Herring		gpios = <UNIPHIER_GPIO_IRQ(4) 0>;
66*724ba675SRob Herring		input;
67*724ba675SRob Herring	};
68*724ba675SRob Herring};
69*724ba675SRob Herring
70*724ba675SRob Herring&i2c0 {
71*724ba675SRob Herring	status = "okay";
72*724ba675SRob Herring};
73*724ba675SRob Herring
74*724ba675SRob Herring&sd {
75*724ba675SRob Herring	status = "okay";
76*724ba675SRob Herring};
77*724ba675SRob Herring
78*724ba675SRob Herring&eth {
79*724ba675SRob Herring	status = "okay";
80*724ba675SRob Herring	phy-handle = <&ethphy>;
81*724ba675SRob Herring};
82*724ba675SRob Herring
83*724ba675SRob Herring&mdio {
84*724ba675SRob Herring	ethphy: ethernet-phy@0 {
85*724ba675SRob Herring		reg = <0>;
86*724ba675SRob Herring	};
87*724ba675SRob Herring};
88*724ba675SRob Herring
89*724ba675SRob Herring&usb0 {
90*724ba675SRob Herring	status = "okay";
91*724ba675SRob Herring};
92*724ba675SRob Herring
93*724ba675SRob Herring&usb1 {
94*724ba675SRob Herring	status = "okay";
95*724ba675SRob Herring};
96*724ba675SRob Herring
97*724ba675SRob Herring&nand {
98*724ba675SRob Herring	status = "okay";
99*724ba675SRob Herring
100*724ba675SRob Herring	nand@0 {
101*724ba675SRob Herring		reg = <0>;
102*724ba675SRob Herring	};
103*724ba675SRob Herring};
104