1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Samsung's S5PV210 SoC device tree source 4 * 5 * Copyright (c) 2013-2014 Samsung Electronics, Co. Ltd. 6 * 7 * Mateusz Krawczuk <m.krawczuk@partner.samsung.com> 8 * Tomasz Figa <t.figa@samsung.com> 9 * 10 * Samsung's S5PV210 SoC device nodes are listed in this file. S5PV210 11 * based board files can include this file and provide values for board specific 12 * bindings. 13 * 14 * Note: This file does not include device nodes for all the controllers in 15 * S5PV210 SoC. As device tree coverage for S5PV210 increases, additional 16 * nodes can be added to this file. 17 */ 18 19#include <dt-bindings/clock/s5pv210.h> 20#include <dt-bindings/clock/s5pv210-audss.h> 21 22/ { 23 #address-cells = <1>; 24 #size-cells = <1>; 25 26 aliases { 27 csis0 = &csis0; 28 dmc0 = &dmc0; 29 dmc1 = &dmc1; 30 fimc0 = &fimc0; 31 fimc1 = &fimc1; 32 fimc2 = &fimc2; 33 i2c0 = &i2c0; 34 i2c1 = &i2c1; 35 i2c2 = &i2c2; 36 i2s0 = &i2s0; 37 i2s1 = &i2s1; 38 i2s2 = &i2s2; 39 pinctrl0 = &pinctrl0; 40 spi0 = &spi0; 41 spi1 = &spi1; 42 }; 43 44 cpus { 45 #address-cells = <1>; 46 #size-cells = <0>; 47 48 cpu@0 { 49 device_type = "cpu"; 50 compatible = "arm,cortex-a8"; 51 reg = <0>; 52 }; 53 }; 54 55 xxti: oscillator-0 { 56 compatible = "fixed-clock"; 57 clock-frequency = <0>; 58 clock-output-names = "xxti"; 59 #clock-cells = <0>; 60 }; 61 62 xusbxti: oscillator-1 { 63 compatible = "fixed-clock"; 64 clock-frequency = <0>; 65 clock-output-names = "xusbxti"; 66 #clock-cells = <0>; 67 }; 68 69 soc { 70 compatible = "simple-bus"; 71 #address-cells = <1>; 72 #size-cells = <1>; 73 ranges; 74 75 onenand: nand-controller@b0600000 { 76 compatible = "samsung,s5pv210-onenand"; 77 reg = <0xb0600000 0x2000>, 78 <0xb0000000 0x20000>, 79 <0xb0040000 0x20000>; 80 interrupt-parent = <&vic1>; 81 interrupts = <31>; 82 clocks = <&clocks CLK_NANDXL>, <&clocks DOUT_FLASH>; 83 clock-names = "bus", "onenand"; 84 #address-cells = <1>; 85 #size-cells = <0>; 86 status = "disabled"; 87 }; 88 89 chipid@e0000000 { 90 compatible = "samsung,s5pv210-chipid"; 91 reg = <0xe0000000 0x1000>; 92 }; 93 94 clocks: clock-controller@e0100000 { 95 compatible = "samsung,s5pv210-clock"; 96 reg = <0xe0100000 0x10000>; 97 clock-names = "xxti", "xusbxti"; 98 clocks = <&xxti>, <&xusbxti>; 99 #clock-cells = <1>; 100 }; 101 102 pmu_syscon: syscon@e0108000 { 103 compatible = "samsung-s5pv210-pmu", "syscon"; 104 reg = <0xe0108000 0x8000>; 105 }; 106 107 pinctrl0: pinctrl@e0200000 { 108 compatible = "samsung,s5pv210-pinctrl"; 109 reg = <0xe0200000 0x1000>; 110 interrupt-parent = <&vic0>; 111 interrupts = <30>; 112 113 wakeup-interrupt-controller { 114 compatible = "samsung,s5pv210-wakeup-eint"; 115 interrupts = <16>; 116 interrupt-parent = <&vic0>; 117 }; 118 }; 119 120 pdma0: dma-controller@e0900000 { 121 compatible = "arm,pl330", "arm,primecell"; 122 reg = <0xe0900000 0x1000>; 123 interrupt-parent = <&vic0>; 124 interrupts = <19>; 125 clocks = <&clocks CLK_PDMA0>; 126 clock-names = "apb_pclk"; 127 #dma-cells = <1>; 128 }; 129 130 pdma1: dma-controller@e0a00000 { 131 compatible = "arm,pl330", "arm,primecell"; 132 reg = <0xe0a00000 0x1000>; 133 interrupt-parent = <&vic0>; 134 interrupts = <20>; 135 clocks = <&clocks CLK_PDMA1>; 136 clock-names = "apb_pclk"; 137 #dma-cells = <1>; 138 }; 139 140 adc: adc@e1700000 { 141 compatible = "samsung,s5pv210-adc"; 142 reg = <0xe1700000 0x1000>; 143 interrupt-parent = <&vic2>; 144 interrupts = <23>, <24>; 145 clocks = <&clocks CLK_TSADC>; 146 clock-names = "adc"; 147 #io-channel-cells = <1>; 148 status = "disabled"; 149 }; 150 151 spi0: spi@e1300000 { 152 compatible = "samsung,s5pv210-spi"; 153 reg = <0xe1300000 0x1000>; 154 interrupt-parent = <&vic1>; 155 interrupts = <15>; 156 dmas = <&pdma0 7>, <&pdma0 6>; 157 dma-names = "tx", "rx"; 158 clocks = <&clocks SCLK_SPI0>, <&clocks CLK_SPI0>; 159 clock-names = "spi", "spi_busclk0"; 160 pinctrl-names = "default"; 161 pinctrl-0 = <&spi0_bus>; 162 #address-cells = <1>; 163 #size-cells = <0>; 164 fifo-depth = <256>; 165 status = "disabled"; 166 }; 167 168 spi1: spi@e1400000 { 169 compatible = "samsung,s5pv210-spi"; 170 reg = <0xe1400000 0x1000>; 171 interrupt-parent = <&vic1>; 172 interrupts = <16>; 173 dmas = <&pdma1 7>, <&pdma1 6>; 174 dma-names = "tx", "rx"; 175 clocks = <&clocks SCLK_SPI1>, <&clocks CLK_SPI1>; 176 clock-names = "spi", "spi_busclk0"; 177 pinctrl-names = "default"; 178 pinctrl-0 = <&spi1_bus>; 179 #address-cells = <1>; 180 #size-cells = <0>; 181 fifo-depth = <64>; 182 status = "disabled"; 183 }; 184 185 keypad: keypad@e1600000 { 186 compatible = "samsung,s5pv210-keypad"; 187 reg = <0xe1600000 0x1000>; 188 interrupt-parent = <&vic2>; 189 interrupts = <25>; 190 clocks = <&clocks CLK_KEYIF>; 191 clock-names = "keypad"; 192 status = "disabled"; 193 }; 194 195 i2c0: i2c@e1800000 { 196 compatible = "samsung,s3c2440-i2c"; 197 reg = <0xe1800000 0x1000>; 198 interrupt-parent = <&vic1>; 199 interrupts = <14>; 200 clocks = <&clocks CLK_I2C0>; 201 clock-names = "i2c"; 202 pinctrl-names = "default"; 203 pinctrl-0 = <&i2c0_bus>; 204 #address-cells = <1>; 205 #size-cells = <0>; 206 status = "disabled"; 207 }; 208 209 i2c2: i2c@e1a00000 { 210 compatible = "samsung,s3c2440-i2c"; 211 reg = <0xe1a00000 0x1000>; 212 interrupt-parent = <&vic1>; 213 interrupts = <19>; 214 clocks = <&clocks CLK_I2C2>; 215 clock-names = "i2c"; 216 pinctrl-0 = <&i2c2_bus>; 217 pinctrl-names = "default"; 218 #address-cells = <1>; 219 #size-cells = <0>; 220 status = "disabled"; 221 }; 222 223 clk_audss: clock-controller@eee10000 { 224 compatible = "samsung,s5pv210-audss-clock"; 225 reg = <0xeee10000 0x1000>; 226 clock-names = "hclk", "xxti", 227 "fout_epll", 228 "sclk_audio0"; 229 clocks = <&clocks DOUT_HCLKP>, <&xxti>, 230 <&clocks FOUT_EPLL>, 231 <&clocks SCLK_AUDIO0>; 232 #clock-cells = <1>; 233 }; 234 235 i2s0: i2s@eee30000 { 236 compatible = "samsung,s5pv210-i2s"; 237 reg = <0xeee30000 0x1000>; 238 interrupt-parent = <&vic2>; 239 interrupts = <16>; 240 dma-names = "tx", "rx", "tx-sec"; 241 dmas = <&pdma1 10>, <&pdma1 9>, <&pdma1 11>; 242 clock-names = "iis", 243 "i2s_opclk0", 244 "i2s_opclk1"; 245 clocks = <&clk_audss CLK_I2S>, 246 <&clk_audss CLK_I2S>, 247 <&clk_audss CLK_DOUT_AUD_BUS>; 248 samsung,idma-addr = <0xc0010000>; 249 pinctrl-names = "default"; 250 pinctrl-0 = <&i2s0_bus>; 251 #sound-dai-cells = <0>; 252 status = "disabled"; 253 }; 254 255 i2s1: i2s@e2100000 { 256 compatible = "samsung,s3c6410-i2s"; 257 reg = <0xe2100000 0x1000>; 258 interrupt-parent = <&vic2>; 259 interrupts = <17>; 260 dma-names = "tx", "rx"; 261 dmas = <&pdma1 13>, <&pdma1 12>; 262 clock-names = "iis", "i2s_opclk0"; 263 clocks = <&clocks CLK_I2S1>, <&clocks SCLK_AUDIO1>; 264 pinctrl-names = "default"; 265 pinctrl-0 = <&i2s1_bus>; 266 #sound-dai-cells = <0>; 267 status = "disabled"; 268 }; 269 270 i2s2: i2s@e2a00000 { 271 compatible = "samsung,s3c6410-i2s"; 272 reg = <0xe2a00000 0x1000>; 273 interrupt-parent = <&vic2>; 274 interrupts = <18>; 275 dma-names = "tx", "rx"; 276 dmas = <&pdma1 15>, <&pdma1 14>; 277 clock-names = "iis", "i2s_opclk0"; 278 clocks = <&clocks CLK_I2S2>, <&clocks SCLK_AUDIO2>; 279 pinctrl-names = "default"; 280 pinctrl-0 = <&i2s2_bus>; 281 #sound-dai-cells = <0>; 282 status = "disabled"; 283 }; 284 285 pwm: pwm@e2500000 { 286 compatible = "samsung,s5pc100-pwm"; 287 reg = <0xe2500000 0x1000>; 288 interrupt-parent = <&vic0>; 289 interrupts = <21>, <22>, <23>, <24>, <25>; 290 clock-names = "timers"; 291 clocks = <&clocks CLK_PWM>; 292 #pwm-cells = <3>; 293 }; 294 295 watchdog: watchdog@e2700000 { 296 compatible = "samsung,s3c6410-wdt"; 297 reg = <0xe2700000 0x1000>; 298 interrupt-parent = <&vic0>; 299 interrupts = <26>; 300 clock-names = "watchdog"; 301 clocks = <&clocks CLK_WDT>; 302 }; 303 304 rtc: rtc@e2800000 { 305 compatible = "samsung,s3c6410-rtc"; 306 reg = <0xe2800000 0x100>; 307 interrupt-parent = <&vic0>; 308 interrupts = <28>, <29>; 309 clocks = <&clocks CLK_RTC>; 310 clock-names = "rtc"; 311 status = "disabled"; 312 }; 313 314 uart0: serial@e2900000 { 315 compatible = "samsung,s5pv210-uart"; 316 reg = <0xe2900000 0x400>; 317 interrupt-parent = <&vic1>; 318 interrupts = <10>; 319 clock-names = "uart", "clk_uart_baud0", 320 "clk_uart_baud1"; 321 clocks = <&clocks CLK_UART0>, <&clocks CLK_UART0>, 322 <&clocks SCLK_UART0>; 323 status = "disabled"; 324 }; 325 326 uart1: serial@e2900400 { 327 compatible = "samsung,s5pv210-uart"; 328 reg = <0xe2900400 0x400>; 329 interrupt-parent = <&vic1>; 330 interrupts = <11>; 331 clock-names = "uart", "clk_uart_baud0", 332 "clk_uart_baud1"; 333 clocks = <&clocks CLK_UART1>, <&clocks CLK_UART1>, 334 <&clocks SCLK_UART1>; 335 status = "disabled"; 336 }; 337 338 uart2: serial@e2900800 { 339 compatible = "samsung,s5pv210-uart"; 340 reg = <0xe2900800 0x400>; 341 interrupt-parent = <&vic1>; 342 interrupts = <12>; 343 clock-names = "uart", "clk_uart_baud0", 344 "clk_uart_baud1"; 345 clocks = <&clocks CLK_UART2>, <&clocks CLK_UART2>, 346 <&clocks SCLK_UART2>; 347 status = "disabled"; 348 }; 349 350 uart3: serial@e2900c00 { 351 compatible = "samsung,s5pv210-uart"; 352 reg = <0xe2900c00 0x400>; 353 interrupt-parent = <&vic1>; 354 interrupts = <13>; 355 clock-names = "uart", "clk_uart_baud0", 356 "clk_uart_baud1"; 357 clocks = <&clocks CLK_UART3>, <&clocks CLK_UART3>, 358 <&clocks SCLK_UART3>; 359 status = "disabled"; 360 }; 361 362 sdhci0: mmc@eb000000 { 363 compatible = "samsung,s3c6410-sdhci"; 364 reg = <0xeb000000 0x100000>; 365 interrupt-parent = <&vic1>; 366 interrupts = <26>; 367 clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2"; 368 clocks = <&clocks CLK_HSMMC0>, <&clocks CLK_HSMMC0>, 369 <&clocks SCLK_MMC0>; 370 status = "disabled"; 371 }; 372 373 sdhci1: mmc@eb100000 { 374 compatible = "samsung,s3c6410-sdhci"; 375 reg = <0xeb100000 0x100000>; 376 interrupt-parent = <&vic1>; 377 interrupts = <27>; 378 clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2"; 379 clocks = <&clocks CLK_HSMMC1>, <&clocks CLK_HSMMC1>, 380 <&clocks SCLK_MMC1>; 381 status = "disabled"; 382 }; 383 384 sdhci2: mmc@eb200000 { 385 compatible = "samsung,s3c6410-sdhci"; 386 reg = <0xeb200000 0x100000>; 387 interrupt-parent = <&vic1>; 388 interrupts = <28>; 389 clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2"; 390 clocks = <&clocks CLK_HSMMC2>, <&clocks CLK_HSMMC2>, 391 <&clocks SCLK_MMC2>; 392 status = "disabled"; 393 }; 394 395 sdhci3: mmc@eb300000 { 396 compatible = "samsung,s3c6410-sdhci"; 397 reg = <0xeb300000 0x100000>; 398 interrupt-parent = <&vic3>; 399 interrupts = <2>; 400 clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.3"; 401 clocks = <&clocks CLK_HSMMC3>, <&clocks CLK_HSMMC3>, 402 <&clocks SCLK_MMC3>; 403 status = "disabled"; 404 }; 405 406 hsotg: usb@ec000000 { 407 compatible = "samsung,s3c6400-hsotg"; 408 reg = <0xec000000 0x20000>; 409 interrupt-parent = <&vic1>; 410 interrupts = <24>; 411 clocks = <&clocks CLK_USB_OTG>; 412 clock-names = "otg"; 413 phy-names = "usb2-phy"; 414 phys = <&usbphy 0>; 415 status = "disabled"; 416 }; 417 418 usbphy: usbphy@ec100000 { 419 compatible = "samsung,s5pv210-usb2-phy"; 420 reg = <0xec100000 0x100>; 421 samsung,pmureg-phandle = <&pmu_syscon>; 422 clocks = <&clocks CLK_USB_OTG>, <&xusbxti>; 423 clock-names = "phy", "ref"; 424 #phy-cells = <1>; 425 status = "disabled"; 426 }; 427 428 ehci: usb@ec200000 { 429 compatible = "samsung,exynos4210-ehci"; 430 reg = <0xec200000 0x100>; 431 interrupts = <23>; 432 interrupt-parent = <&vic1>; 433 clocks = <&clocks CLK_USB_HOST>; 434 clock-names = "usbhost"; 435 phys = <&usbphy 1>; 436 phy-names = "host"; 437 status = "disabled"; 438 }; 439 440 ohci: usb@ec300000 { 441 compatible = "samsung,exynos4210-ohci"; 442 reg = <0xec300000 0x100>; 443 interrupts = <23>; 444 interrupt-parent = <&vic1>; 445 clocks = <&clocks CLK_USB_HOST>; 446 clock-names = "usbhost"; 447 phys = <&usbphy 1>; 448 phy-names = "host"; 449 status = "disabled"; 450 }; 451 452 mfc: codec@f1700000 { 453 compatible = "samsung,mfc-v5"; 454 reg = <0xf1700000 0x10000>; 455 interrupt-parent = <&vic2>; 456 interrupts = <14>; 457 clocks = <&clocks CLK_MFC>, <&clocks DOUT_MFC>; 458 clock-names = "mfc", "sclk_mfc"; 459 }; 460 461 vic0: interrupt-controller@f2000000 { 462 compatible = "arm,pl192-vic"; 463 interrupt-controller; 464 reg = <0xf2000000 0x1000>; 465 #interrupt-cells = <1>; 466 }; 467 468 vic1: interrupt-controller@f2100000 { 469 compatible = "arm,pl192-vic"; 470 interrupt-controller; 471 reg = <0xf2100000 0x1000>; 472 #interrupt-cells = <1>; 473 }; 474 475 vic2: interrupt-controller@f2200000 { 476 compatible = "arm,pl192-vic"; 477 interrupt-controller; 478 reg = <0xf2200000 0x1000>; 479 #interrupt-cells = <1>; 480 }; 481 482 vic3: interrupt-controller@f2300000 { 483 compatible = "arm,pl192-vic"; 484 interrupt-controller; 485 reg = <0xf2300000 0x1000>; 486 #interrupt-cells = <1>; 487 }; 488 489 fimd: fimd@f8000000 { 490 compatible = "samsung,s5pv210-fimd"; 491 interrupt-parent = <&vic2>; 492 reg = <0xf8000000 0x20000>; 493 interrupt-names = "fifo", "vsync", "lcd_sys"; 494 interrupts = <0>, <1>, <2>; 495 clocks = <&clocks SCLK_FIMD>, <&clocks CLK_FIMD>; 496 clock-names = "sclk_fimd", "fimd"; 497 status = "disabled"; 498 }; 499 500 dmc0: dmc@f0000000 { 501 compatible = "samsung,s5pv210-dmc"; 502 reg = <0xf0000000 0x1000>; 503 }; 504 505 dmc1: dmc@f1400000 { 506 compatible = "samsung,s5pv210-dmc"; 507 reg = <0xf1400000 0x1000>; 508 }; 509 510 g2d: g2d@fa000000 { 511 compatible = "samsung,s5pv210-g2d"; 512 reg = <0xfa000000 0x1000>; 513 interrupt-parent = <&vic2>; 514 interrupts = <9>; 515 clocks = <&clocks DOUT_G2D>, <&clocks CLK_G2D>; 516 clock-names = "sclk_fimg2d", "fimg2d"; 517 }; 518 519 mdma1: dma-controller@fa200000 { 520 compatible = "arm,pl330", "arm,primecell"; 521 reg = <0xfa200000 0x1000>; 522 interrupt-parent = <&vic0>; 523 interrupts = <18>; 524 clocks = <&clocks CLK_MDMA>; 525 clock-names = "apb_pclk"; 526 #dma-cells = <1>; 527 }; 528 529 rotator: rotator@fa300000 { 530 compatible = "samsung,s5pv210-rotator"; 531 reg = <0xfa300000 0x1000>; 532 interrupt-parent = <&vic2>; 533 interrupts = <4>; 534 clocks = <&clocks CLK_ROTATOR>; 535 clock-names = "rotator"; 536 }; 537 538 i2c1: i2c@fab00000 { 539 compatible = "samsung,s3c2440-i2c"; 540 reg = <0xfab00000 0x1000>; 541 interrupt-parent = <&vic2>; 542 interrupts = <13>; 543 clocks = <&clocks CLK_I2C1>; 544 clock-names = "i2c"; 545 pinctrl-names = "default"; 546 pinctrl-0 = <&i2c1_bus>; 547 #address-cells = <1>; 548 #size-cells = <0>; 549 status = "disabled"; 550 }; 551 552 camera: camera@fa600000 { 553 compatible = "samsung,fimc"; 554 ranges = <0x0 0xfa600000 0xe01000>; 555 clocks = <&clocks SCLK_CAM0>, <&clocks SCLK_CAM1>; 556 clock-names = "sclk_cam0", "sclk_cam1"; 557 #address-cells = <1>; 558 #size-cells = <1>; 559 #clock-cells = <1>; 560 clock-output-names = "cam_a_clkout", "cam_b_clkout"; 561 562 csis0: csis@0 { 563 compatible = "samsung,s5pv210-csis"; 564 reg = <0x00000000 0x4000>; 565 interrupt-parent = <&vic2>; 566 interrupts = <29>; 567 clocks = <&clocks CLK_CSIS>, 568 <&clocks SCLK_CSIS>; 569 clock-names = "csis", 570 "sclk_csis"; 571 bus-width = <4>; 572 status = "disabled"; 573 #address-cells = <1>; 574 #size-cells = <0>; 575 }; 576 577 fimc0: fimc@c00000 { 578 compatible = "samsung,s5pv210-fimc"; 579 reg = <0x00c00000 0x1000>; 580 interrupts = <5>; 581 interrupt-parent = <&vic2>; 582 clocks = <&clocks CLK_FIMC0>, 583 <&clocks SCLK_FIMC0>; 584 clock-names = "fimc", 585 "sclk_fimc"; 586 samsung,pix-limits = <4224 8192 1920 4224>; 587 samsung,min-pix-alignment = <16 8>; 588 samsung,cam-if; 589 }; 590 591 fimc1: fimc@d00000 { 592 compatible = "samsung,s5pv210-fimc"; 593 reg = <0x00d00000 0x1000>; 594 interrupt-parent = <&vic2>; 595 interrupts = <6>; 596 clocks = <&clocks CLK_FIMC1>, 597 <&clocks SCLK_FIMC1>; 598 clock-names = "fimc", 599 "sclk_fimc"; 600 samsung,pix-limits = <4224 8192 1920 4224>; 601 samsung,min-pix-alignment = <1 1>; 602 samsung,mainscaler-ext; 603 samsung,cam-if; 604 samsung,lcd-wb; 605 }; 606 607 fimc2: fimc@e00000 { 608 compatible = "samsung,s5pv210-fimc"; 609 reg = <0x00e00000 0x1000>; 610 interrupt-parent = <&vic2>; 611 interrupts = <7>; 612 clocks = <&clocks CLK_FIMC2>, 613 <&clocks SCLK_FIMC2>; 614 clock-names = "fimc", 615 "sclk_fimc"; 616 samsung,pix-limits = <1920 8192 1280 1920>; 617 samsung,min-pix-alignment = <16 8>; 618 samsung,rotators = <0>; 619 samsung,cam-if; 620 }; 621 }; 622 623 jpeg_codec: jpeg-codec@fb600000 { 624 compatible = "samsung,s5pv210-jpeg"; 625 reg = <0xfb600000 0x1000>; 626 interrupt-parent = <&vic2>; 627 interrupts = <8>; 628 clocks = <&clocks CLK_JPEG>; 629 clock-names = "jpeg"; 630 }; 631 }; 632}; 633 634#include "s5pv210-pinctrl.dtsi" 635