xref: /linux/arch/arm/boot/dts/samsung/s5pv210-smdkc110.dts (revision 724ba6751532055db75992fc6ae21c3e322e94a7)
1*724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0
2*724ba675SRob Herring/*
3*724ba675SRob Herring * Samsung's S5PV210 SoC device tree source
4*724ba675SRob Herring *
5*724ba675SRob Herring * Copyright (c) 2013-2014 Samsung Electronics, Co. Ltd.
6*724ba675SRob Herring *
7*724ba675SRob Herring * Mateusz Krawczuk <m.krawczuk@partner.samsung.com>
8*724ba675SRob Herring * Tomasz Figa <t.figa@samsung.com>
9*724ba675SRob Herring *
10*724ba675SRob Herring * Board device tree source for YIC System SMDC110 board.
11*724ba675SRob Herring *
12*724ba675SRob Herring * NOTE: This file is completely based on original board file for mach-smdkc110
13*724ba675SRob Herring * available in Linux 3.15 and intends to provide equivalent level of hardware
14*724ba675SRob Herring * support. Due to lack of hardware, _no_ testing has been performed.
15*724ba675SRob Herring */
16*724ba675SRob Herring
17*724ba675SRob Herring/dts-v1/;
18*724ba675SRob Herring#include <dt-bindings/input/input.h>
19*724ba675SRob Herring#include "s5pv210.dtsi"
20*724ba675SRob Herring
21*724ba675SRob Herring/ {
22*724ba675SRob Herring	model = "YIC System SMDKC110 based on S5PC110";
23*724ba675SRob Herring	compatible = "yic,smdkc110", "samsung,s5pv210";
24*724ba675SRob Herring
25*724ba675SRob Herring	chosen {
26*724ba675SRob Herring		bootargs = "console=ttySAC0,115200n8 root=/dev/mmcblk0p1 rw rootwait ignore_loglevel earlyprintk";
27*724ba675SRob Herring	};
28*724ba675SRob Herring
29*724ba675SRob Herring	memory@20000000 {
30*724ba675SRob Herring		device_type = "memory";
31*724ba675SRob Herring		reg = <0x20000000 0x20000000>;
32*724ba675SRob Herring	};
33*724ba675SRob Herring
34*724ba675SRob Herring	pmic_ap_clk: clock-0 {
35*724ba675SRob Herring		/* Workaround for missing PMIC and its clock */
36*724ba675SRob Herring		compatible = "fixed-clock";
37*724ba675SRob Herring		#clock-cells = <0>;
38*724ba675SRob Herring		clock-frequency = <32768>;
39*724ba675SRob Herring	};
40*724ba675SRob Herring};
41*724ba675SRob Herring
42*724ba675SRob Herring&xusbxti {
43*724ba675SRob Herring	clock-frequency = <24000000>;
44*724ba675SRob Herring};
45*724ba675SRob Herring
46*724ba675SRob Herring&uart0 {
47*724ba675SRob Herring	status = "okay";
48*724ba675SRob Herring};
49*724ba675SRob Herring
50*724ba675SRob Herring&uart1 {
51*724ba675SRob Herring	status = "okay";
52*724ba675SRob Herring};
53*724ba675SRob Herring
54*724ba675SRob Herring&uart2 {
55*724ba675SRob Herring	status = "okay";
56*724ba675SRob Herring};
57*724ba675SRob Herring
58*724ba675SRob Herring&uart3 {
59*724ba675SRob Herring	status = "okay";
60*724ba675SRob Herring};
61*724ba675SRob Herring
62*724ba675SRob Herring&rtc {
63*724ba675SRob Herring	status = "okay";
64*724ba675SRob Herring	clocks = <&clocks CLK_RTC>, <&pmic_ap_clk>;
65*724ba675SRob Herring	clock-names = "rtc", "rtc_src";
66*724ba675SRob Herring};
67*724ba675SRob Herring
68*724ba675SRob Herring&i2c0 {
69*724ba675SRob Herring	status = "okay";
70*724ba675SRob Herring
71*724ba675SRob Herring	audio-codec@1b {
72*724ba675SRob Herring		compatible = "wlf,wm8580";
73*724ba675SRob Herring		reg = <0x1b>;
74*724ba675SRob Herring	};
75*724ba675SRob Herring
76*724ba675SRob Herring	eeprom@50 {
77*724ba675SRob Herring		compatible = "atmel,24c08";
78*724ba675SRob Herring		reg = <0x50>;
79*724ba675SRob Herring	};
80*724ba675SRob Herring};
81*724ba675SRob Herring
82*724ba675SRob Herring&i2s0 {
83*724ba675SRob Herring	status = "okay";
84*724ba675SRob Herring};
85