xref: /linux/arch/arm/boot/dts/rockchip/rv1126-sonoff-ihost.dtsi (revision 79790b6818e96c58fe2bffee1b418c16e64e7b80)
15d7d06e7STim Lunn// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
25d7d06e7STim Lunn/*
35d7d06e7STim Lunn * Copyright (c) 2020 Rockchip Electronics Co., Ltd.
45d7d06e7STim Lunn * Copyright (c) 2022 Edgeble AI Technologies Pvt. Ltd.
55d7d06e7STim Lunn */
65d7d06e7STim Lunn
75d7d06e7STim Lunn/ {
85d7d06e7STim Lunn	aliases {
95d7d06e7STim Lunn		ethernet0 = &gmac;
105d7d06e7STim Lunn		mmc0 = &emmc;
11eb246eaaSTim Lunn		mmc1 = &sdio;
12eb246eaaSTim Lunn		mmc2 = &sdmmc;
135d7d06e7STim Lunn	};
145d7d06e7STim Lunn
155d7d06e7STim Lunn	chosen {
165d7d06e7STim Lunn		stdout-path = "serial2:1500000n8";
175d7d06e7STim Lunn	};
185d7d06e7STim Lunn
195d7d06e7STim Lunn	vcc5v0_sys: regulator-vcc5v0-sys {
205d7d06e7STim Lunn		compatible = "regulator-fixed";
215d7d06e7STim Lunn		regulator-name = "vcc5v0_sys";
225d7d06e7STim Lunn		regulator-always-on;
235d7d06e7STim Lunn		regulator-boot-on;
245d7d06e7STim Lunn		regulator-min-microvolt = <5000000>;
255d7d06e7STim Lunn		regulator-max-microvolt = <5000000>;
265d7d06e7STim Lunn	};
275d7d06e7STim Lunn
285d7d06e7STim Lunn	sdio_pwrseq: pwrseq-sdio {
295d7d06e7STim Lunn		compatible = "mmc-pwrseq-simple";
305d7d06e7STim Lunn		clocks = <&rk809 1>;
315d7d06e7STim Lunn		clock-names = "ext_clock";
325d7d06e7STim Lunn		pinctrl-names = "default";
335d7d06e7STim Lunn		pinctrl-0 = <&wifi_enable_h>;
345d7d06e7STim Lunn		reset-gpios = <&gpio1 RK_PD0 GPIO_ACTIVE_LOW>;
355d7d06e7STim Lunn	};
365d7d06e7STim Lunn};
375d7d06e7STim Lunn
385d7d06e7STim Lunn&emmc {
395d7d06e7STim Lunn	bus-width = <8>;
405d7d06e7STim Lunn	cap-mmc-highspeed;
415d7d06e7STim Lunn	mmc-hs200-1_8v;
425d7d06e7STim Lunn	non-removable;
435d7d06e7STim Lunn	pinctrl-names = "default";
445d7d06e7STim Lunn	pinctrl-0 = <&emmc_bus8 &emmc_cmd &emmc_clk &emmc_rstnout>;
455d7d06e7STim Lunn	rockchip,default-sample-phase = <90>;
465d7d06e7STim Lunn	vmmc-supply = <&vcc_3v3>;
475d7d06e7STim Lunn	vqmmc-supply = <&vcc_1v8>;
485d7d06e7STim Lunn	status = "okay";
495d7d06e7STim Lunn};
505d7d06e7STim Lunn
515d7d06e7STim Lunn&i2c0 {
525d7d06e7STim Lunn	clock-frequency = <400000>;
535d7d06e7STim Lunn	status = "okay";
545d7d06e7STim Lunn
555d7d06e7STim Lunn	rk809: pmic@20 {
565d7d06e7STim Lunn		compatible = "rockchip,rk809";
575d7d06e7STim Lunn		reg = <0x20>;
585d7d06e7STim Lunn		interrupt-parent = <&gpio0>;
595d7d06e7STim Lunn		interrupts = <RK_PB1 IRQ_TYPE_LEVEL_LOW>;
605d7d06e7STim Lunn		#clock-cells = <1>;
615d7d06e7STim Lunn		clock-output-names = "rk808-clkout1", "rk808-clkout2";
625d7d06e7STim Lunn		pinctrl-names = "default";
635d7d06e7STim Lunn		pinctrl-0 = <&pmic_int_l>;
645d7d06e7STim Lunn		rockchip,system-power-controller;
655d7d06e7STim Lunn		wakeup-source;
665d7d06e7STim Lunn
675d7d06e7STim Lunn		vcc1-supply = <&vcc5v0_sys>;
685d7d06e7STim Lunn		vcc2-supply = <&vcc5v0_sys>;
695d7d06e7STim Lunn		vcc3-supply = <&vcc5v0_sys>;
705d7d06e7STim Lunn		vcc4-supply = <&vcc5v0_sys>;
715d7d06e7STim Lunn		vcc5-supply = <&vcc_buck5>;
725d7d06e7STim Lunn		vcc6-supply = <&vcc_buck5>;
735d7d06e7STim Lunn		vcc7-supply = <&vcc5v0_sys>;
745d7d06e7STim Lunn		vcc8-supply = <&vcc3v3_sys>;
755d7d06e7STim Lunn		vcc9-supply = <&vcc5v0_sys>;
765d7d06e7STim Lunn
775d7d06e7STim Lunn		regulators {
785d7d06e7STim Lunn			vdd_npu_vepu: DCDC_REG1 {
795d7d06e7STim Lunn				regulator-name = "vdd_npu_vepu";
805d7d06e7STim Lunn				regulator-always-on;
815d7d06e7STim Lunn				regulator-boot-on;
825d7d06e7STim Lunn				regulator-initial-mode = <0x2>;
835d7d06e7STim Lunn				regulator-min-microvolt = <650000>;
845d7d06e7STim Lunn				regulator-max-microvolt = <950000>;
855d7d06e7STim Lunn				regulator-ramp-delay = <6001>;
865d7d06e7STim Lunn				regulator-state-mem {
875d7d06e7STim Lunn					regulator-off-in-suspend;
885d7d06e7STim Lunn				};
895d7d06e7STim Lunn			};
905d7d06e7STim Lunn
915d7d06e7STim Lunn			vdd_arm: DCDC_REG2 {
925d7d06e7STim Lunn				regulator-name = "vdd_arm";
935d7d06e7STim Lunn				regulator-always-on;
945d7d06e7STim Lunn				regulator-boot-on;
955d7d06e7STim Lunn				regulator-initial-mode = <0x2>;
965d7d06e7STim Lunn				regulator-min-microvolt = <725000>;
975d7d06e7STim Lunn				regulator-max-microvolt = <1350000>;
985d7d06e7STim Lunn				regulator-ramp-delay = <6001>;
995d7d06e7STim Lunn				regulator-state-mem {
1005d7d06e7STim Lunn					regulator-off-in-suspend;
1015d7d06e7STim Lunn				};
1025d7d06e7STim Lunn			};
1035d7d06e7STim Lunn
1045d7d06e7STim Lunn			vcc_ddr: DCDC_REG3 {
1055d7d06e7STim Lunn				regulator-name = "vcc_ddr";
1065d7d06e7STim Lunn				regulator-always-on;
1075d7d06e7STim Lunn				regulator-boot-on;
1085d7d06e7STim Lunn				regulator-initial-mode = <0x2>;
1095d7d06e7STim Lunn				regulator-state-mem {
1105d7d06e7STim Lunn					regulator-on-in-suspend;
1115d7d06e7STim Lunn				};
1125d7d06e7STim Lunn			};
1135d7d06e7STim Lunn
1145d7d06e7STim Lunn			vcc3v3_sys: DCDC_REG4 {
1155d7d06e7STim Lunn				regulator-name = "vcc3v3_sys";
1165d7d06e7STim Lunn				regulator-always-on;
1175d7d06e7STim Lunn				regulator-boot-on;
1185d7d06e7STim Lunn				regulator-initial-mode = <0x2>;
1195d7d06e7STim Lunn				regulator-min-microvolt = <3300000>;
1205d7d06e7STim Lunn				regulator-max-microvolt = <3300000>;
1215d7d06e7STim Lunn				regulator-state-mem {
1225d7d06e7STim Lunn					regulator-on-in-suspend;
1235d7d06e7STim Lunn					regulator-suspend-microvolt = <3300000>;
1245d7d06e7STim Lunn				};
1255d7d06e7STim Lunn			};
1265d7d06e7STim Lunn
1275d7d06e7STim Lunn			vcc_buck5: DCDC_REG5 {
1285d7d06e7STim Lunn				regulator-name = "vcc_buck5";
1295d7d06e7STim Lunn				regulator-always-on;
1305d7d06e7STim Lunn				regulator-boot-on;
1315d7d06e7STim Lunn				regulator-min-microvolt = <2200000>;
1325d7d06e7STim Lunn				regulator-max-microvolt = <2200000>;
1335d7d06e7STim Lunn				regulator-state-mem {
1345d7d06e7STim Lunn					regulator-on-in-suspend;
1355d7d06e7STim Lunn					regulator-suspend-microvolt = <2200000>;
1365d7d06e7STim Lunn				};
1375d7d06e7STim Lunn			};
1385d7d06e7STim Lunn
1395d7d06e7STim Lunn			vcc_0v8: LDO_REG1 {
1405d7d06e7STim Lunn				regulator-name = "vcc_0v8";
1415d7d06e7STim Lunn				regulator-always-on;
1425d7d06e7STim Lunn				regulator-boot-on;
1435d7d06e7STim Lunn				regulator-min-microvolt = <800000>;
1445d7d06e7STim Lunn				regulator-max-microvolt = <800000>;
1455d7d06e7STim Lunn				regulator-state-mem {
1465d7d06e7STim Lunn					regulator-off-in-suspend;
1475d7d06e7STim Lunn				};
1485d7d06e7STim Lunn			};
1495d7d06e7STim Lunn
1505d7d06e7STim Lunn			vcc1v8_pmu: LDO_REG2 {
1515d7d06e7STim Lunn				regulator-name = "vcc1v8_pmu";
1525d7d06e7STim Lunn				regulator-always-on;
1535d7d06e7STim Lunn				regulator-boot-on;
1545d7d06e7STim Lunn				regulator-min-microvolt = <1800000>;
1555d7d06e7STim Lunn				regulator-max-microvolt = <1800000>;
1565d7d06e7STim Lunn				regulator-state-mem {
1575d7d06e7STim Lunn					regulator-on-in-suspend;
1585d7d06e7STim Lunn					regulator-suspend-microvolt = <1800000>;
1595d7d06e7STim Lunn				};
1605d7d06e7STim Lunn			};
1615d7d06e7STim Lunn
1625d7d06e7STim Lunn			vdd0v8_pmu: LDO_REG3 {
1635d7d06e7STim Lunn				regulator-name = "vcc0v8_pmu";
1645d7d06e7STim Lunn				regulator-always-on;
1655d7d06e7STim Lunn				regulator-boot-on;
1665d7d06e7STim Lunn				regulator-min-microvolt = <800000>;
1675d7d06e7STim Lunn				regulator-max-microvolt = <800000>;
1685d7d06e7STim Lunn				regulator-state-mem {
1695d7d06e7STim Lunn					regulator-on-in-suspend;
1705d7d06e7STim Lunn					regulator-suspend-microvolt = <800000>;
1715d7d06e7STim Lunn				};
1725d7d06e7STim Lunn			};
1735d7d06e7STim Lunn
1745d7d06e7STim Lunn			vcc_1v8: LDO_REG4 {
1755d7d06e7STim Lunn				regulator-name = "vcc_1v8";
1765d7d06e7STim Lunn				regulator-always-on;
1775d7d06e7STim Lunn				regulator-boot-on;
1785d7d06e7STim Lunn				regulator-min-microvolt = <1800000>;
1795d7d06e7STim Lunn				regulator-max-microvolt = <1800000>;
1805d7d06e7STim Lunn				regulator-state-mem {
1815d7d06e7STim Lunn					regulator-on-in-suspend;
1825d7d06e7STim Lunn					regulator-suspend-microvolt = <1800000>;
1835d7d06e7STim Lunn				};
1845d7d06e7STim Lunn			};
1855d7d06e7STim Lunn
1865d7d06e7STim Lunn			vcc_dovdd: LDO_REG5 {
1875d7d06e7STim Lunn				regulator-name = "vcc_dovdd";
1885d7d06e7STim Lunn				regulator-always-on;
1895d7d06e7STim Lunn				regulator-boot-on;
1905d7d06e7STim Lunn				regulator-min-microvolt = <1800000>;
1915d7d06e7STim Lunn				regulator-max-microvolt = <1800000>;
1925d7d06e7STim Lunn				regulator-state-mem {
1935d7d06e7STim Lunn					regulator-off-in-suspend;
1945d7d06e7STim Lunn				};
1955d7d06e7STim Lunn			};
1965d7d06e7STim Lunn
1975d7d06e7STim Lunn			vcc_dvdd: LDO_REG6 {
1985d7d06e7STim Lunn				regulator-name = "vcc_dvdd";
1995d7d06e7STim Lunn				regulator-min-microvolt = <1200000>;
2005d7d06e7STim Lunn				regulator-max-microvolt = <1200000>;
2015d7d06e7STim Lunn				regulator-state-mem {
2025d7d06e7STim Lunn					regulator-off-in-suspend;
2035d7d06e7STim Lunn				};
2045d7d06e7STim Lunn			};
2055d7d06e7STim Lunn
2065d7d06e7STim Lunn			vcc_avdd: LDO_REG7 {
2075d7d06e7STim Lunn				regulator-name = "vcc_avdd";
2085d7d06e7STim Lunn				regulator-min-microvolt = <2800000>;
2095d7d06e7STim Lunn				regulator-max-microvolt = <2800000>;
2105d7d06e7STim Lunn				regulator-state-mem {
2115d7d06e7STim Lunn					regulator-off-in-suspend;
2125d7d06e7STim Lunn				};
2135d7d06e7STim Lunn			};
2145d7d06e7STim Lunn
2155d7d06e7STim Lunn			vccio_sd: LDO_REG8 {
2165d7d06e7STim Lunn				regulator-name = "vccio_sd";
2175d7d06e7STim Lunn				regulator-always-on;
2185d7d06e7STim Lunn				regulator-boot-on;
2195d7d06e7STim Lunn				regulator-min-microvolt = <1800000>;
2205d7d06e7STim Lunn				regulator-max-microvolt = <3300000>;
2215d7d06e7STim Lunn				regulator-state-mem {
2225d7d06e7STim Lunn					regulator-off-in-suspend;
2235d7d06e7STim Lunn				};
2245d7d06e7STim Lunn			};
2255d7d06e7STim Lunn
2265d7d06e7STim Lunn			vcc3v3_sd: LDO_REG9 {
2275d7d06e7STim Lunn				regulator-name = "vcc3v3_sd";
2285d7d06e7STim Lunn				regulator-always-on;
2295d7d06e7STim Lunn				regulator-boot-on;
2305d7d06e7STim Lunn				regulator-min-microvolt = <3300000>;
2315d7d06e7STim Lunn				regulator-max-microvolt = <3300000>;
2325d7d06e7STim Lunn				regulator-state-mem {
2335d7d06e7STim Lunn					regulator-off-in-suspend;
2345d7d06e7STim Lunn				};
2355d7d06e7STim Lunn			};
2365d7d06e7STim Lunn
2375d7d06e7STim Lunn			vcc_5v0: SWITCH_REG1 {
2385d7d06e7STim Lunn				regulator-name = "vcc_5v0";
2395d7d06e7STim Lunn			};
2405d7d06e7STim Lunn
2415d7d06e7STim Lunn			vcc_3v3: SWITCH_REG2 {
2425d7d06e7STim Lunn				regulator-name = "vcc_3v3";
2435d7d06e7STim Lunn				regulator-always-on;
2445d7d06e7STim Lunn				regulator-boot-on;
2455d7d06e7STim Lunn			};
2465d7d06e7STim Lunn		};
2475d7d06e7STim Lunn	};
2485d7d06e7STim Lunn};
2495d7d06e7STim Lunn
2505d7d06e7STim Lunn&i2c2 {
2515d7d06e7STim Lunn	status = "okay";
2525d7d06e7STim Lunn	clock-frequency = <400000>;
2535d7d06e7STim Lunn
2545d7d06e7STim Lunn	pcf8563: rtc@51 {
2555d7d06e7STim Lunn		compatible = "nxp,pcf8563";
2565d7d06e7STim Lunn		reg = <0x51>;
2575d7d06e7STim Lunn		#clock-cells = <0>;
2585d7d06e7STim Lunn		interrupt-parent = <&gpio0>;
2595d7d06e7STim Lunn		interrupts = <RK_PA2 IRQ_TYPE_LEVEL_LOW>;
2605d7d06e7STim Lunn		clock-output-names = "xin32k";
2615d7d06e7STim Lunn	};
2625d7d06e7STim Lunn};
2635d7d06e7STim Lunn
2645d7d06e7STim Lunn&gmac {
2655d7d06e7STim Lunn	assigned-clocks = <&cru CLK_GMAC_SRC_M1>, <&cru CLK_GMAC_SRC>,
2665d7d06e7STim Lunn			  <&cru CLK_GMAC_TX_RX>;
2675d7d06e7STim Lunn	assigned-clock-parents = <&cru CLK_GMAC_RGMII_M1>, <&cru CLK_GMAC_SRC_M1>,
2685d7d06e7STim Lunn				 <&cru RMII_MODE_CLK>;
2695d7d06e7STim Lunn	assigned-clock-rates = <0>, <50000000>;
2705d7d06e7STim Lunn	clock_in_out = "output";
2715d7d06e7STim Lunn	phy-handle = <&phy>;
2725d7d06e7STim Lunn	phy-mode = "rmii";
2735d7d06e7STim Lunn	phy-supply = <&vcc_3v3>;
2745d7d06e7STim Lunn	pinctrl-names = "default";
2755d7d06e7STim Lunn	pinctrl-0 = <&rgmiim1_miim &rgmiim1_rxer &rgmiim1_bus2 &rgmiim1_mclkinout>;
2765d7d06e7STim Lunn	status = "okay";
2775d7d06e7STim Lunn};
2785d7d06e7STim Lunn
2795d7d06e7STim Lunn&mdio {
2805d7d06e7STim Lunn	phy: ethernet-phy@0 {
2815d7d06e7STim Lunn		compatible = "ethernet-phy-ieee802.3-c22";
2825d7d06e7STim Lunn		reg = <0x0>;
2835d7d06e7STim Lunn		pinctrl-names = "default";
2845d7d06e7STim Lunn		pinctrl-0 = <&eth_phy_rst>;
2855d7d06e7STim Lunn		reset-active-low;
2865d7d06e7STim Lunn		reset-assert-us = <50000>;
2875d7d06e7STim Lunn		reset-deassert-us = <10000>;
2885d7d06e7STim Lunn		reset-gpios = <&gpio2 RK_PA6 GPIO_ACTIVE_LOW>;
2895d7d06e7STim Lunn	};
2905d7d06e7STim Lunn};
2915d7d06e7STim Lunn
2925d7d06e7STim Lunn&pinctrl {
2935d7d06e7STim Lunn	ethernet {
2945d7d06e7STim Lunn		eth_phy_rst: eth-phy-rst {
2955d7d06e7STim Lunn			rockchip,pins = <2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_down>;
2965d7d06e7STim Lunn		};
2975d7d06e7STim Lunn	};
2985d7d06e7STim Lunn	bt {
2995d7d06e7STim Lunn		bt_enable: bt-enable {
3005d7d06e7STim Lunn			rockchip,pins = <1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
3015d7d06e7STim Lunn		};
3025d7d06e7STim Lunn
3035d7d06e7STim Lunn		bt_wake_dev: bt-wake-dev {
3045d7d06e7STim Lunn			rockchip,pins = <1 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
3055d7d06e7STim Lunn		};
3065d7d06e7STim Lunn
3075d7d06e7STim Lunn		bt_wake_host: bt-wake-host {
3085d7d06e7STim Lunn			rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
3095d7d06e7STim Lunn		};
3105d7d06e7STim Lunn	};
3115d7d06e7STim Lunn
3125d7d06e7STim Lunn	pmic {
3135d7d06e7STim Lunn		pmic_int_l: pmic-int-l {
3145d7d06e7STim Lunn			rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>;
3155d7d06e7STim Lunn		};
3165d7d06e7STim Lunn	};
3175d7d06e7STim Lunn
3185d7d06e7STim Lunn	wifi {
3195d7d06e7STim Lunn		wifi_enable_h: wifi-enable-h {
3205d7d06e7STim Lunn			rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>;
3215d7d06e7STim Lunn		};
3225d7d06e7STim Lunn	};
3235d7d06e7STim Lunn};
3245d7d06e7STim Lunn
3255d7d06e7STim Lunn&pmu_io_domains {
3265d7d06e7STim Lunn	pmuio0-supply = <&vcc1v8_pmu>;
3275d7d06e7STim Lunn	pmuio1-supply = <&vcc3v3_sys>;
3285d7d06e7STim Lunn	vccio1-supply = <&vcc_1v8>;
3295d7d06e7STim Lunn	vccio2-supply = <&vccio_sd>;
330*391f46c7STim Lunn	vccio3-supply = <&vcc3v3_sd>;
3315d7d06e7STim Lunn	vccio4-supply = <&vcc_dovdd>;
3325d7d06e7STim Lunn	vccio5-supply = <&vcc_1v8>;
3335d7d06e7STim Lunn	vccio6-supply = <&vcc_1v8>;
3345d7d06e7STim Lunn	vccio7-supply = <&vcc_dovdd>;
3355d7d06e7STim Lunn	status = "okay";
3365d7d06e7STim Lunn};
3375d7d06e7STim Lunn
3385d7d06e7STim Lunn&saradc {
3395d7d06e7STim Lunn	vref-supply = <&vcc_1v8>;
3405d7d06e7STim Lunn	status = "okay";
3415d7d06e7STim Lunn};
3425d7d06e7STim Lunn
3435d7d06e7STim Lunn&sdio {
3445d7d06e7STim Lunn	bus-width = <4>;
3455d7d06e7STim Lunn	cap-sd-highspeed;
3465d7d06e7STim Lunn	cap-sdio-irq;
3475d7d06e7STim Lunn	keep-power-in-suspend;
348*391f46c7STim Lunn	max-frequency = <50000000>;
3495d7d06e7STim Lunn	mmc-pwrseq = <&sdio_pwrseq>;
3505d7d06e7STim Lunn	non-removable;
3515d7d06e7STim Lunn	pinctrl-names = "default";
3525d7d06e7STim Lunn	pinctrl-0 = <&sdmmc1_clk &sdmmc1_cmd &sdmmc1_bus4>;
3535d7d06e7STim Lunn	rockchip,default-sample-phase = <90>;
354*391f46c7STim Lunn	sd-uhs-sdr50;
355*391f46c7STim Lunn	vmmc-supply = <&vcc3v3_sd>;
3565d7d06e7STim Lunn	vqmmc-supply = <&vcc_1v8>;
3575d7d06e7STim Lunn	status = "okay";
3585d7d06e7STim Lunn};
3595d7d06e7STim Lunn
3605d7d06e7STim Lunn&sdmmc {
3615d7d06e7STim Lunn	bus-width = <4>;
3625d7d06e7STim Lunn	cap-mmc-highspeed;
3635d7d06e7STim Lunn	cap-sd-highspeed;
3645d7d06e7STim Lunn	card-detect-delay = <200>;
3655d7d06e7STim Lunn	pinctrl-names = "default";
3665d7d06e7STim Lunn	pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_bus4 &sdmmc0_det>;
3675d7d06e7STim Lunn	rockchip,default-sample-phase = <90>;
3685d7d06e7STim Lunn	sd-uhs-sdr12;
3695d7d06e7STim Lunn	sd-uhs-sdr25;
3705d7d06e7STim Lunn	sd-uhs-sdr104;
3715d7d06e7STim Lunn	vqmmc-supply = <&vccio_sd>;
3725d7d06e7STim Lunn	status = "okay";
3735d7d06e7STim Lunn};
3745d7d06e7STim Lunn
3755d7d06e7STim Lunn&uart0 {
3765d7d06e7STim Lunn	pinctrl-names = "default";
3775d7d06e7STim Lunn	pinctrl-0 = <&uart0_xfer &uart0_ctsn &uart0_rtsn>;
3785d7d06e7STim Lunn	uart-has-rtscts;
3795d7d06e7STim Lunn	status = "okay";
3805d7d06e7STim Lunn
3815d7d06e7STim Lunn	bluetooth {
3825d7d06e7STim Lunn		compatible = "realtek,rtl8723ds-bt";
3835d7d06e7STim Lunn		device-wake-gpios = <&gpio1 RK_PC7 GPIO_ACTIVE_HIGH>; /* BT_WAKE */
3845d7d06e7STim Lunn		enable-gpios = <&gpio1 RK_PC6 GPIO_ACTIVE_HIGH>; /* BT_RST */
3855d7d06e7STim Lunn		host-wake-gpios = <&gpio1 RK_PC5 GPIO_ACTIVE_HIGH>; /* BT_WAKE_HOST */
3865d7d06e7STim Lunn		max-speed = <2000000>;
3875d7d06e7STim Lunn		pinctrl-names = "default";
3885d7d06e7STim Lunn		pinctrl-0 = <&bt_enable>, <&bt_wake_dev>, <&bt_wake_host>;
3895d7d06e7STim Lunn	};
3905d7d06e7STim Lunn};
3915d7d06e7STim Lunn
3925d7d06e7STim Lunn&uart2 {
3935d7d06e7STim Lunn	status = "okay";
3945d7d06e7STim Lunn};
3955d7d06e7STim Lunn
3965d7d06e7STim Lunn&uart3 {
3975d7d06e7STim Lunn	pinctrl-names = "default";
3985d7d06e7STim Lunn	pinctrl-0 = <&uart3m2_xfer>;
3995d7d06e7STim Lunn	status = "okay";
4005d7d06e7STim Lunn};
4015d7d06e7STim Lunn
4025d7d06e7STim Lunn&uart4 {
4035d7d06e7STim Lunn	pinctrl-names = "default";
4045d7d06e7STim Lunn	pinctrl-0 = <&uart4m2_xfer>;
4055d7d06e7STim Lunn	status = "okay";
4065d7d06e7STim Lunn};
407