xref: /linux/arch/arm/boot/dts/rockchip/rk3128.dtsi (revision c96b13d7c0e494e1072648301e61e13a2a85a362)
1724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0+
2724ba675SRob Herring/*
3724ba675SRob Herring * (C) Copyright 2017 Rockchip Electronics Co., Ltd
4724ba675SRob Herring */
5724ba675SRob Herring
6724ba675SRob Herring#include <dt-bindings/clock/rk3128-cru.h>
7724ba675SRob Herring#include <dt-bindings/gpio/gpio.h>
8724ba675SRob Herring#include <dt-bindings/interrupt-controller/arm-gic.h>
9724ba675SRob Herring#include <dt-bindings/interrupt-controller/irq.h>
10724ba675SRob Herring#include <dt-bindings/pinctrl/rockchip.h>
11724ba675SRob Herring
12724ba675SRob Herring/ {
13724ba675SRob Herring	compatible = "rockchip,rk3128";
14724ba675SRob Herring	interrupt-parent = <&gic>;
15724ba675SRob Herring	#address-cells = <1>;
16724ba675SRob Herring	#size-cells = <1>;
17724ba675SRob Herring
18724ba675SRob Herring	arm-pmu {
19724ba675SRob Herring		compatible = "arm,cortex-a7-pmu";
20724ba675SRob Herring		interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>,
21724ba675SRob Herring			     <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>,
22724ba675SRob Herring			     <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>,
23724ba675SRob Herring			     <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
24724ba675SRob Herring		interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
25724ba675SRob Herring	};
26724ba675SRob Herring
27724ba675SRob Herring	cpus {
28724ba675SRob Herring		#address-cells = <1>;
29724ba675SRob Herring		#size-cells = <0>;
30da8b9739SAlex Bee		enable-method = "rockchip,rk3036-smp";
31724ba675SRob Herring
32724ba675SRob Herring		cpu0: cpu@f00 {
33724ba675SRob Herring			device_type = "cpu";
34724ba675SRob Herring			compatible = "arm,cortex-a7";
35724ba675SRob Herring			reg = <0xf00>;
36724ba675SRob Herring			clock-latency = <40000>;
37724ba675SRob Herring			clocks = <&cru ARMCLK>;
3802941bc2SAlex Bee			resets = <&cru SRST_CORE0>;
39*c96b13d7SAlex Bee			operating-points-v2 = <&cpu_opp_table>;
40724ba675SRob Herring			#cooling-cells = <2>; /* min followed by max */
41724ba675SRob Herring		};
42724ba675SRob Herring
43724ba675SRob Herring		cpu1: cpu@f01 {
44724ba675SRob Herring			device_type = "cpu";
45724ba675SRob Herring			compatible = "arm,cortex-a7";
46724ba675SRob Herring			reg = <0xf01>;
4702941bc2SAlex Bee			resets = <&cru SRST_CORE1>;
48*c96b13d7SAlex Bee			operating-points-v2 = <&cpu_opp_table>;
49724ba675SRob Herring		};
50724ba675SRob Herring
51724ba675SRob Herring		cpu2: cpu@f02 {
52724ba675SRob Herring			device_type = "cpu";
53724ba675SRob Herring			compatible = "arm,cortex-a7";
54724ba675SRob Herring			reg = <0xf02>;
5502941bc2SAlex Bee			resets = <&cru SRST_CORE2>;
56*c96b13d7SAlex Bee			operating-points-v2 = <&cpu_opp_table>;
57724ba675SRob Herring		};
58724ba675SRob Herring
59724ba675SRob Herring		cpu3: cpu@f03 {
60724ba675SRob Herring			device_type = "cpu";
61724ba675SRob Herring			compatible = "arm,cortex-a7";
62724ba675SRob Herring			reg = <0xf03>;
6302941bc2SAlex Bee			resets = <&cru SRST_CORE3>;
64*c96b13d7SAlex Bee			operating-points-v2 = <&cpu_opp_table>;
65*c96b13d7SAlex Bee		};
66*c96b13d7SAlex Bee	};
67*c96b13d7SAlex Bee
68*c96b13d7SAlex Bee	cpu_opp_table: opp-table-0 {
69*c96b13d7SAlex Bee		compatible = "operating-points-v2";
70*c96b13d7SAlex Bee		opp-shared;
71*c96b13d7SAlex Bee
72*c96b13d7SAlex Bee		opp-216000000 {
73*c96b13d7SAlex Bee			opp-hz = /bits/ 64 <216000000>;
74*c96b13d7SAlex Bee			opp-microvolt = <950000 950000 1325000>;
75*c96b13d7SAlex Bee		};
76*c96b13d7SAlex Bee		opp-408000000 {
77*c96b13d7SAlex Bee			opp-hz = /bits/ 64 <408000000>;
78*c96b13d7SAlex Bee			opp-microvolt = <950000 950000 1325000>;
79*c96b13d7SAlex Bee		};
80*c96b13d7SAlex Bee		opp-600000000 {
81*c96b13d7SAlex Bee			opp-hz = /bits/ 64 <600000000>;
82*c96b13d7SAlex Bee			opp-microvolt = <950000 950000 1325000>;
83*c96b13d7SAlex Bee		};
84*c96b13d7SAlex Bee		opp-696000000 {
85*c96b13d7SAlex Bee			opp-hz = /bits/ 64 <696000000>;
86*c96b13d7SAlex Bee			opp-microvolt = <975000 975000 1325000>;
87*c96b13d7SAlex Bee		};
88*c96b13d7SAlex Bee		opp-816000000 {
89*c96b13d7SAlex Bee			opp-hz = /bits/ 64 <816000000>;
90*c96b13d7SAlex Bee			opp-microvolt = <1075000 1075000 1325000>;
91*c96b13d7SAlex Bee			opp-suspend;
92*c96b13d7SAlex Bee		};
93*c96b13d7SAlex Bee		opp-1008000000 {
94*c96b13d7SAlex Bee			opp-hz = /bits/ 64 <1008000000>;
95*c96b13d7SAlex Bee			opp-microvolt = <1200000 1200000 1325000>;
96*c96b13d7SAlex Bee		};
97*c96b13d7SAlex Bee		opp-1200000000 {
98*c96b13d7SAlex Bee			opp-hz = /bits/ 64 <1200000000>;
99*c96b13d7SAlex Bee			opp-microvolt = <1325000 1325000 1325000>;
100724ba675SRob Herring		};
101724ba675SRob Herring	};
102724ba675SRob Herring
103724ba675SRob Herring	timer {
104724ba675SRob Herring		compatible = "arm,armv7-timer";
105724ba675SRob Herring		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
106724ba675SRob Herring			     <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
107724ba675SRob Herring			     <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
108724ba675SRob Herring		arm,cpu-registers-not-fw-configured;
109724ba675SRob Herring		clock-frequency = <24000000>;
110724ba675SRob Herring	};
111724ba675SRob Herring
112724ba675SRob Herring	xin24m: oscillator {
113724ba675SRob Herring		compatible = "fixed-clock";
114724ba675SRob Herring		clock-frequency = <24000000>;
115724ba675SRob Herring		clock-output-names = "xin24m";
116724ba675SRob Herring		#clock-cells = <0>;
117724ba675SRob Herring	};
118724ba675SRob Herring
1199107283bSAlex Bee	imem: sram@10080000 {
1209107283bSAlex Bee		compatible = "mmio-sram";
1219107283bSAlex Bee		reg = <0x10080000 0x2000>;
1229107283bSAlex Bee		#address-cells = <1>;
1239107283bSAlex Bee		#size-cells = <1>;
1249107283bSAlex Bee		ranges = <0 0x10080000 0x2000>;
125da8b9739SAlex Bee
126da8b9739SAlex Bee		smp-sram@0 {
127da8b9739SAlex Bee			compatible = "rockchip,rk3066-smp-sram";
128da8b9739SAlex Bee			reg = <0x00 0x10>;
129da8b9739SAlex Bee		};
1309107283bSAlex Bee	};
1319107283bSAlex Bee
132724ba675SRob Herring	pmu: syscon@100a0000 {
133724ba675SRob Herring		compatible = "rockchip,rk3128-pmu", "syscon", "simple-mfd";
134724ba675SRob Herring		reg = <0x100a0000 0x1000>;
135724ba675SRob Herring	};
136724ba675SRob Herring
137724ba675SRob Herring	gic: interrupt-controller@10139000 {
138724ba675SRob Herring		compatible = "arm,cortex-a7-gic";
139724ba675SRob Herring		reg = <0x10139000 0x1000>,
140724ba675SRob Herring		      <0x1013a000 0x1000>,
141724ba675SRob Herring		      <0x1013c000 0x2000>,
142724ba675SRob Herring		      <0x1013e000 0x2000>;
143724ba675SRob Herring		interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
144724ba675SRob Herring		interrupt-controller;
145724ba675SRob Herring		#interrupt-cells = <3>;
146724ba675SRob Herring		#address-cells = <0>;
147724ba675SRob Herring	};
148724ba675SRob Herring
149724ba675SRob Herring	usb_otg: usb@10180000 {
150724ba675SRob Herring		compatible = "rockchip,rk3128-usb", "rockchip,rk3066-usb", "snps,dwc2";
151724ba675SRob Herring		reg = <0x10180000 0x40000>;
152724ba675SRob Herring		interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
153724ba675SRob Herring		clocks = <&cru HCLK_OTG>;
154724ba675SRob Herring		clock-names = "otg";
155724ba675SRob Herring		dr_mode = "otg";
156724ba675SRob Herring		phys = <&usb2phy_otg>;
157724ba675SRob Herring		phy-names = "usb2-phy";
158724ba675SRob Herring		status = "disabled";
159724ba675SRob Herring	};
160724ba675SRob Herring
161724ba675SRob Herring	usb_host_ehci: usb@101c0000 {
162724ba675SRob Herring		compatible = "generic-ehci";
163724ba675SRob Herring		reg = <0x101c0000 0x20000>;
164724ba675SRob Herring		interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
165724ba675SRob Herring		phys = <&usb2phy_host>;
166724ba675SRob Herring		phy-names = "usb";
167724ba675SRob Herring		status = "disabled";
168724ba675SRob Herring	};
169724ba675SRob Herring
170724ba675SRob Herring	usb_host_ohci: usb@101e0000 {
171724ba675SRob Herring		compatible = "generic-ohci";
172724ba675SRob Herring		reg = <0x101e0000 0x20000>;
173724ba675SRob Herring		interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
174724ba675SRob Herring		phys = <&usb2phy_host>;
175724ba675SRob Herring		phy-names = "usb";
176724ba675SRob Herring		status = "disabled";
177724ba675SRob Herring	};
178724ba675SRob Herring
179724ba675SRob Herring	sdmmc: mmc@10214000 {
180724ba675SRob Herring		compatible = "rockchip,rk3128-dw-mshc", "rockchip,rk3288-dw-mshc";
181724ba675SRob Herring		reg = <0x10214000 0x4000>;
182724ba675SRob Herring		interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
183724ba675SRob Herring		clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>,
184724ba675SRob Herring			 <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
185724ba675SRob Herring		clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
186724ba675SRob Herring		dmas = <&pdma 10>;
187724ba675SRob Herring		dma-names = "rx-tx";
188724ba675SRob Herring		fifo-depth = <256>;
189724ba675SRob Herring		max-frequency = <150000000>;
190724ba675SRob Herring		resets = <&cru SRST_SDMMC>;
191724ba675SRob Herring		reset-names = "reset";
192724ba675SRob Herring		status = "disabled";
193724ba675SRob Herring	};
194724ba675SRob Herring
195724ba675SRob Herring	sdio: mmc@10218000 {
196724ba675SRob Herring		compatible = "rockchip,rk3128-dw-mshc", "rockchip,rk3288-dw-mshc";
197724ba675SRob Herring		reg = <0x10218000 0x4000>;
198724ba675SRob Herring		interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
199724ba675SRob Herring		clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>,
200724ba675SRob Herring			 <&cru SCLK_SDIO_DRV>, <&cru SCLK_SDIO_SAMPLE>;
201724ba675SRob Herring		clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
202724ba675SRob Herring		dmas = <&pdma 11>;
203724ba675SRob Herring		dma-names = "rx-tx";
204724ba675SRob Herring		fifo-depth = <256>;
205724ba675SRob Herring		max-frequency = <150000000>;
206724ba675SRob Herring		resets = <&cru SRST_SDIO>;
207724ba675SRob Herring		reset-names = "reset";
208724ba675SRob Herring		status = "disabled";
209724ba675SRob Herring	};
210724ba675SRob Herring
211724ba675SRob Herring	emmc: mmc@1021c000 {
212724ba675SRob Herring		compatible = "rockchip,rk3128-dw-mshc", "rockchip,rk3288-dw-mshc";
213724ba675SRob Herring		reg = <0x1021c000 0x4000>;
214724ba675SRob Herring		interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
215724ba675SRob Herring		clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>,
216724ba675SRob Herring			 <&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>;
217724ba675SRob Herring		clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
218724ba675SRob Herring		dmas = <&pdma 12>;
219724ba675SRob Herring		dma-names = "rx-tx";
220724ba675SRob Herring		fifo-depth = <256>;
221724ba675SRob Herring		max-frequency = <150000000>;
222724ba675SRob Herring		resets = <&cru SRST_EMMC>;
223724ba675SRob Herring		reset-names = "reset";
224724ba675SRob Herring		status = "disabled";
225724ba675SRob Herring	};
226724ba675SRob Herring
227724ba675SRob Herring	nfc: nand-controller@10500000 {
228724ba675SRob Herring		compatible = "rockchip,rk3128-nfc", "rockchip,rk2928-nfc";
229724ba675SRob Herring		reg = <0x10500000 0x4000>;
230724ba675SRob Herring		interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
231724ba675SRob Herring		clocks = <&cru HCLK_NANDC>, <&cru SCLK_NANDC>;
232724ba675SRob Herring		clock-names = "ahb", "nfc";
233724ba675SRob Herring		pinctrl-names = "default";
234724ba675SRob Herring		pinctrl-0 = <&flash_ale &flash_bus8 &flash_cle &flash_cs0
235724ba675SRob Herring			     &flash_dqs &flash_rdn &flash_rdy &flash_wrn>;
236724ba675SRob Herring		status = "disabled";
237724ba675SRob Herring	};
238724ba675SRob Herring
239724ba675SRob Herring	cru: clock-controller@20000000 {
240724ba675SRob Herring		compatible = "rockchip,rk3128-cru";
241724ba675SRob Herring		reg = <0x20000000 0x1000>;
242724ba675SRob Herring		clocks = <&xin24m>;
243724ba675SRob Herring		clock-names = "xin24m";
244724ba675SRob Herring		rockchip,grf = <&grf>;
245724ba675SRob Herring		#clock-cells = <1>;
246724ba675SRob Herring		#reset-cells = <1>;
247724ba675SRob Herring		assigned-clocks = <&cru PLL_GPLL>;
248724ba675SRob Herring		assigned-clock-rates = <594000000>;
249724ba675SRob Herring	};
250724ba675SRob Herring
251724ba675SRob Herring	grf: syscon@20008000 {
252724ba675SRob Herring		compatible = "rockchip,rk3128-grf", "syscon", "simple-mfd";
253724ba675SRob Herring		reg = <0x20008000 0x1000>;
254724ba675SRob Herring		#address-cells = <1>;
255724ba675SRob Herring		#size-cells = <1>;
256724ba675SRob Herring
257724ba675SRob Herring		usb2phy: usb2phy@17c {
258724ba675SRob Herring			compatible = "rockchip,rk3128-usb2phy";
259724ba675SRob Herring			reg = <0x017c 0x0c>;
260724ba675SRob Herring			clocks = <&cru SCLK_OTGPHY0>;
261724ba675SRob Herring			clock-names = "phyclk";
262724ba675SRob Herring			clock-output-names = "usb480m_phy";
263724ba675SRob Herring			#clock-cells = <0>;
264724ba675SRob Herring			status = "disabled";
265724ba675SRob Herring
266724ba675SRob Herring			usb2phy_host: host-port {
267724ba675SRob Herring				interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
268724ba675SRob Herring				interrupt-names = "linestate";
269724ba675SRob Herring				#phy-cells = <0>;
270724ba675SRob Herring				status = "disabled";
271724ba675SRob Herring			};
272724ba675SRob Herring
273724ba675SRob Herring			usb2phy_otg: otg-port {
274724ba675SRob Herring				interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>,
275724ba675SRob Herring					     <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
276724ba675SRob Herring					     <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
277724ba675SRob Herring				interrupt-names = "otg-bvalid", "otg-id",
278724ba675SRob Herring						  "linestate";
279724ba675SRob Herring				#phy-cells = <0>;
280724ba675SRob Herring				status = "disabled";
281724ba675SRob Herring			};
282724ba675SRob Herring		};
283724ba675SRob Herring	};
284724ba675SRob Herring
285724ba675SRob Herring	timer0: timer@20044000 {
286724ba675SRob Herring		compatible = "rockchip,rk3128-timer", "rockchip,rk3288-timer";
287724ba675SRob Herring		reg = <0x20044000 0x20>;
288724ba675SRob Herring		interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
289724ba675SRob Herring		clocks = <&cru PCLK_TIMER>, <&xin24m>;
290724ba675SRob Herring		clock-names = "pclk", "timer";
291724ba675SRob Herring	};
292724ba675SRob Herring
293724ba675SRob Herring	timer1: timer@20044020 {
294724ba675SRob Herring		compatible = "rockchip,rk3128-timer", "rockchip,rk3288-timer";
295724ba675SRob Herring		reg = <0x20044020 0x20>;
296724ba675SRob Herring		interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
297724ba675SRob Herring		clocks = <&cru PCLK_TIMER>, <&xin24m>;
298724ba675SRob Herring		clock-names = "pclk", "timer";
299724ba675SRob Herring	};
300724ba675SRob Herring
301724ba675SRob Herring	timer2: timer@20044040 {
302724ba675SRob Herring		compatible = "rockchip,rk3128-timer", "rockchip,rk3288-timer";
303724ba675SRob Herring		reg = <0x20044040 0x20>;
304724ba675SRob Herring		interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
305724ba675SRob Herring		clocks = <&cru PCLK_TIMER>, <&xin24m>;
306724ba675SRob Herring		clock-names = "pclk", "timer";
307724ba675SRob Herring	};
308724ba675SRob Herring
309724ba675SRob Herring	timer3: timer@20044060 {
310724ba675SRob Herring		compatible = "rockchip,rk3128-timer", "rockchip,rk3288-timer";
311724ba675SRob Herring		reg = <0x20044060 0x20>;
312724ba675SRob Herring		interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
313724ba675SRob Herring		clocks = <&cru PCLK_TIMER>, <&xin24m>;
314724ba675SRob Herring		clock-names = "pclk", "timer";
315724ba675SRob Herring	};
316724ba675SRob Herring
317724ba675SRob Herring	timer4: timer@20044080 {
318724ba675SRob Herring		compatible = "rockchip,rk3128-timer", "rockchip,rk3288-timer";
319724ba675SRob Herring		reg = <0x20044080 0x20>;
320724ba675SRob Herring		interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
321724ba675SRob Herring		clocks = <&cru PCLK_TIMER>, <&xin24m>;
322724ba675SRob Herring		clock-names = "pclk", "timer";
323724ba675SRob Herring	};
324724ba675SRob Herring
325724ba675SRob Herring	timer5: timer@200440a0 {
326724ba675SRob Herring		compatible = "rockchip,rk3128-timer", "rockchip,rk3288-timer";
327724ba675SRob Herring		reg = <0x200440a0 0x20>;
328724ba675SRob Herring		interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
329724ba675SRob Herring		clocks = <&cru PCLK_TIMER>, <&xin24m>;
330724ba675SRob Herring		clock-names = "pclk", "timer";
331724ba675SRob Herring	};
332724ba675SRob Herring
333724ba675SRob Herring	watchdog: watchdog@2004c000 {
334724ba675SRob Herring		compatible = "rockchip,rk3128-wdt", "snps,dw-wdt";
335724ba675SRob Herring		reg = <0x2004c000 0x100>;
336724ba675SRob Herring		interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
337724ba675SRob Herring		clocks = <&cru PCLK_WDT>;
338724ba675SRob Herring		status = "disabled";
339724ba675SRob Herring	};
340724ba675SRob Herring
341724ba675SRob Herring	pwm0: pwm@20050000 {
342724ba675SRob Herring		compatible = "rockchip,rk3128-pwm", "rockchip,rk3288-pwm";
343724ba675SRob Herring		reg = <0x20050000 0x10>;
344724ba675SRob Herring		clocks = <&cru PCLK_PWM>;
345724ba675SRob Herring		pinctrl-names = "default";
346724ba675SRob Herring		pinctrl-0 = <&pwm0_pin>;
347724ba675SRob Herring		#pwm-cells = <3>;
348724ba675SRob Herring		status = "disabled";
349724ba675SRob Herring	};
350724ba675SRob Herring
351724ba675SRob Herring	pwm1: pwm@20050010 {
352724ba675SRob Herring		compatible = "rockchip,rk3128-pwm", "rockchip,rk3288-pwm";
353724ba675SRob Herring		reg = <0x20050010 0x10>;
354724ba675SRob Herring		clocks = <&cru PCLK_PWM>;
355724ba675SRob Herring		pinctrl-names = "default";
356724ba675SRob Herring		pinctrl-0 = <&pwm1_pin>;
357724ba675SRob Herring		#pwm-cells = <3>;
358724ba675SRob Herring		status = "disabled";
359724ba675SRob Herring	};
360724ba675SRob Herring
361724ba675SRob Herring	pwm2: pwm@20050020 {
362724ba675SRob Herring		compatible = "rockchip,rk3128-pwm", "rockchip,rk3288-pwm";
363724ba675SRob Herring		reg = <0x20050020 0x10>;
364724ba675SRob Herring		clocks = <&cru PCLK_PWM>;
365724ba675SRob Herring		pinctrl-names = "default";
366724ba675SRob Herring		pinctrl-0 = <&pwm2_pin>;
367724ba675SRob Herring		#pwm-cells = <3>;
368724ba675SRob Herring		status = "disabled";
369724ba675SRob Herring	};
370724ba675SRob Herring
371724ba675SRob Herring	pwm3: pwm@20050030 {
372724ba675SRob Herring		compatible = "rockchip,rk3128-pwm", "rockchip,rk3288-pwm";
373724ba675SRob Herring		reg = <0x20050030 0x10>;
374724ba675SRob Herring		clocks = <&cru PCLK_PWM>;
375724ba675SRob Herring		pinctrl-names = "default";
376724ba675SRob Herring		pinctrl-0 = <&pwm3_pin>;
377724ba675SRob Herring		#pwm-cells = <3>;
378724ba675SRob Herring		status = "disabled";
379724ba675SRob Herring	};
380724ba675SRob Herring
381724ba675SRob Herring	i2c1: i2c@20056000 {
382724ba675SRob Herring		compatible = "rockchip,rk3128-i2c", "rockchip,rk3288-i2c";
383724ba675SRob Herring		reg = <0x20056000 0x1000>;
384724ba675SRob Herring		interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
385724ba675SRob Herring		clock-names = "i2c";
386724ba675SRob Herring		clocks = <&cru PCLK_I2C1>;
387724ba675SRob Herring		pinctrl-names = "default";
388724ba675SRob Herring		pinctrl-0 = <&i2c1_xfer>;
389724ba675SRob Herring		#address-cells = <1>;
390724ba675SRob Herring		#size-cells = <0>;
391724ba675SRob Herring		status = "disabled";
392724ba675SRob Herring	};
393724ba675SRob Herring
394724ba675SRob Herring	i2c2: i2c@2005a000 {
395724ba675SRob Herring		compatible = "rockchip,rk3128-i2c", "rockchip,rk3288-i2c";
396724ba675SRob Herring		reg = <0x2005a000 0x1000>;
397724ba675SRob Herring		interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
398724ba675SRob Herring		clock-names = "i2c";
399724ba675SRob Herring		clocks = <&cru PCLK_I2C2>;
400724ba675SRob Herring		pinctrl-names = "default";
401724ba675SRob Herring		pinctrl-0 = <&i2c2_xfer>;
402724ba675SRob Herring		#address-cells = <1>;
403724ba675SRob Herring		#size-cells = <0>;
404724ba675SRob Herring		status = "disabled";
405724ba675SRob Herring	};
406724ba675SRob Herring
407724ba675SRob Herring	i2c3: i2c@2005e000 {
408724ba675SRob Herring		compatible = "rockchip,rk3128-i2c", "rockchip,rk3288-i2c";
409724ba675SRob Herring		reg = <0x2005e000 0x1000>;
410724ba675SRob Herring		interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
411724ba675SRob Herring		clock-names = "i2c";
412724ba675SRob Herring		clocks = <&cru PCLK_I2C3>;
413724ba675SRob Herring		pinctrl-names = "default";
414724ba675SRob Herring		pinctrl-0 = <&i2c3_xfer>;
415724ba675SRob Herring		#address-cells = <1>;
416724ba675SRob Herring		#size-cells = <0>;
417724ba675SRob Herring		status = "disabled";
418724ba675SRob Herring	};
419724ba675SRob Herring
420724ba675SRob Herring	uart0: serial@20060000 {
421724ba675SRob Herring		compatible = "rockchip,rk3128-uart", "snps,dw-apb-uart";
422724ba675SRob Herring		reg = <0x20060000 0x100>;
423724ba675SRob Herring		interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
424724ba675SRob Herring		clock-frequency = <24000000>;
425724ba675SRob Herring		clocks = <&cru SCLK_UART0>, <&cru PCLK_UART0>;
426724ba675SRob Herring		clock-names = "baudclk", "apb_pclk";
427724ba675SRob Herring		dmas = <&pdma 2>, <&pdma 3>;
428724ba675SRob Herring		dma-names = "tx", "rx";
429724ba675SRob Herring		pinctrl-names = "default";
430724ba675SRob Herring		pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
431724ba675SRob Herring		reg-io-width = <4>;
432724ba675SRob Herring		reg-shift = <2>;
433724ba675SRob Herring		status = "disabled";
434724ba675SRob Herring	};
435724ba675SRob Herring
436724ba675SRob Herring	uart1: serial@20064000 {
437724ba675SRob Herring		compatible = "rockchip,rk3128-uart", "snps,dw-apb-uart";
438724ba675SRob Herring		reg = <0x20064000 0x100>;
439724ba675SRob Herring		interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
440724ba675SRob Herring		clock-frequency = <24000000>;
441724ba675SRob Herring		clocks = <&cru SCLK_UART1>, <&cru PCLK_UART1>;
442724ba675SRob Herring		clock-names = "baudclk", "apb_pclk";
443724ba675SRob Herring		dmas = <&pdma 4>, <&pdma 5>;
444724ba675SRob Herring		dma-names = "tx", "rx";
445724ba675SRob Herring		pinctrl-names = "default";
446724ba675SRob Herring		pinctrl-0 = <&uart1_xfer>;
447724ba675SRob Herring		reg-io-width = <4>;
448724ba675SRob Herring		reg-shift = <2>;
449724ba675SRob Herring		status = "disabled";
450724ba675SRob Herring	};
451724ba675SRob Herring
452724ba675SRob Herring	uart2: serial@20068000 {
453724ba675SRob Herring		compatible = "rockchip,rk3128-uart", "snps,dw-apb-uart";
454724ba675SRob Herring		reg = <0x20068000 0x100>;
455724ba675SRob Herring		interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
456724ba675SRob Herring		clock-frequency = <24000000>;
457724ba675SRob Herring		clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>;
458724ba675SRob Herring		clock-names = "baudclk", "apb_pclk";
459724ba675SRob Herring		dmas = <&pdma 6>, <&pdma 7>;
460724ba675SRob Herring		dma-names = "tx", "rx";
461724ba675SRob Herring		pinctrl-names = "default";
462724ba675SRob Herring		pinctrl-0 = <&uart2_xfer>;
463724ba675SRob Herring		reg-io-width = <4>;
464724ba675SRob Herring		reg-shift = <2>;
465724ba675SRob Herring		status = "disabled";
466724ba675SRob Herring	};
467724ba675SRob Herring
468724ba675SRob Herring	saradc: saradc@2006c000 {
469724ba675SRob Herring		compatible = "rockchip,saradc";
470724ba675SRob Herring		reg = <0x2006c000 0x100>;
471724ba675SRob Herring		interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
472724ba675SRob Herring		clocks = <&cru SCLK_SARADC>, <&cru PCLK_SARADC>;
473724ba675SRob Herring		clock-names = "saradc", "apb_pclk";
474724ba675SRob Herring		resets = <&cru SRST_SARADC>;
475724ba675SRob Herring		reset-names = "saradc-apb";
476724ba675SRob Herring		#io-channel-cells = <1>;
477724ba675SRob Herring		status = "disabled";
478724ba675SRob Herring	};
479724ba675SRob Herring
480724ba675SRob Herring	i2c0: i2c@20072000 {
481724ba675SRob Herring		compatible = "rockchip,rk3128-i2c", "rockchip,rk3288-i2c";
482724ba675SRob Herring		reg = <20072000 0x1000>;
483724ba675SRob Herring		interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
484724ba675SRob Herring		clock-names = "i2c";
485724ba675SRob Herring		clocks = <&cru PCLK_I2C0>;
486724ba675SRob Herring		pinctrl-names = "default";
487724ba675SRob Herring		pinctrl-0 = <&i2c0_xfer>;
488724ba675SRob Herring		#address-cells = <1>;
489724ba675SRob Herring		#size-cells = <0>;
490724ba675SRob Herring		status = "disabled";
491724ba675SRob Herring	};
492724ba675SRob Herring
493724ba675SRob Herring	spi0: spi@20074000 {
494724ba675SRob Herring		compatible = "rockchip,rk3128-spi", "rockchip,rk3066-spi";
495724ba675SRob Herring		reg = <0x20074000 0x1000>;
496724ba675SRob Herring		interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
497724ba675SRob Herring		clocks = <&cru SCLK_SPI0>, <&cru PCLK_SPI0>;
498724ba675SRob Herring		clock-names = "spiclk", "apb_pclk";
499724ba675SRob Herring		dmas = <&pdma 8>, <&pdma 9>;
500724ba675SRob Herring		dma-names = "tx", "rx";
501724ba675SRob Herring		pinctrl-names = "default";
502724ba675SRob Herring		pinctrl-0 = <&spi0_tx &spi0_rx &spi0_clk &spi0_cs0 &spi0_cs1>;
503724ba675SRob Herring		#address-cells = <1>;
504724ba675SRob Herring		#size-cells = <0>;
505724ba675SRob Herring		status = "disabled";
506724ba675SRob Herring	};
507724ba675SRob Herring
508724ba675SRob Herring	pdma: dma-controller@20078000 {
509724ba675SRob Herring		compatible = "arm,pl330", "arm,primecell";
510724ba675SRob Herring		reg = <0x20078000 0x4000>;
511724ba675SRob Herring		interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
512724ba675SRob Herring			     <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
513724ba675SRob Herring		arm,pl330-broken-no-flushp;
514724ba675SRob Herring		clocks = <&cru ACLK_DMAC>;
515724ba675SRob Herring		clock-names = "apb_pclk";
516724ba675SRob Herring		#dma-cells = <1>;
517724ba675SRob Herring	};
518724ba675SRob Herring
519724ba675SRob Herring	pinctrl: pinctrl {
520724ba675SRob Herring		compatible = "rockchip,rk3128-pinctrl";
521724ba675SRob Herring		rockchip,grf = <&grf>;
522724ba675SRob Herring		#address-cells = <1>;
523724ba675SRob Herring		#size-cells = <1>;
524724ba675SRob Herring		ranges;
525724ba675SRob Herring
526724ba675SRob Herring		gpio0: gpio@2007c000 {
527724ba675SRob Herring			compatible = "rockchip,gpio-bank";
528724ba675SRob Herring			reg = <0x2007c000 0x100>;
529724ba675SRob Herring			interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
530724ba675SRob Herring			clocks = <&cru PCLK_GPIO0>;
531724ba675SRob Herring			gpio-controller;
532724ba675SRob Herring			#gpio-cells = <2>;
533724ba675SRob Herring			interrupt-controller;
534724ba675SRob Herring			#interrupt-cells = <2>;
535724ba675SRob Herring		};
536724ba675SRob Herring
537724ba675SRob Herring		gpio1: gpio@20080000 {
538724ba675SRob Herring			compatible = "rockchip,gpio-bank";
539724ba675SRob Herring			reg = <0x20080000 0x100>;
540724ba675SRob Herring			interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
541724ba675SRob Herring			clocks = <&cru PCLK_GPIO1>;
542724ba675SRob Herring			gpio-controller;
543724ba675SRob Herring			#gpio-cells = <2>;
544724ba675SRob Herring			interrupt-controller;
545724ba675SRob Herring			#interrupt-cells = <2>;
546724ba675SRob Herring		};
547724ba675SRob Herring
548724ba675SRob Herring		gpio2: gpio@20084000 {
549724ba675SRob Herring			compatible = "rockchip,gpio-bank";
550724ba675SRob Herring			reg = <0x20084000 0x100>;
551724ba675SRob Herring			interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
552724ba675SRob Herring			clocks = <&cru PCLK_GPIO2>;
553724ba675SRob Herring			gpio-controller;
554724ba675SRob Herring			#gpio-cells = <2>;
555724ba675SRob Herring			interrupt-controller;
556724ba675SRob Herring			#interrupt-cells = <2>;
557724ba675SRob Herring		};
558724ba675SRob Herring
559724ba675SRob Herring		gpio3: gpio@20088000 {
560724ba675SRob Herring			compatible = "rockchip,gpio-bank";
561724ba675SRob Herring			reg = <0x20088000 0x100>;
562724ba675SRob Herring			interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
563724ba675SRob Herring			clocks = <&cru PCLK_GPIO3>;
564724ba675SRob Herring			gpio-controller;
565724ba675SRob Herring			#gpio-cells = <2>;
566724ba675SRob Herring			interrupt-controller;
567724ba675SRob Herring			#interrupt-cells = <2>;
568724ba675SRob Herring		};
569724ba675SRob Herring
570724ba675SRob Herring		pcfg_pull_default: pcfg-pull-default {
571724ba675SRob Herring			bias-pull-pin-default;
572724ba675SRob Herring		};
573724ba675SRob Herring
574724ba675SRob Herring		pcfg_pull_none: pcfg-pull-none {
575724ba675SRob Herring			bias-disable;
576724ba675SRob Herring		};
577724ba675SRob Herring
578724ba675SRob Herring		emmc {
579724ba675SRob Herring			emmc_clk: emmc-clk {
580724ba675SRob Herring				rockchip,pins = <2 RK_PA7 2 &pcfg_pull_none>;
581724ba675SRob Herring			};
582724ba675SRob Herring
583724ba675SRob Herring			emmc_cmd: emmc-cmd {
584724ba675SRob Herring				rockchip,pins = <1 RK_PC6 2 &pcfg_pull_default>;
585724ba675SRob Herring			};
586724ba675SRob Herring
587724ba675SRob Herring			emmc_cmd1: emmc-cmd1 {
588724ba675SRob Herring				rockchip,pins = <2 RK_PA4 2 &pcfg_pull_default>;
589724ba675SRob Herring			};
590724ba675SRob Herring
591724ba675SRob Herring			emmc_pwr: emmc-pwr {
592724ba675SRob Herring				rockchip,pins = <2 RK_PA5 2 &pcfg_pull_default>;
593724ba675SRob Herring			};
594724ba675SRob Herring
595724ba675SRob Herring			emmc_bus1: emmc-bus1 {
596724ba675SRob Herring				rockchip,pins = <1 RK_PD0 2 &pcfg_pull_default>;
597724ba675SRob Herring			};
598724ba675SRob Herring
599724ba675SRob Herring			emmc_bus4: emmc-bus4 {
600724ba675SRob Herring				rockchip,pins = <1 RK_PD0 2 &pcfg_pull_default>,
601724ba675SRob Herring						<1 RK_PD1 2 &pcfg_pull_default>,
602724ba675SRob Herring						<1 RK_PD2 2 &pcfg_pull_default>,
603724ba675SRob Herring						<1 RK_PD3 2 &pcfg_pull_default>;
604724ba675SRob Herring			};
605724ba675SRob Herring
606724ba675SRob Herring			emmc_bus8: emmc-bus8 {
607724ba675SRob Herring				rockchip,pins = <1 RK_PD0 2 &pcfg_pull_default>,
608724ba675SRob Herring						<1 RK_PD1 2 &pcfg_pull_default>,
609724ba675SRob Herring						<1 RK_PD2 2 &pcfg_pull_default>,
610724ba675SRob Herring						<1 RK_PD3 2 &pcfg_pull_default>,
611724ba675SRob Herring						<1 RK_PD4 2 &pcfg_pull_default>,
612724ba675SRob Herring						<1 RK_PD5 2 &pcfg_pull_default>,
613724ba675SRob Herring						<1 RK_PD6 2 &pcfg_pull_default>,
614724ba675SRob Herring						<1 RK_PD7 2 &pcfg_pull_default>;
615724ba675SRob Herring			};
616724ba675SRob Herring		};
617724ba675SRob Herring
618724ba675SRob Herring		gmac {
619724ba675SRob Herring			rgmii_pins: rgmii-pins {
620724ba675SRob Herring				rockchip,pins = <2 RK_PB0 3 &pcfg_pull_default>,
621724ba675SRob Herring						<2 RK_PB1 3 &pcfg_pull_default>,
622724ba675SRob Herring						<2 RK_PB3 3 &pcfg_pull_default>,
623724ba675SRob Herring						<2 RK_PB4 3 &pcfg_pull_default>,
624724ba675SRob Herring						<2 RK_PB5 3 &pcfg_pull_default>,
625724ba675SRob Herring						<2 RK_PB6 3 &pcfg_pull_default>,
626724ba675SRob Herring						<2 RK_PC0 3 &pcfg_pull_default>,
627724ba675SRob Herring						<2 RK_PC1 3 &pcfg_pull_default>,
628724ba675SRob Herring						<2 RK_PC2 3 &pcfg_pull_default>,
629724ba675SRob Herring						<2 RK_PC3 3 &pcfg_pull_default>,
630724ba675SRob Herring						<2 RK_PD1 3 &pcfg_pull_default>,
631724ba675SRob Herring						<2 RK_PC4 4 &pcfg_pull_default>,
632724ba675SRob Herring						<2 RK_PC5 4 &pcfg_pull_default>,
633724ba675SRob Herring						<2 RK_PC6 4 &pcfg_pull_default>,
634724ba675SRob Herring						<2 RK_PC7 4 &pcfg_pull_default>;
635724ba675SRob Herring			};
636724ba675SRob Herring
637724ba675SRob Herring			rmii_pins: rmii-pins {
638724ba675SRob Herring				rockchip,pins = <2 RK_PB0 3 &pcfg_pull_default>,
639724ba675SRob Herring						<2 RK_PB4 3 &pcfg_pull_default>,
640724ba675SRob Herring						<2 RK_PB5 3 &pcfg_pull_default>,
641724ba675SRob Herring						<2 RK_PB6 3 &pcfg_pull_default>,
642724ba675SRob Herring						<2 RK_PB7 3 &pcfg_pull_default>,
643724ba675SRob Herring						<2 RK_PC0 3 &pcfg_pull_default>,
644724ba675SRob Herring						<2 RK_PC1 3 &pcfg_pull_default>,
645724ba675SRob Herring						<2 RK_PC2 3 &pcfg_pull_default>,
646724ba675SRob Herring						<2 RK_PC3 3 &pcfg_pull_default>,
647724ba675SRob Herring						<2 RK_PD1 3 &pcfg_pull_default>;
648724ba675SRob Herring			};
649724ba675SRob Herring		};
650724ba675SRob Herring
651724ba675SRob Herring		hdmi {
652724ba675SRob Herring			hdmii2c_xfer: hdmii2c-xfer {
653724ba675SRob Herring				rockchip,pins = <0 RK_PA6 2 &pcfg_pull_none>,
654724ba675SRob Herring						<0 RK_PA7 2 &pcfg_pull_none>;
655724ba675SRob Herring			};
656724ba675SRob Herring
657724ba675SRob Herring			hdmi_hpd: hdmi-hpd {
658724ba675SRob Herring				rockchip,pins = <0 RK_PB7 1 &pcfg_pull_none>;
659724ba675SRob Herring			};
660724ba675SRob Herring
661724ba675SRob Herring			hdmi_cec: hdmi-cec {
662724ba675SRob Herring				rockchip,pins = <0 RK_PC4 1 &pcfg_pull_none>;
663724ba675SRob Herring			};
664724ba675SRob Herring		};
665724ba675SRob Herring
666724ba675SRob Herring		i2c0 {
667724ba675SRob Herring			i2c0_xfer: i2c0-xfer {
668724ba675SRob Herring				rockchip,pins = <0 RK_PA0 1 &pcfg_pull_none>,
669724ba675SRob Herring						<0 RK_PA1 1 &pcfg_pull_none>;
670724ba675SRob Herring			};
671724ba675SRob Herring		};
672724ba675SRob Herring
673724ba675SRob Herring		i2c1 {
674724ba675SRob Herring			i2c1_xfer: i2c1-xfer {
675724ba675SRob Herring				rockchip,pins = <0 RK_PA2 1 &pcfg_pull_none>,
676724ba675SRob Herring						<0 RK_PA3 1 &pcfg_pull_none>;
677724ba675SRob Herring			};
678724ba675SRob Herring		};
679724ba675SRob Herring
680724ba675SRob Herring		i2c2 {
681724ba675SRob Herring			i2c2_xfer: i2c2-xfer {
682724ba675SRob Herring				rockchip,pins = <2 RK_PC4 3 &pcfg_pull_none>,
683724ba675SRob Herring						<2 RK_PC5 3 &pcfg_pull_none>;
684724ba675SRob Herring			};
685724ba675SRob Herring		};
686724ba675SRob Herring
687724ba675SRob Herring		i2c3 {
688724ba675SRob Herring			i2c3_xfer: i2c3-xfer {
689724ba675SRob Herring				rockchip,pins = <0 RK_PA6 1 &pcfg_pull_none>,
690724ba675SRob Herring						<0 RK_PA7 1 &pcfg_pull_none>;
691724ba675SRob Herring			};
692724ba675SRob Herring		};
693724ba675SRob Herring
694724ba675SRob Herring		i2s {
695724ba675SRob Herring			i2s_bus: i2s-bus {
696724ba675SRob Herring				rockchip,pins = <0 RK_PB0 1 &pcfg_pull_none>,
697724ba675SRob Herring						<0 RK_PB1 1 &pcfg_pull_none>,
698724ba675SRob Herring						<0 RK_PB3 1 &pcfg_pull_none>,
699724ba675SRob Herring						<0 RK_PB4 1 &pcfg_pull_none>,
700724ba675SRob Herring						<0 RK_PB5 1 &pcfg_pull_none>,
701724ba675SRob Herring						<0 RK_PB6 1 &pcfg_pull_none>;
702724ba675SRob Herring			};
703724ba675SRob Herring
704724ba675SRob Herring			i2s1_bus: i2s1-bus {
705724ba675SRob Herring				rockchip,pins = <1 RK_PA0 1 &pcfg_pull_none>,
706724ba675SRob Herring						<1 RK_PA1 1 &pcfg_pull_none>,
707724ba675SRob Herring						<1 RK_PA2 1 &pcfg_pull_none>,
708724ba675SRob Herring						<1 RK_PA3 1 &pcfg_pull_none>,
709724ba675SRob Herring						<1 RK_PA4 1 &pcfg_pull_none>,
710724ba675SRob Herring						<1 RK_PA5 1 &pcfg_pull_none>;
711724ba675SRob Herring			};
712724ba675SRob Herring		};
713724ba675SRob Herring
714724ba675SRob Herring		lcdc {
715724ba675SRob Herring			lcdc_dclk: lcdc-dclk {
716724ba675SRob Herring				rockchip,pins = <2 RK_PB0 1 &pcfg_pull_none>;
717724ba675SRob Herring			};
718724ba675SRob Herring
719724ba675SRob Herring			lcdc_den: lcdc-den {
720724ba675SRob Herring				rockchip,pins = <2 RK_PB3 1 &pcfg_pull_none>;
721724ba675SRob Herring			};
722724ba675SRob Herring
723724ba675SRob Herring			lcdc_hsync: lcdc-hsync {
724724ba675SRob Herring				rockchip,pins = <2 RK_PB1 1 &pcfg_pull_none>;
725724ba675SRob Herring			};
726724ba675SRob Herring
727724ba675SRob Herring			lcdc_vsync: lcdc-vsync {
728724ba675SRob Herring				rockchip,pins = <2 RK_PB2 1 &pcfg_pull_none>;
729724ba675SRob Herring			};
730724ba675SRob Herring
731724ba675SRob Herring			lcdc_rgb24: lcdc-rgb24 {
732724ba675SRob Herring				rockchip,pins = <2 RK_PB4 1 &pcfg_pull_none>,
733724ba675SRob Herring						<2 RK_PB5 1 &pcfg_pull_none>,
734724ba675SRob Herring						<2 RK_PB6 1 &pcfg_pull_none>,
735724ba675SRob Herring						<2 RK_PB7 1 &pcfg_pull_none>,
736724ba675SRob Herring						<2 RK_PC0 1 &pcfg_pull_none>,
737724ba675SRob Herring						<2 RK_PC1 1 &pcfg_pull_none>,
738724ba675SRob Herring						<2 RK_PC2 1 &pcfg_pull_none>,
739724ba675SRob Herring						<2 RK_PC3 1 &pcfg_pull_none>,
740724ba675SRob Herring						<2 RK_PC4 1 &pcfg_pull_none>,
741724ba675SRob Herring						<2 RK_PC5 1 &pcfg_pull_none>,
742724ba675SRob Herring						<2 RK_PC6 1 &pcfg_pull_none>,
743724ba675SRob Herring						<2 RK_PC7 1 &pcfg_pull_none>,
744724ba675SRob Herring						<2 RK_PD0 1 &pcfg_pull_none>,
745724ba675SRob Herring						<2 RK_PD1 1 &pcfg_pull_none>;
746724ba675SRob Herring			};
747724ba675SRob Herring		};
748724ba675SRob Herring
749724ba675SRob Herring		nfc {
750724ba675SRob Herring			flash_ale: flash-ale {
751724ba675SRob Herring				rockchip,pins = <2 RK_PA0 1 &pcfg_pull_none>;
752724ba675SRob Herring			};
753724ba675SRob Herring
754724ba675SRob Herring			flash_cle: flash-cle {
755724ba675SRob Herring				rockchip,pins = <2 RK_PA1 1 &pcfg_pull_none>;
756724ba675SRob Herring			};
757724ba675SRob Herring
758724ba675SRob Herring			flash_wrn: flash-wrn {
759724ba675SRob Herring				rockchip,pins = <2 RK_PA2 1 &pcfg_pull_none>;
760724ba675SRob Herring			};
761724ba675SRob Herring
762724ba675SRob Herring			flash_rdn: flash-rdn {
763724ba675SRob Herring				rockchip,pins = <2 RK_PA3 1 &pcfg_pull_none>;
764724ba675SRob Herring			};
765724ba675SRob Herring
766724ba675SRob Herring			flash_rdy: flash-rdy {
767724ba675SRob Herring				rockchip,pins = <2 RK_PA4 1 &pcfg_pull_none>;
768724ba675SRob Herring			};
769724ba675SRob Herring
770724ba675SRob Herring			flash_cs0: flash-cs0 {
771724ba675SRob Herring				rockchip,pins = <2 RK_PA6 1 &pcfg_pull_none>;
772724ba675SRob Herring			};
773724ba675SRob Herring
774724ba675SRob Herring			flash_dqs: flash-dqs {
775724ba675SRob Herring				rockchip,pins = <2 RK_PA7 1 &pcfg_pull_none>;
776724ba675SRob Herring			};
777724ba675SRob Herring
778724ba675SRob Herring			flash_bus8: flash-bus8 {
779724ba675SRob Herring				rockchip,pins = <1 RK_PD0 1 &pcfg_pull_none>,
780724ba675SRob Herring						<1 RK_PD1 1 &pcfg_pull_none>,
781724ba675SRob Herring						<1 RK_PD2 1 &pcfg_pull_none>,
782724ba675SRob Herring						<1 RK_PD3 1 &pcfg_pull_none>,
783724ba675SRob Herring						<1 RK_PD4 1 &pcfg_pull_none>,
784724ba675SRob Herring						<1 RK_PD5 1 &pcfg_pull_none>,
785724ba675SRob Herring						<1 RK_PD6 1 &pcfg_pull_none>,
786724ba675SRob Herring						<1 RK_PD7 1 &pcfg_pull_none>;
787724ba675SRob Herring			};
788724ba675SRob Herring		};
789724ba675SRob Herring
790724ba675SRob Herring		pwm0 {
791724ba675SRob Herring			pwm0_pin: pwm0-pin {
792724ba675SRob Herring				rockchip,pins = <0 RK_PD2 1 &pcfg_pull_none>;
793724ba675SRob Herring			};
794724ba675SRob Herring		};
795724ba675SRob Herring
796724ba675SRob Herring		pwm1 {
797724ba675SRob Herring			pwm1_pin: pwm1-pin {
798724ba675SRob Herring				rockchip,pins = <0 RK_PD3 1 &pcfg_pull_none>;
799724ba675SRob Herring			};
800724ba675SRob Herring		};
801724ba675SRob Herring
802724ba675SRob Herring		pwm2 {
803724ba675SRob Herring			pwm2_pin: pwm2-pin {
804724ba675SRob Herring				rockchip,pins = <0 RK_PD4 1 &pcfg_pull_none>;
805724ba675SRob Herring			};
806724ba675SRob Herring		};
807724ba675SRob Herring
808724ba675SRob Herring		pwm3 {
809724ba675SRob Herring			pwm3_pin: pwm3-pin {
810724ba675SRob Herring				rockchip,pins = <3 RK_PD2 1 &pcfg_pull_none>;
811724ba675SRob Herring			};
812724ba675SRob Herring		};
813724ba675SRob Herring
814724ba675SRob Herring		sdio {
815724ba675SRob Herring			sdio_clk: sdio-clk {
816724ba675SRob Herring				rockchip,pins = <1 RK_PA0 2 &pcfg_pull_none>;
817724ba675SRob Herring			};
818724ba675SRob Herring
819724ba675SRob Herring			sdio_cmd: sdio-cmd {
820724ba675SRob Herring				rockchip,pins = <0 RK_PA3 2 &pcfg_pull_default>;
821724ba675SRob Herring			};
822724ba675SRob Herring
823724ba675SRob Herring			sdio_pwren: sdio-pwren {
824724ba675SRob Herring				rockchip,pins = <0 RK_PD6 1 &pcfg_pull_default>;
825724ba675SRob Herring			};
826724ba675SRob Herring
827724ba675SRob Herring			sdio_bus4: sdio-bus4 {
828724ba675SRob Herring				rockchip,pins = <1 RK_PA1 2 &pcfg_pull_default>,
829724ba675SRob Herring						<1 RK_PA2 2 &pcfg_pull_default>,
830724ba675SRob Herring						<1 RK_PA4 2 &pcfg_pull_default>,
831724ba675SRob Herring						<1 RK_PA5 2 &pcfg_pull_default>;
832724ba675SRob Herring			};
833724ba675SRob Herring		};
834724ba675SRob Herring
835724ba675SRob Herring		sdmmc {
836724ba675SRob Herring			sdmmc_clk: sdmmc-clk {
837724ba675SRob Herring				rockchip,pins = <1 RK_PC0 1 &pcfg_pull_none>;
838724ba675SRob Herring			};
839724ba675SRob Herring
840724ba675SRob Herring			sdmmc_cmd: sdmmc-cmd {
841724ba675SRob Herring				rockchip,pins = <1 RK_PB7 1 &pcfg_pull_default>;
842724ba675SRob Herring			};
843724ba675SRob Herring
844724ba675SRob Herring			sdmmc_wp: sdmmc-wp {
845724ba675SRob Herring				rockchip,pins = <1 RK_PA7 1 &pcfg_pull_default>;
846724ba675SRob Herring			};
847724ba675SRob Herring
848724ba675SRob Herring			sdmmc_pwren: sdmmc-pwren {
849724ba675SRob Herring				rockchip,pins = <1 RK_PB6 1 &pcfg_pull_default>;
850724ba675SRob Herring			};
851724ba675SRob Herring
852724ba675SRob Herring			sdmmc_bus4: sdmmc-bus4 {
853724ba675SRob Herring				rockchip,pins = <1 RK_PC2 1 &pcfg_pull_default>,
854724ba675SRob Herring						<1 RK_PC3 1 &pcfg_pull_default>,
855724ba675SRob Herring						<1 RK_PC4 1 &pcfg_pull_default>,
856724ba675SRob Herring						<1 RK_PC5 1 &pcfg_pull_default>;
857724ba675SRob Herring			};
858724ba675SRob Herring		};
859724ba675SRob Herring
860724ba675SRob Herring		spdif {
861724ba675SRob Herring			spdif_tx: spdif-tx {
862724ba675SRob Herring				rockchip,pins = <3 RK_PD3 1 &pcfg_pull_none>;
863724ba675SRob Herring			};
864724ba675SRob Herring		};
865724ba675SRob Herring
866724ba675SRob Herring		spi0 {
867724ba675SRob Herring			spi0_clk: spi0-clk {
868724ba675SRob Herring				rockchip,pins = <1 RK_PB0 1 &pcfg_pull_default>;
869724ba675SRob Herring			};
870724ba675SRob Herring
871724ba675SRob Herring			spi0_cs0: spi0-cs0 {
872724ba675SRob Herring				rockchip,pins = <1 RK_PB3 1 &pcfg_pull_default>;
873724ba675SRob Herring			};
874724ba675SRob Herring
875724ba675SRob Herring			spi0_tx: spi0-tx {
876724ba675SRob Herring				rockchip,pins = <1 RK_PB1 1 &pcfg_pull_default>;
877724ba675SRob Herring			};
878724ba675SRob Herring
879724ba675SRob Herring			spi0_rx: spi0-rx {
880724ba675SRob Herring				rockchip,pins = <1 RK_PB2 1 &pcfg_pull_default>;
881724ba675SRob Herring			};
882724ba675SRob Herring
883724ba675SRob Herring			spi0_cs1: spi0-cs1 {
884724ba675SRob Herring				rockchip,pins = <1 RK_PB4 1 &pcfg_pull_default>;
885724ba675SRob Herring			};
886724ba675SRob Herring
887724ba675SRob Herring			spi1_clk: spi1-clk {
888724ba675SRob Herring				rockchip,pins = <2 RK_PA0 2 &pcfg_pull_default>;
889724ba675SRob Herring			};
890724ba675SRob Herring
891724ba675SRob Herring			spi1_cs0: spi1-cs0 {
892724ba675SRob Herring				rockchip,pins = <1 RK_PD6 3 &pcfg_pull_default>;
893724ba675SRob Herring			};
894724ba675SRob Herring
895724ba675SRob Herring			spi1_tx: spi1-tx {
896724ba675SRob Herring				rockchip,pins = <1 RK_PD5 3 &pcfg_pull_default>;
897724ba675SRob Herring			};
898724ba675SRob Herring
899724ba675SRob Herring			spi1_rx: spi1-rx {
900724ba675SRob Herring				rockchip,pins = <1 RK_PD4 3 &pcfg_pull_default>;
901724ba675SRob Herring			};
902724ba675SRob Herring
903724ba675SRob Herring			spi1_cs1: spi1-cs1 {
904724ba675SRob Herring				rockchip,pins = <1 RK_PD7 3 &pcfg_pull_default>;
905724ba675SRob Herring			};
906724ba675SRob Herring
907724ba675SRob Herring			spi2_clk: spi2-clk {
908724ba675SRob Herring				rockchip,pins = <0 RK_PB1 2 &pcfg_pull_default>;
909724ba675SRob Herring			};
910724ba675SRob Herring
911724ba675SRob Herring			spi2_cs0: spi2-cs0 {
912724ba675SRob Herring				rockchip,pins = <0 RK_PB6 2 &pcfg_pull_default>;
913724ba675SRob Herring			};
914724ba675SRob Herring
915724ba675SRob Herring			spi2_tx: spi2-tx {
916724ba675SRob Herring				rockchip,pins = <0 RK_PB3 2 &pcfg_pull_default>;
917724ba675SRob Herring			};
918724ba675SRob Herring
919724ba675SRob Herring			spi2_rx: spi2-rx {
920724ba675SRob Herring				rockchip,pins = <0 RK_PB5 2 &pcfg_pull_default>;
921724ba675SRob Herring			};
922724ba675SRob Herring		};
923724ba675SRob Herring
924724ba675SRob Herring		uart0 {
925724ba675SRob Herring			uart0_xfer: uart0-xfer {
926724ba675SRob Herring				rockchip,pins = <2 RK_PD2 2 &pcfg_pull_default>,
927724ba675SRob Herring						<2 RK_PD3 2 &pcfg_pull_none>;
928724ba675SRob Herring			};
929724ba675SRob Herring
930724ba675SRob Herring			uart0_cts: uart0-cts {
931724ba675SRob Herring				rockchip,pins = <2 RK_PD5 2 &pcfg_pull_none>;
932724ba675SRob Herring			};
933724ba675SRob Herring
934724ba675SRob Herring			uart0_rts: uart0-rts {
935724ba675SRob Herring				rockchip,pins = <0 RK_PC1 2 &pcfg_pull_none>;
936724ba675SRob Herring			};
937724ba675SRob Herring		};
938724ba675SRob Herring
939724ba675SRob Herring		uart1 {
940724ba675SRob Herring			uart1_xfer: uart1-xfer {
941724ba675SRob Herring				rockchip,pins = <1 RK_PB1 2 &pcfg_pull_default>,
942724ba675SRob Herring						<1 RK_PB2 2 &pcfg_pull_default>;
943724ba675SRob Herring			};
944724ba675SRob Herring
945724ba675SRob Herring			uart1_cts: uart1-cts {
946724ba675SRob Herring				rockchip,pins = <1 RK_PB0 2 &pcfg_pull_none>;
947724ba675SRob Herring			};
948724ba675SRob Herring
949724ba675SRob Herring			uart1_rts: uart1-rts {
950724ba675SRob Herring				rockchip,pins = <1 RK_PB3 2 &pcfg_pull_none>;
951724ba675SRob Herring			};
952724ba675SRob Herring		};
953724ba675SRob Herring
954724ba675SRob Herring		uart2 {
955724ba675SRob Herring			uart2_xfer: uart2-xfer {
956724ba675SRob Herring				rockchip,pins = <1 RK_PC2 2 &pcfg_pull_default>,
957724ba675SRob Herring						<1 RK_PC3 2 &pcfg_pull_none>;
958724ba675SRob Herring			};
959724ba675SRob Herring
960724ba675SRob Herring			uart2_cts: uart2-cts {
961724ba675SRob Herring				rockchip,pins = <0 RK_PD1 1 &pcfg_pull_none>;
962724ba675SRob Herring			};
963724ba675SRob Herring
964724ba675SRob Herring			uart2_rts: uart2-rts {
965724ba675SRob Herring				rockchip,pins = <0 RK_PD0 1 &pcfg_pull_none>;
966724ba675SRob Herring			};
967724ba675SRob Herring		};
968724ba675SRob Herring	};
969724ba675SRob Herring};
970