xref: /linux/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dts (revision e7e86d7697c6ed1dbbde18d7185c35b6967945ed) 
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the RZN1D-DB Board
4 *
5 * Copyright (C) 2018 Renesas Electronics Europe Limited
6 *
7 */
8
9/dts-v1/;
10
11#include <dt-bindings/gpio/gpio.h>
12#include <dt-bindings/input/input.h>
13#include <dt-bindings/leds/common.h>
14#include <dt-bindings/net/pcs-rzn1-miic.h>
15#include <dt-bindings/pinctrl/rzn1-pinctrl.h>
16
17#include "r9a06g032.dtsi"
18
19/ {
20	model = "RZN1D-DB Board";
21	compatible = "renesas,rzn1d400-db", "renesas,r9a06g032";
22
23	chosen {
24		stdout-path = "serial0:115200n8";
25	};
26
27	aliases {
28		serial0 = &uart0;
29	};
30
31	keyboard {
32		compatible = "gpio-keys-polled";
33		poll-interval = <100>;
34
35		switch-1 {
36			linux,code = <KEY_1>;
37			label = "SW1-1";
38			debounce-interval = <20>;
39			gpios = <&pca9698 8 GPIO_ACTIVE_LOW>;
40		};
41
42		switch-2 {
43			linux,code = <KEY_2>;
44			label = "SW1-2";
45			debounce-interval = <20>;
46			gpios = <&pca9698 9 GPIO_ACTIVE_LOW>;
47		};
48
49		switch-3 {
50			linux,code = <KEY_3>;
51			label = "SW1-3";
52			debounce-interval = <20>;
53			gpios = <&pca9698 10 GPIO_ACTIVE_LOW>;
54		};
55
56		switch-4 {
57			linux,code = <KEY_4>;
58			label = "SW1-4";
59			debounce-interval = <20>;
60			gpios = <&pca9698 11 GPIO_ACTIVE_LOW>;
61		};
62
63		switch-5 {
64			linux,code = <KEY_5>;
65			label = "SW1-5";
66			debounce-interval = <20>;
67			gpios = <&pca9698 12 GPIO_ACTIVE_LOW>;
68		};
69
70		switch-6 {
71			linux,code = <KEY_6>;
72			label = "SW1-6";
73			debounce-interval = <20>;
74			gpios = <&pca9698 13 GPIO_ACTIVE_LOW>;
75		};
76
77		switch-7 {
78			linux,code = <KEY_7>;
79			label = "SW1-7";
80			debounce-interval = <20>;
81			gpios = <&pca9698 14 GPIO_ACTIVE_LOW>;
82		};
83
84		switch-8 {
85			linux,code = <KEY_8>;
86			label = "SW1-8";
87			debounce-interval = <20>;
88			gpios = <&pca9698 15 GPIO_ACTIVE_LOW>;
89		};
90	};
91
92	leds {
93		compatible = "gpio-leds";
94
95		led-dbg0 {
96			gpios = <&pca9698 0 GPIO_ACTIVE_HIGH>;
97			color = <LED_COLOR_ID_GREEN>;
98			function = LED_FUNCTION_DEBUG;
99			function-enumerator = <0>;
100		};
101
102		led-dbg1 {
103			gpios = <&pca9698 1 GPIO_ACTIVE_HIGH>;
104			color = <LED_COLOR_ID_GREEN>;
105			function = LED_FUNCTION_DEBUG;
106			function-enumerator = <1>;
107		};
108
109		led-dbg2 {
110			gpios = <&pca9698 2 GPIO_ACTIVE_HIGH>;
111			color = <LED_COLOR_ID_GREEN>;
112			function = LED_FUNCTION_DEBUG;
113			function-enumerator = <2>;
114		};
115
116		led-dbg3 {
117			gpios = <&pca9698 3 GPIO_ACTIVE_HIGH>;
118			color = <LED_COLOR_ID_GREEN>;
119			function = LED_FUNCTION_DEBUG;
120			function-enumerator = <3>;
121		};
122
123		led-dbg4 {
124			gpios = <&pca9698 4 GPIO_ACTIVE_HIGH>;
125			color = <LED_COLOR_ID_GREEN>;
126			function = LED_FUNCTION_DEBUG;
127			function-enumerator = <4>;
128		};
129
130		led-dbg5 {
131			gpios = <&pca9698 5 GPIO_ACTIVE_HIGH>;
132			color = <LED_COLOR_ID_GREEN>;
133			function = LED_FUNCTION_DEBUG;
134			function-enumerator = <5>;
135		};
136
137		led-dbg6 {
138			gpios = <&pca9698 6 GPIO_ACTIVE_HIGH>;
139			color = <LED_COLOR_ID_GREEN>;
140			function = LED_FUNCTION_DEBUG;
141			function-enumerator = <6>;
142		};
143
144		led-dbg7 {
145			gpios = <&pca9698 7 GPIO_ACTIVE_HIGH>;
146			color = <LED_COLOR_ID_GREEN>;
147			function = LED_FUNCTION_DEBUG;
148			function-enumerator = <7>;
149		};
150	};
151};
152
153&can0 {
154	pinctrl-0 = <&pins_can0>;
155	pinctrl-names = "default";
156
157	/* Assuming CN10/CN11 are wired for CAN1 */
158	status = "okay";
159};
160
161&can1 {
162	pinctrl-0 = <&pins_can1>;
163	pinctrl-names = "default";
164
165	/* Please only enable can0 or can1, depending on CN10/CN11 */
166	/* status = "okay"; */
167};
168
169&eth_miic {
170	status = "okay";
171	renesas,miic-switch-portin = <MIIC_GMAC2_PORT>;
172};
173
174&ext_rtc_clk {
175	clock-frequency = <32768>;
176};
177
178&gmac2 {
179	status = "okay";
180	phy-mode = "gmii";
181
182	fixed-link {
183		speed = <1000>;
184		full-duplex;
185	};
186};
187
188&i2c2 {
189	pinctrl-0 = <&pins_i2c2>;
190	pinctrl-names = "default";
191	status = "okay";
192	clock-frequency = <400000>;
193
194	pca9698: gpio@20 {
195		compatible = "nxp,pca9698";
196		reg = <0x20>;
197		gpio-controller;
198		#gpio-cells = <2>;
199
200		/* configure the analog switch to let i2c2 access the eeprom */
201		max4662-in1-hog {
202			gpio-hog;
203			gpios = <16 0>;
204			output-high;
205		};
206		max4662-in2-hog {
207			gpio-hog;
208			gpios = <17 0>;
209			output-low;
210		};
211		max4662-in3-hog {
212			gpio-hog;
213			gpios = <18 0>;
214			output-low;
215		};
216	};
217
218	/* Some revisions may have a 24cs64 at address 0x58 */
219	eeprom@50 {
220		compatible = "atmel,24c64";
221		pagesize = <32>;
222		reg = <0x50>;
223	};
224};
225
226&mii_conv4 {
227	renesas,miic-input = <MIIC_SWITCH_PORTB>;
228	status = "okay";
229};
230
231&mii_conv5 {
232	renesas,miic-input = <MIIC_SWITCH_PORTA>;
233	status = "okay";
234};
235
236&pinctrl {
237	pinctrl-names = "default";
238	pinctrl-0 = <&pins_cpld>;
239
240	pins_can0: pins_can0 {
241		pinmux = <RZN1_PINMUX(162, RZN1_FUNC_CAN)>,	/* CAN0_TXD */
242			 <RZN1_PINMUX(163, RZN1_FUNC_CAN)>;	/* CAN0_RXD */
243		drive-strength = <6>;
244	};
245
246	pins_can1: pins_can1 {
247		pinmux = <RZN1_PINMUX(109, RZN1_FUNC_CAN)>,	/* CAN1_TXD */
248			 <RZN1_PINMUX(110, RZN1_FUNC_CAN)>;	/* CAN1_RXD */
249		drive-strength = <6>;
250	};
251
252	pins_cpld: pins-cpld {
253		pinmux = <RZN1_PINMUX(119, RZN1_FUNC_USB)>,
254			 <RZN1_PINMUX(120, RZN1_FUNC_USB)>,
255			 <RZN1_PINMUX(121, RZN1_FUNC_USB)>,
256			 <RZN1_PINMUX(122, RZN1_FUNC_USB)>;
257	};
258
259	pins_eth3: pins_eth3 {
260		pinmux = <RZN1_PINMUX(36, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
261			 <RZN1_PINMUX(37, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
262			 <RZN1_PINMUX(38, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
263			 <RZN1_PINMUX(39, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
264			 <RZN1_PINMUX(40, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
265			 <RZN1_PINMUX(41, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
266			 <RZN1_PINMUX(42, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
267			 <RZN1_PINMUX(43, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
268			 <RZN1_PINMUX(44, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
269			 <RZN1_PINMUX(45, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
270			 <RZN1_PINMUX(46, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
271			 <RZN1_PINMUX(47, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>;
272		drive-strength = <6>;
273		bias-disable;
274	};
275
276	pins_eth4: pins_eth4 {
277		pinmux = <RZN1_PINMUX(48, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
278			 <RZN1_PINMUX(49, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
279			 <RZN1_PINMUX(50, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
280			 <RZN1_PINMUX(51, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
281			 <RZN1_PINMUX(52, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
282			 <RZN1_PINMUX(53, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
283			 <RZN1_PINMUX(54, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
284			 <RZN1_PINMUX(55, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
285			 <RZN1_PINMUX(56, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
286			 <RZN1_PINMUX(57, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
287			 <RZN1_PINMUX(58, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
288			 <RZN1_PINMUX(59, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>;
289		drive-strength = <6>;
290		bias-disable;
291	};
292
293	pins_i2c2: pins_i2c2 {
294		pinmux = <RZN1_PINMUX(115, RZN1_FUNC_I2C)>,
295			 <RZN1_PINMUX(116, RZN1_FUNC_I2C)>;
296		drive-strength = <12>;
297	};
298
299	pins_mdio1: pins_mdio1 {
300		pinmux = <RZN1_PINMUX(152, RZN1_FUNC_MDIO1_SWITCH)>,
301			 <RZN1_PINMUX(153, RZN1_FUNC_MDIO1_SWITCH)>;
302	};
303};
304
305&rtc0 {
306	status = "okay";
307};
308
309&switch {
310	status = "okay";
311	#address-cells = <1>;
312	#size-cells = <0>;
313
314	pinctrl-names = "default";
315	pinctrl-0 = <&pins_eth3>, <&pins_eth4>, <&pins_mdio1>;
316
317	dsa,member = <0 0>;
318
319	mdio {
320		clock-frequency = <2500000>;
321
322		#address-cells = <1>;
323		#size-cells = <0>;
324
325		switch0phy4: ethernet-phy@4 {
326			reg = <4>;
327			micrel,led-mode = <1>;
328		};
329
330		switch0phy5: ethernet-phy@5 {
331			reg = <5>;
332			micrel,led-mode = <1>;
333		};
334	};
335};
336
337&switch_port0 {
338	label = "lan0";
339	phy-mode = "mii";
340	phy-handle = <&switch0phy5>;
341	status = "okay";
342};
343
344&switch_port1 {
345	label = "lan1";
346	phy-mode = "mii";
347	phy-handle = <&switch0phy4>;
348	status = "okay";
349};
350
351&switch_port4 {
352	status = "okay";
353};
354
355&uart0 {
356	status = "okay";
357};
358
359&udc {
360	status = "okay";
361};
362
363&wdt0 {
364	timeout-sec = <60>;
365	status = "okay";
366};
367