xref: /linux/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dts (revision 23ca32e4ead48f68e37000f2552b973ef1439acb) 
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the RZN1D-DB Board
4 *
5 * Copyright (C) 2018 Renesas Electronics Europe Limited
6 *
7 */
8
9/dts-v1/;
10
11#include <dt-bindings/gpio/gpio.h>
12#include <dt-bindings/input/input.h>
13#include <dt-bindings/net/pcs-rzn1-miic.h>
14#include <dt-bindings/pinctrl/rzn1-pinctrl.h>
15
16#include "r9a06g032.dtsi"
17
18/ {
19	model = "RZN1D-DB Board";
20	compatible = "renesas,rzn1d400-db", "renesas,r9a06g032";
21
22	chosen {
23		stdout-path = "serial0:115200n8";
24	};
25
26	aliases {
27		serial0 = &uart0;
28	};
29
30	keyboard {
31		compatible = "gpio-keys-polled";
32		poll-interval = <100>;
33
34		switch-1 {
35			linux,code = <KEY_1>;
36			label = "SW1-1";
37			debounce-interval = <20>;
38			gpios = <&pca9698 8 GPIO_ACTIVE_LOW>;
39		};
40
41		switch-2 {
42			linux,code = <KEY_2>;
43			label = "SW1-2";
44			debounce-interval = <20>;
45			gpios = <&pca9698 9 GPIO_ACTIVE_LOW>;
46		};
47
48		switch-3 {
49			linux,code = <KEY_3>;
50			label = "SW1-3";
51			debounce-interval = <20>;
52			gpios = <&pca9698 10 GPIO_ACTIVE_LOW>;
53		};
54
55		switch-4 {
56			linux,code = <KEY_4>;
57			label = "SW1-4";
58			debounce-interval = <20>;
59			gpios = <&pca9698 11 GPIO_ACTIVE_LOW>;
60		};
61
62		switch-5 {
63			linux,code = <KEY_5>;
64			label = "SW1-5";
65			debounce-interval = <20>;
66			gpios = <&pca9698 12 GPIO_ACTIVE_LOW>;
67		};
68
69		switch-6 {
70			linux,code = <KEY_6>;
71			label = "SW1-6";
72			debounce-interval = <20>;
73			gpios = <&pca9698 13 GPIO_ACTIVE_LOW>;
74		};
75
76		switch-7 {
77			linux,code = <KEY_7>;
78			label = "SW1-7";
79			debounce-interval = <20>;
80			gpios = <&pca9698 14 GPIO_ACTIVE_LOW>;
81		};
82
83		switch-8 {
84			linux,code = <KEY_8>;
85			label = "SW1-8";
86			debounce-interval = <20>;
87			gpios = <&pca9698 15 GPIO_ACTIVE_LOW>;
88		};
89
90	};
91};
92
93&can0 {
94	pinctrl-0 = <&pins_can0>;
95	pinctrl-names = "default";
96
97	/* Assuming CN10/CN11 are wired for CAN1 */
98	status = "okay";
99};
100
101&can1 {
102	pinctrl-0 = <&pins_can1>;
103	pinctrl-names = "default";
104
105	/* Please only enable can0 or can1, depending on CN10/CN11 */
106	/* status = "okay"; */
107};
108
109&eth_miic {
110	status = "okay";
111	renesas,miic-switch-portin = <MIIC_GMAC2_PORT>;
112};
113
114&gmac2 {
115	status = "okay";
116	phy-mode = "gmii";
117
118	fixed-link {
119		speed = <1000>;
120		full-duplex;
121	};
122};
123
124&i2c2 {
125	pinctrl-0 = <&pins_i2c2>;
126	pinctrl-names = "default";
127	status = "okay";
128	clock-frequency = <400000>;
129
130	pca9698: gpio@20 {
131		compatible = "nxp,pca9698";
132		reg = <0x20>;
133		gpio-controller;
134		#gpio-cells = <2>;
135
136		/* configure the analog switch to let i2c2 access the eeprom */
137		max4662-in1-hog {
138			gpio-hog;
139			gpios = <16 0>;
140			output-high;
141		};
142		max4662-in2-hog {
143			gpio-hog;
144			gpios = <17 0>;
145			output-low;
146		};
147		max4662-in3-hog {
148			gpio-hog;
149			gpios = <18 0>;
150			output-low;
151		};
152	};
153
154	/* Some revisions may have a 24cs64 at address 0x58 */
155	eeprom@50 {
156		compatible = "atmel,24c64";
157		pagesize = <32>;
158		reg = <0x50>;
159	};
160};
161
162&mii_conv4 {
163	renesas,miic-input = <MIIC_SWITCH_PORTB>;
164	status = "okay";
165};
166
167&mii_conv5 {
168	renesas,miic-input = <MIIC_SWITCH_PORTA>;
169	status = "okay";
170};
171
172&pinctrl {
173	pinctrl-names = "default";
174	pinctrl-0 = <&pins_cpld>;
175
176	pins_can0: pins_can0 {
177		pinmux = <RZN1_PINMUX(162, RZN1_FUNC_CAN)>,	/* CAN0_TXD */
178			 <RZN1_PINMUX(163, RZN1_FUNC_CAN)>;	/* CAN0_RXD */
179		drive-strength = <6>;
180	};
181
182	pins_can1: pins_can1 {
183		pinmux = <RZN1_PINMUX(109, RZN1_FUNC_CAN)>,	/* CAN1_TXD */
184			 <RZN1_PINMUX(110, RZN1_FUNC_CAN)>;	/* CAN1_RXD */
185		drive-strength = <6>;
186	};
187
188	pins_cpld: pins-cpld {
189		pinmux = <RZN1_PINMUX(119, RZN1_FUNC_USB)>,
190			 <RZN1_PINMUX(120, RZN1_FUNC_USB)>,
191			 <RZN1_PINMUX(121, RZN1_FUNC_USB)>,
192			 <RZN1_PINMUX(122, RZN1_FUNC_USB)>;
193	};
194
195	pins_eth3: pins_eth3 {
196		pinmux = <RZN1_PINMUX(36, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
197			 <RZN1_PINMUX(37, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
198			 <RZN1_PINMUX(38, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
199			 <RZN1_PINMUX(39, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
200			 <RZN1_PINMUX(40, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
201			 <RZN1_PINMUX(41, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
202			 <RZN1_PINMUX(42, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
203			 <RZN1_PINMUX(43, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
204			 <RZN1_PINMUX(44, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
205			 <RZN1_PINMUX(45, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
206			 <RZN1_PINMUX(46, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
207			 <RZN1_PINMUX(47, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>;
208		drive-strength = <6>;
209		bias-disable;
210	};
211
212	pins_eth4: pins_eth4 {
213		pinmux = <RZN1_PINMUX(48, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
214			 <RZN1_PINMUX(49, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
215			 <RZN1_PINMUX(50, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
216			 <RZN1_PINMUX(51, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
217			 <RZN1_PINMUX(52, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
218			 <RZN1_PINMUX(53, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
219			 <RZN1_PINMUX(54, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
220			 <RZN1_PINMUX(55, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
221			 <RZN1_PINMUX(56, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
222			 <RZN1_PINMUX(57, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
223			 <RZN1_PINMUX(58, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
224			 <RZN1_PINMUX(59, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>;
225		drive-strength = <6>;
226		bias-disable;
227	};
228
229	pins_i2c2: pins_i2c2 {
230		pinmux = <RZN1_PINMUX(115, RZN1_FUNC_I2C)>,
231			 <RZN1_PINMUX(116, RZN1_FUNC_I2C)>;
232		drive-strength = <12>;
233	};
234
235	pins_mdio1: pins_mdio1 {
236		pinmux = <RZN1_PINMUX(152, RZN1_FUNC_MDIO1_SWITCH)>,
237			 <RZN1_PINMUX(153, RZN1_FUNC_MDIO1_SWITCH)>;
238	};
239};
240
241&rtc0 {
242	status = "okay";
243};
244
245&switch {
246	status = "okay";
247	#address-cells = <1>;
248	#size-cells = <0>;
249
250	pinctrl-names = "default";
251	pinctrl-0 = <&pins_eth3>, <&pins_eth4>, <&pins_mdio1>;
252
253	dsa,member = <0 0>;
254
255	mdio {
256		clock-frequency = <2500000>;
257
258		#address-cells = <1>;
259		#size-cells = <0>;
260
261		switch0phy4: ethernet-phy@4 {
262			reg = <4>;
263			micrel,led-mode = <1>;
264		};
265
266		switch0phy5: ethernet-phy@5 {
267			reg = <5>;
268			micrel,led-mode = <1>;
269		};
270	};
271};
272
273&switch_port0 {
274	label = "lan0";
275	phy-mode = "mii";
276	phy-handle = <&switch0phy5>;
277	status = "okay";
278};
279
280&switch_port1 {
281	label = "lan1";
282	phy-mode = "mii";
283	phy-handle = <&switch0phy4>;
284	status = "okay";
285};
286
287&switch_port4 {
288	status = "okay";
289};
290
291&uart0 {
292	status = "okay";
293};
294
295&udc {
296	status = "okay";
297};
298
299&wdt0 {
300	timeout-sec = <60>;
301	status = "okay";
302};
303