1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the R-Car E2 (R8A77940) SoC 4 * 5 * Copyright (C) 2014 Renesas Electronics Corporation 6 * Copyright (C) 2014 Ulrich Hecht 7 */ 8 9#include <dt-bindings/clock/r8a7794-cpg-mssr.h> 10#include <dt-bindings/interrupt-controller/arm-gic.h> 11#include <dt-bindings/interrupt-controller/irq.h> 12#include <dt-bindings/power/r8a7794-sysc.h> 13 14/ { 15 compatible = "renesas,r8a7794"; 16 #address-cells = <2>; 17 #size-cells = <2>; 18 19 aliases { 20 i2c0 = &i2c0; 21 i2c1 = &i2c1; 22 i2c2 = &i2c2; 23 i2c3 = &i2c3; 24 i2c4 = &i2c4; 25 i2c5 = &i2c5; 26 i2c6 = &i2c6; 27 i2c7 = &i2c7; 28 spi0 = &qspi; 29 vin0 = &vin0; 30 vin1 = &vin1; 31 }; 32 33 /* 34 * The external audio clocks are configured as 0 Hz fixed frequency 35 * clocks by default. 36 * Boards that provide audio clocks should override them. 37 */ 38 audio_clka: audio_clka { 39 compatible = "fixed-clock"; 40 #clock-cells = <0>; 41 clock-frequency = <0>; 42 }; 43 audio_clkb: audio_clkb { 44 compatible = "fixed-clock"; 45 #clock-cells = <0>; 46 clock-frequency = <0>; 47 }; 48 audio_clkc: audio_clkc { 49 compatible = "fixed-clock"; 50 #clock-cells = <0>; 51 clock-frequency = <0>; 52 }; 53 54 /* External CAN clock */ 55 can_clk: can { 56 compatible = "fixed-clock"; 57 #clock-cells = <0>; 58 /* This value must be overridden by the board. */ 59 clock-frequency = <0>; 60 }; 61 62 cpus { 63 #address-cells = <1>; 64 #size-cells = <0>; 65 66 cpu0: cpu@0 { 67 device_type = "cpu"; 68 compatible = "arm,cortex-a7"; 69 reg = <0>; 70 clock-frequency = <1000000000>; 71 clocks = <&cpg CPG_CORE R8A7794_CLK_Z2>; 72 power-domains = <&sysc R8A7794_PD_CA7_CPU0>; 73 enable-method = "renesas,apmu"; 74 next-level-cache = <&L2_CA7>; 75 }; 76 77 cpu1: cpu@1 { 78 device_type = "cpu"; 79 compatible = "arm,cortex-a7"; 80 reg = <1>; 81 clock-frequency = <1000000000>; 82 clocks = <&cpg CPG_CORE R8A7794_CLK_Z2>; 83 power-domains = <&sysc R8A7794_PD_CA7_CPU1>; 84 enable-method = "renesas,apmu"; 85 next-level-cache = <&L2_CA7>; 86 }; 87 88 L2_CA7: cache-controller-0 { 89 compatible = "cache"; 90 power-domains = <&sysc R8A7794_PD_CA7_SCU>; 91 cache-unified; 92 cache-level = <2>; 93 }; 94 }; 95 96 /* External root clock */ 97 extal_clk: extal { 98 compatible = "fixed-clock"; 99 #clock-cells = <0>; 100 /* This value must be overridden by the board. */ 101 clock-frequency = <0>; 102 }; 103 104 pmu { 105 compatible = "arm,cortex-a7-pmu"; 106 interrupts-extended = <&gic GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>, 107 <&gic GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; 108 interrupt-affinity = <&cpu0>, <&cpu1>; 109 }; 110 111 /* External SCIF clock */ 112 scif_clk: scif { 113 compatible = "fixed-clock"; 114 #clock-cells = <0>; 115 /* This value must be overridden by the board. */ 116 clock-frequency = <0>; 117 }; 118 119 soc { 120 compatible = "simple-bus"; 121 interrupt-parent = <&gic>; 122 123 #address-cells = <2>; 124 #size-cells = <2>; 125 ranges; 126 127 rwdt: watchdog@e6020000 { 128 compatible = "renesas,r8a7794-wdt", 129 "renesas,rcar-gen2-wdt"; 130 reg = <0 0xe6020000 0 0x0c>; 131 interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>; 132 clocks = <&cpg CPG_MOD 402>; 133 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 134 resets = <&cpg 402>; 135 status = "disabled"; 136 }; 137 138 gpio0: gpio@e6050000 { 139 compatible = "renesas,gpio-r8a7794", 140 "renesas,rcar-gen2-gpio"; 141 reg = <0 0xe6050000 0 0x50>; 142 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 143 #gpio-cells = <2>; 144 gpio-controller; 145 gpio-ranges = <&pfc 0 0 32>; 146 #interrupt-cells = <2>; 147 interrupt-controller; 148 clocks = <&cpg CPG_MOD 912>; 149 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 150 resets = <&cpg 912>; 151 }; 152 153 gpio1: gpio@e6051000 { 154 compatible = "renesas,gpio-r8a7794", 155 "renesas,rcar-gen2-gpio"; 156 reg = <0 0xe6051000 0 0x50>; 157 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 158 #gpio-cells = <2>; 159 gpio-controller; 160 gpio-ranges = <&pfc 0 32 26>; 161 #interrupt-cells = <2>; 162 interrupt-controller; 163 clocks = <&cpg CPG_MOD 911>; 164 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 165 resets = <&cpg 911>; 166 }; 167 168 gpio2: gpio@e6052000 { 169 compatible = "renesas,gpio-r8a7794", 170 "renesas,rcar-gen2-gpio"; 171 reg = <0 0xe6052000 0 0x50>; 172 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 173 #gpio-cells = <2>; 174 gpio-controller; 175 gpio-ranges = <&pfc 0 64 32>; 176 #interrupt-cells = <2>; 177 interrupt-controller; 178 clocks = <&cpg CPG_MOD 910>; 179 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 180 resets = <&cpg 910>; 181 }; 182 183 gpio3: gpio@e6053000 { 184 compatible = "renesas,gpio-r8a7794", 185 "renesas,rcar-gen2-gpio"; 186 reg = <0 0xe6053000 0 0x50>; 187 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 188 #gpio-cells = <2>; 189 gpio-controller; 190 gpio-ranges = <&pfc 0 96 32>; 191 #interrupt-cells = <2>; 192 interrupt-controller; 193 clocks = <&cpg CPG_MOD 909>; 194 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 195 resets = <&cpg 909>; 196 }; 197 198 gpio4: gpio@e6054000 { 199 compatible = "renesas,gpio-r8a7794", 200 "renesas,rcar-gen2-gpio"; 201 reg = <0 0xe6054000 0 0x50>; 202 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 203 #gpio-cells = <2>; 204 gpio-controller; 205 gpio-ranges = <&pfc 0 128 32>; 206 #interrupt-cells = <2>; 207 interrupt-controller; 208 clocks = <&cpg CPG_MOD 908>; 209 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 210 resets = <&cpg 908>; 211 }; 212 213 gpio5: gpio@e6055000 { 214 compatible = "renesas,gpio-r8a7794", 215 "renesas,rcar-gen2-gpio"; 216 reg = <0 0xe6055000 0 0x50>; 217 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 218 #gpio-cells = <2>; 219 gpio-controller; 220 gpio-ranges = <&pfc 0 160 28>; 221 #interrupt-cells = <2>; 222 interrupt-controller; 223 clocks = <&cpg CPG_MOD 907>; 224 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 225 resets = <&cpg 907>; 226 }; 227 228 gpio6: gpio@e6055400 { 229 compatible = "renesas,gpio-r8a7794", 230 "renesas,rcar-gen2-gpio"; 231 reg = <0 0xe6055400 0 0x50>; 232 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 233 #gpio-cells = <2>; 234 gpio-controller; 235 gpio-ranges = <&pfc 0 192 26>; 236 #interrupt-cells = <2>; 237 interrupt-controller; 238 clocks = <&cpg CPG_MOD 905>; 239 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 240 resets = <&cpg 905>; 241 }; 242 243 pfc: pinctrl@e6060000 { 244 compatible = "renesas,pfc-r8a7794"; 245 reg = <0 0xe6060000 0 0x11c>; 246 }; 247 248 cpg: clock-controller@e6150000 { 249 compatible = "renesas,r8a7794-cpg-mssr"; 250 reg = <0 0xe6150000 0 0x1000>; 251 clocks = <&extal_clk>, <&usb_extal_clk>; 252 clock-names = "extal", "usb_extal"; 253 #clock-cells = <2>; 254 #power-domain-cells = <0>; 255 #reset-cells = <1>; 256 }; 257 258 apmu@e6151000 { 259 compatible = "renesas,r8a7794-apmu", "renesas,apmu"; 260 reg = <0 0xe6151000 0 0x188>; 261 cpus = <&cpu0>, <&cpu1>; 262 }; 263 264 rst: reset-controller@e6160000 { 265 compatible = "renesas,r8a7794-rst"; 266 reg = <0 0xe6160000 0 0x0100>; 267 }; 268 269 sysc: system-controller@e6180000 { 270 compatible = "renesas,r8a7794-sysc"; 271 reg = <0 0xe6180000 0 0x0200>; 272 #power-domain-cells = <1>; 273 }; 274 275 irqc0: interrupt-controller@e61c0000 { 276 compatible = "renesas,irqc-r8a7794", "renesas,irqc"; 277 #interrupt-cells = <2>; 278 interrupt-controller; 279 reg = <0 0xe61c0000 0 0x200>; 280 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 281 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 282 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, 283 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 284 <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>, 285 <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>, 286 <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>, 287 <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>, 288 <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>, 289 <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 290 clocks = <&cpg CPG_MOD 407>; 291 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 292 resets = <&cpg 407>; 293 }; 294 295 tmu0: timer@e61e0000 { 296 compatible = "renesas,tmu-r8a7794", "renesas,tmu"; 297 reg = <0 0xe61e0000 0 0x30>; 298 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, 299 <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>, 300 <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; 301 interrupt-names = "tuni0", "tuni1", "tuni2"; 302 clocks = <&cpg CPG_MOD 125>; 303 clock-names = "fck"; 304 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 305 resets = <&cpg 125>; 306 status = "disabled"; 307 }; 308 309 tmu1: timer@fff60000 { 310 compatible = "renesas,tmu-r8a7794", "renesas,tmu"; 311 reg = <0 0xfff60000 0 0x30>; 312 interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, 313 <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>, 314 <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, 315 <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>; 316 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; 317 clocks = <&cpg CPG_MOD 111>; 318 clock-names = "fck"; 319 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 320 resets = <&cpg 111>; 321 status = "disabled"; 322 }; 323 324 tmu2: timer@fff70000 { 325 compatible = "renesas,tmu-r8a7794", "renesas,tmu"; 326 reg = <0 0xfff70000 0 0x30>; 327 interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>, 328 <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>, 329 <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>, 330 <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>; 331 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; 332 clocks = <&cpg CPG_MOD 122>; 333 clock-names = "fck"; 334 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 335 resets = <&cpg 122>; 336 status = "disabled"; 337 }; 338 339 tmu3: timer@fff80000 { 340 compatible = "renesas,tmu-r8a7794", "renesas,tmu"; 341 reg = <0 0xfff80000 0 0x30>; 342 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, 343 <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>, 344 <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; 345 interrupt-names = "tuni0", "tuni1", "tuni2"; 346 clocks = <&cpg CPG_MOD 121>; 347 clock-names = "fck"; 348 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 349 resets = <&cpg 121>; 350 status = "disabled"; 351 }; 352 353 ipmmu_sy0: iommu@e6280000 { 354 compatible = "renesas,ipmmu-r8a7794", 355 "renesas,ipmmu-vmsa"; 356 reg = <0 0xe6280000 0 0x1000>; 357 interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>, 358 <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>; 359 #iommu-cells = <1>; 360 status = "disabled"; 361 }; 362 363 ipmmu_sy1: iommu@e6290000 { 364 compatible = "renesas,ipmmu-r8a7794", 365 "renesas,ipmmu-vmsa"; 366 reg = <0 0xe6290000 0 0x1000>; 367 interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>; 368 #iommu-cells = <1>; 369 status = "disabled"; 370 }; 371 372 ipmmu_ds: iommu@e6740000 { 373 compatible = "renesas,ipmmu-r8a7794", 374 "renesas,ipmmu-vmsa"; 375 reg = <0 0xe6740000 0 0x1000>; 376 interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>, 377 <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>; 378 #iommu-cells = <1>; 379 status = "disabled"; 380 }; 381 382 ipmmu_mp: iommu@ec680000 { 383 compatible = "renesas,ipmmu-r8a7794", 384 "renesas,ipmmu-vmsa"; 385 reg = <0 0xec680000 0 0x1000>; 386 interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>; 387 #iommu-cells = <1>; 388 status = "disabled"; 389 }; 390 391 ipmmu_mx: iommu@fe951000 { 392 compatible = "renesas,ipmmu-r8a7794", 393 "renesas,ipmmu-vmsa"; 394 reg = <0 0xfe951000 0 0x1000>; 395 interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>, 396 <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>; 397 #iommu-cells = <1>; 398 status = "disabled"; 399 }; 400 401 ipmmu_gp: iommu@e62a0000 { 402 compatible = "renesas,ipmmu-r8a7794", 403 "renesas,ipmmu-vmsa"; 404 reg = <0 0xe62a0000 0 0x1000>; 405 interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>, 406 <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>; 407 #iommu-cells = <1>; 408 status = "disabled"; 409 }; 410 411 icram0: sram@e63a0000 { 412 compatible = "mmio-sram"; 413 reg = <0 0xe63a0000 0 0x12000>; 414 #address-cells = <1>; 415 #size-cells = <1>; 416 ranges = <0 0 0xe63a0000 0x12000>; 417 }; 418 419 icram1: sram@e63c0000 { 420 compatible = "mmio-sram"; 421 reg = <0 0xe63c0000 0 0x1000>; 422 #address-cells = <1>; 423 #size-cells = <1>; 424 ranges = <0 0 0xe63c0000 0x1000>; 425 426 smp-sram@0 { 427 compatible = "renesas,smp-sram"; 428 reg = <0 0x100>; 429 }; 430 }; 431 432 /* The memory map in the User's Manual maps the cores to 433 * bus numbers 434 */ 435 i2c0: i2c@e6508000 { 436 compatible = "renesas,i2c-r8a7794", 437 "renesas,rcar-gen2-i2c"; 438 reg = <0 0xe6508000 0 0x40>; 439 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; 440 clocks = <&cpg CPG_MOD 931>; 441 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 442 resets = <&cpg 931>; 443 #address-cells = <1>; 444 #size-cells = <0>; 445 i2c-scl-internal-delay-ns = <6>; 446 status = "disabled"; 447 }; 448 449 i2c1: i2c@e6518000 { 450 compatible = "renesas,i2c-r8a7794", 451 "renesas,rcar-gen2-i2c"; 452 reg = <0 0xe6518000 0 0x40>; 453 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; 454 clocks = <&cpg CPG_MOD 930>; 455 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 456 resets = <&cpg 930>; 457 #address-cells = <1>; 458 #size-cells = <0>; 459 i2c-scl-internal-delay-ns = <6>; 460 status = "disabled"; 461 }; 462 463 i2c2: i2c@e6530000 { 464 compatible = "renesas,i2c-r8a7794", 465 "renesas,rcar-gen2-i2c"; 466 reg = <0 0xe6530000 0 0x40>; 467 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; 468 clocks = <&cpg CPG_MOD 929>; 469 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 470 resets = <&cpg 929>; 471 #address-cells = <1>; 472 #size-cells = <0>; 473 i2c-scl-internal-delay-ns = <6>; 474 status = "disabled"; 475 }; 476 477 i2c3: i2c@e6540000 { 478 compatible = "renesas,i2c-r8a7794", 479 "renesas,rcar-gen2-i2c"; 480 reg = <0 0xe6540000 0 0x40>; 481 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; 482 clocks = <&cpg CPG_MOD 928>; 483 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 484 resets = <&cpg 928>; 485 #address-cells = <1>; 486 #size-cells = <0>; 487 i2c-scl-internal-delay-ns = <6>; 488 status = "disabled"; 489 }; 490 491 i2c4: i2c@e6520000 { 492 compatible = "renesas,i2c-r8a7794", 493 "renesas,rcar-gen2-i2c"; 494 reg = <0 0xe6520000 0 0x40>; 495 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 496 clocks = <&cpg CPG_MOD 927>; 497 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 498 resets = <&cpg 927>; 499 #address-cells = <1>; 500 #size-cells = <0>; 501 i2c-scl-internal-delay-ns = <6>; 502 status = "disabled"; 503 }; 504 505 i2c5: i2c@e6528000 { 506 compatible = "renesas,i2c-r8a7794", 507 "renesas,rcar-gen2-i2c"; 508 reg = <0 0xe6528000 0 0x40>; 509 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 510 clocks = <&cpg CPG_MOD 925>; 511 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 512 resets = <&cpg 925>; 513 #address-cells = <1>; 514 #size-cells = <0>; 515 i2c-scl-internal-delay-ns = <6>; 516 status = "disabled"; 517 }; 518 519 i2c6: i2c@e6500000 { 520 compatible = "renesas,iic-r8a7794", 521 "renesas,rcar-gen2-iic", 522 "renesas,rmobile-iic"; 523 reg = <0 0xe6500000 0 0x425>; 524 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 525 clocks = <&cpg CPG_MOD 318>; 526 dmas = <&dmac0 0x61>, <&dmac0 0x62>, 527 <&dmac1 0x61>, <&dmac1 0x62>; 528 dma-names = "tx", "rx", "tx", "rx"; 529 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 530 resets = <&cpg 318>; 531 #address-cells = <1>; 532 #size-cells = <0>; 533 status = "disabled"; 534 }; 535 536 i2c7: i2c@e6510000 { 537 compatible = "renesas,iic-r8a7794", 538 "renesas,rcar-gen2-iic", 539 "renesas,rmobile-iic"; 540 reg = <0 0xe6510000 0 0x425>; 541 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; 542 clocks = <&cpg CPG_MOD 323>; 543 dmas = <&dmac0 0x65>, <&dmac0 0x66>, 544 <&dmac1 0x65>, <&dmac1 0x66>; 545 dma-names = "tx", "rx", "tx", "rx"; 546 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 547 resets = <&cpg 323>; 548 #address-cells = <1>; 549 #size-cells = <0>; 550 status = "disabled"; 551 }; 552 553 hsusb: usb@e6590000 { 554 compatible = "renesas,usbhs-r8a7794", 555 "renesas,rcar-gen2-usbhs"; 556 reg = <0 0xe6590000 0 0x100>; 557 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 558 clocks = <&cpg CPG_MOD 704>; 559 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 560 resets = <&cpg 704>; 561 renesas,buswait = <4>; 562 phys = <&usb0 1>; 563 phy-names = "usb"; 564 status = "disabled"; 565 }; 566 567 usbphy: usb-phy-controller@e6590100 { 568 compatible = "renesas,usb-phy-r8a7794", 569 "renesas,rcar-gen2-usb-phy"; 570 reg = <0 0xe6590100 0 0x100>; 571 #address-cells = <1>; 572 #size-cells = <0>; 573 clocks = <&cpg CPG_MOD 704>; 574 clock-names = "usbhs"; 575 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 576 resets = <&cpg 704>; 577 status = "disabled"; 578 579 usb0: usb-phy@0 { 580 reg = <0>; 581 #phy-cells = <1>; 582 }; 583 usb2: usb-phy@2 { 584 reg = <2>; 585 #phy-cells = <1>; 586 }; 587 }; 588 589 dmac0: dma-controller@e6700000 { 590 compatible = "renesas,dmac-r8a7794", 591 "renesas,rcar-dmac"; 592 reg = <0 0xe6700000 0 0x20000>; 593 interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>, 594 <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>, 595 <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>, 596 <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>, 597 <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>, 598 <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, 599 <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>, 600 <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>, 601 <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>, 602 <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>, 603 <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>, 604 <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, 605 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>, 606 <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>, 607 <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>, 608 <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>; 609 interrupt-names = "error", 610 "ch0", "ch1", "ch2", "ch3", 611 "ch4", "ch5", "ch6", "ch7", 612 "ch8", "ch9", "ch10", "ch11", 613 "ch12", "ch13", "ch14"; 614 clocks = <&cpg CPG_MOD 219>; 615 clock-names = "fck"; 616 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 617 resets = <&cpg 219>; 618 #dma-cells = <1>; 619 dma-channels = <15>; 620 }; 621 622 dmac1: dma-controller@e6720000 { 623 compatible = "renesas,dmac-r8a7794", 624 "renesas,rcar-dmac"; 625 reg = <0 0xe6720000 0 0x20000>; 626 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>, 627 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>, 628 <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>, 629 <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>, 630 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>, 631 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, 632 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, 633 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, 634 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, 635 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>, 636 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>, 637 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>, 638 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, 639 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, 640 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, 641 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>; 642 interrupt-names = "error", 643 "ch0", "ch1", "ch2", "ch3", 644 "ch4", "ch5", "ch6", "ch7", 645 "ch8", "ch9", "ch10", "ch11", 646 "ch12", "ch13", "ch14"; 647 clocks = <&cpg CPG_MOD 218>; 648 clock-names = "fck"; 649 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 650 resets = <&cpg 218>; 651 #dma-cells = <1>; 652 dma-channels = <15>; 653 }; 654 655 avb: ethernet@e6800000 { 656 compatible = "renesas,etheravb-r8a7794", 657 "renesas,etheravb-rcar-gen2"; 658 reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>; 659 interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>; 660 clocks = <&cpg CPG_MOD 812>; 661 clock-names = "fck"; 662 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 663 resets = <&cpg 812>; 664 #address-cells = <1>; 665 #size-cells = <0>; 666 status = "disabled"; 667 }; 668 669 qspi: spi@e6b10000 { 670 compatible = "renesas,qspi-r8a7794", "renesas,qspi"; 671 reg = <0 0xe6b10000 0 0x2c>; 672 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; 673 clocks = <&cpg CPG_MOD 917>; 674 dmas = <&dmac0 0x17>, <&dmac0 0x18>, 675 <&dmac1 0x17>, <&dmac1 0x18>; 676 dma-names = "tx", "rx", "tx", "rx"; 677 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 678 resets = <&cpg 917>; 679 num-cs = <1>; 680 #address-cells = <1>; 681 #size-cells = <0>; 682 status = "disabled"; 683 }; 684 685 scifa0: serial@e6c40000 { 686 compatible = "renesas,scifa-r8a7794", 687 "renesas,rcar-gen2-scifa", "renesas,scifa"; 688 reg = <0 0xe6c40000 0 64>; 689 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; 690 clocks = <&cpg CPG_MOD 204>; 691 clock-names = "fck"; 692 dmas = <&dmac0 0x21>, <&dmac0 0x22>, 693 <&dmac1 0x21>, <&dmac1 0x22>; 694 dma-names = "tx", "rx", "tx", "rx"; 695 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 696 resets = <&cpg 204>; 697 status = "disabled"; 698 }; 699 700 scifa1: serial@e6c50000 { 701 compatible = "renesas,scifa-r8a7794", 702 "renesas,rcar-gen2-scifa", "renesas,scifa"; 703 reg = <0 0xe6c50000 0 64>; 704 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; 705 clocks = <&cpg CPG_MOD 203>; 706 clock-names = "fck"; 707 dmas = <&dmac0 0x25>, <&dmac0 0x26>, 708 <&dmac1 0x25>, <&dmac1 0x26>; 709 dma-names = "tx", "rx", "tx", "rx"; 710 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 711 resets = <&cpg 203>; 712 status = "disabled"; 713 }; 714 715 scifa2: serial@e6c60000 { 716 compatible = "renesas,scifa-r8a7794", 717 "renesas,rcar-gen2-scifa", "renesas,scifa"; 718 reg = <0 0xe6c60000 0 64>; 719 interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>; 720 clocks = <&cpg CPG_MOD 202>; 721 clock-names = "fck"; 722 dmas = <&dmac0 0x27>, <&dmac0 0x28>, 723 <&dmac1 0x27>, <&dmac1 0x28>; 724 dma-names = "tx", "rx", "tx", "rx"; 725 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 726 resets = <&cpg 202>; 727 status = "disabled"; 728 }; 729 730 scifa3: serial@e6c70000 { 731 compatible = "renesas,scifa-r8a7794", 732 "renesas,rcar-gen2-scifa", "renesas,scifa"; 733 reg = <0 0xe6c70000 0 64>; 734 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; 735 clocks = <&cpg CPG_MOD 1106>; 736 clock-names = "fck"; 737 dmas = <&dmac0 0x1b>, <&dmac0 0x1c>, 738 <&dmac1 0x1b>, <&dmac1 0x1c>; 739 dma-names = "tx", "rx", "tx", "rx"; 740 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 741 resets = <&cpg 1106>; 742 status = "disabled"; 743 }; 744 745 scifa4: serial@e6c78000 { 746 compatible = "renesas,scifa-r8a7794", 747 "renesas,rcar-gen2-scifa", "renesas,scifa"; 748 reg = <0 0xe6c78000 0 64>; 749 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; 750 clocks = <&cpg CPG_MOD 1107>; 751 clock-names = "fck"; 752 dmas = <&dmac0 0x1f>, <&dmac0 0x20>, 753 <&dmac1 0x1f>, <&dmac1 0x20>; 754 dma-names = "tx", "rx", "tx", "rx"; 755 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 756 resets = <&cpg 1107>; 757 status = "disabled"; 758 }; 759 760 scifa5: serial@e6c80000 { 761 compatible = "renesas,scifa-r8a7794", 762 "renesas,rcar-gen2-scifa", "renesas,scifa"; 763 reg = <0 0xe6c80000 0 64>; 764 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; 765 clocks = <&cpg CPG_MOD 1108>; 766 clock-names = "fck"; 767 dmas = <&dmac0 0x23>, <&dmac0 0x24>, 768 <&dmac1 0x23>, <&dmac1 0x24>; 769 dma-names = "tx", "rx", "tx", "rx"; 770 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 771 resets = <&cpg 1108>; 772 status = "disabled"; 773 }; 774 775 scifb0: serial@e6c20000 { 776 compatible = "renesas,scifb-r8a7794", 777 "renesas,rcar-gen2-scifb", "renesas,scifb"; 778 reg = <0 0xe6c20000 0 0x100>; 779 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; 780 clocks = <&cpg CPG_MOD 206>; 781 clock-names = "fck"; 782 dmas = <&dmac0 0x3d>, <&dmac0 0x3e>, 783 <&dmac1 0x3d>, <&dmac1 0x3e>; 784 dma-names = "tx", "rx", "tx", "rx"; 785 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 786 resets = <&cpg 206>; 787 status = "disabled"; 788 }; 789 790 scifb1: serial@e6c30000 { 791 compatible = "renesas,scifb-r8a7794", 792 "renesas,rcar-gen2-scifb", "renesas,scifb"; 793 reg = <0 0xe6c30000 0 0x100>; 794 interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>; 795 clocks = <&cpg CPG_MOD 207>; 796 clock-names = "fck"; 797 dmas = <&dmac0 0x19>, <&dmac0 0x1a>, 798 <&dmac1 0x19>, <&dmac1 0x1a>; 799 dma-names = "tx", "rx", "tx", "rx"; 800 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 801 resets = <&cpg 207>; 802 status = "disabled"; 803 }; 804 805 scifb2: serial@e6ce0000 { 806 compatible = "renesas,scifb-r8a7794", 807 "renesas,rcar-gen2-scifb", "renesas,scifb"; 808 reg = <0 0xe6ce0000 0 0x100>; 809 interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; 810 clocks = <&cpg CPG_MOD 216>; 811 clock-names = "fck"; 812 dmas = <&dmac0 0x1d>, <&dmac0 0x1e>, 813 <&dmac1 0x1d>, <&dmac1 0x1e>; 814 dma-names = "tx", "rx", "tx", "rx"; 815 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 816 resets = <&cpg 216>; 817 status = "disabled"; 818 }; 819 820 scif0: serial@e6e60000 { 821 compatible = "renesas,scif-r8a7794", 822 "renesas,rcar-gen2-scif", 823 "renesas,scif"; 824 reg = <0 0xe6e60000 0 64>; 825 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; 826 clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7794_CLK_ZS>, 827 <&scif_clk>; 828 clock-names = "fck", "brg_int", "scif_clk"; 829 dmas = <&dmac0 0x29>, <&dmac0 0x2a>, 830 <&dmac1 0x29>, <&dmac1 0x2a>; 831 dma-names = "tx", "rx", "tx", "rx"; 832 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 833 resets = <&cpg 721>; 834 status = "disabled"; 835 }; 836 837 scif1: serial@e6e68000 { 838 compatible = "renesas,scif-r8a7794", 839 "renesas,rcar-gen2-scif", 840 "renesas,scif"; 841 reg = <0 0xe6e68000 0 64>; 842 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; 843 clocks = <&cpg CPG_MOD 720>, <&cpg CPG_CORE R8A7794_CLK_ZS>, 844 <&scif_clk>; 845 clock-names = "fck", "brg_int", "scif_clk"; 846 dmas = <&dmac0 0x2d>, <&dmac0 0x2e>, 847 <&dmac1 0x2d>, <&dmac1 0x2e>; 848 dma-names = "tx", "rx", "tx", "rx"; 849 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 850 resets = <&cpg 720>; 851 status = "disabled"; 852 }; 853 854 scif2: serial@e6e58000 { 855 compatible = "renesas,scif-r8a7794", 856 "renesas,rcar-gen2-scif", "renesas,scif"; 857 reg = <0 0xe6e58000 0 64>; 858 interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; 859 clocks = <&cpg CPG_MOD 719>, <&cpg CPG_CORE R8A7794_CLK_ZS>, 860 <&scif_clk>; 861 clock-names = "fck", "brg_int", "scif_clk"; 862 dmas = <&dmac0 0x2b>, <&dmac0 0x2c>, 863 <&dmac1 0x2b>, <&dmac1 0x2c>; 864 dma-names = "tx", "rx", "tx", "rx"; 865 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 866 resets = <&cpg 719>; 867 status = "disabled"; 868 }; 869 870 scif3: serial@e6ea8000 { 871 compatible = "renesas,scif-r8a7794", 872 "renesas,rcar-gen2-scif", "renesas,scif"; 873 reg = <0 0xe6ea8000 0 64>; 874 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 875 clocks = <&cpg CPG_MOD 718>, <&cpg CPG_CORE R8A7794_CLK_ZS>, 876 <&scif_clk>; 877 clock-names = "fck", "brg_int", "scif_clk"; 878 dmas = <&dmac0 0x2f>, <&dmac0 0x30>, 879 <&dmac1 0x2f>, <&dmac1 0x30>; 880 dma-names = "tx", "rx", "tx", "rx"; 881 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 882 resets = <&cpg 718>; 883 status = "disabled"; 884 }; 885 886 scif4: serial@e6ee0000 { 887 compatible = "renesas,scif-r8a7794", 888 "renesas,rcar-gen2-scif", "renesas,scif"; 889 reg = <0 0xe6ee0000 0 64>; 890 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; 891 clocks = <&cpg CPG_MOD 715>, <&cpg CPG_CORE R8A7794_CLK_ZS>, 892 <&scif_clk>; 893 clock-names = "fck", "brg_int", "scif_clk"; 894 dmas = <&dmac0 0xfb>, <&dmac0 0xfc>, 895 <&dmac1 0xfb>, <&dmac1 0xfc>; 896 dma-names = "tx", "rx", "tx", "rx"; 897 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 898 resets = <&cpg 715>; 899 status = "disabled"; 900 }; 901 902 scif5: serial@e6ee8000 { 903 compatible = "renesas,scif-r8a7794", 904 "renesas,rcar-gen2-scif", "renesas,scif"; 905 reg = <0 0xe6ee8000 0 64>; 906 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; 907 clocks = <&cpg CPG_MOD 714>, <&cpg CPG_CORE R8A7794_CLK_ZS>, 908 <&scif_clk>; 909 clock-names = "fck", "brg_int", "scif_clk"; 910 dmas = <&dmac0 0xfd>, <&dmac0 0xfe>, 911 <&dmac1 0xfd>, <&dmac1 0xfe>; 912 dma-names = "tx", "rx", "tx", "rx"; 913 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 914 resets = <&cpg 714>; 915 status = "disabled"; 916 }; 917 918 hscif0: serial@e62c0000 { 919 compatible = "renesas,hscif-r8a7794", 920 "renesas,rcar-gen2-hscif", "renesas,hscif"; 921 reg = <0 0xe62c0000 0 96>; 922 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; 923 clocks = <&cpg CPG_MOD 717>, 924 <&cpg CPG_CORE R8A7794_CLK_ZS>, <&scif_clk>; 925 clock-names = "fck", "brg_int", "scif_clk"; 926 dmas = <&dmac0 0x39>, <&dmac0 0x3a>, 927 <&dmac1 0x39>, <&dmac1 0x3a>; 928 dma-names = "tx", "rx", "tx", "rx"; 929 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 930 resets = <&cpg 717>; 931 status = "disabled"; 932 }; 933 934 hscif1: serial@e62c8000 { 935 compatible = "renesas,hscif-r8a7794", 936 "renesas,rcar-gen2-hscif", "renesas,hscif"; 937 reg = <0 0xe62c8000 0 96>; 938 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; 939 clocks = <&cpg CPG_MOD 716>, 940 <&cpg CPG_CORE R8A7794_CLK_ZS>, <&scif_clk>; 941 clock-names = "fck", "brg_int", "scif_clk"; 942 dmas = <&dmac0 0x4d>, <&dmac0 0x4e>, 943 <&dmac1 0x4d>, <&dmac1 0x4e>; 944 dma-names = "tx", "rx", "tx", "rx"; 945 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 946 resets = <&cpg 716>; 947 status = "disabled"; 948 }; 949 950 hscif2: serial@e62d0000 { 951 compatible = "renesas,hscif-r8a7794", 952 "renesas,rcar-gen2-hscif", "renesas,hscif"; 953 reg = <0 0xe62d0000 0 96>; 954 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 955 clocks = <&cpg CPG_MOD 713>, <&cpg CPG_CORE R8A7794_CLK_ZS>, 956 <&scif_clk>; 957 clock-names = "fck", "brg_int", "scif_clk"; 958 dmas = <&dmac0 0x3b>, <&dmac0 0x3c>, 959 <&dmac1 0x3b>, <&dmac1 0x3c>; 960 dma-names = "tx", "rx", "tx", "rx"; 961 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 962 resets = <&cpg 713>; 963 status = "disabled"; 964 }; 965 966 can0: can@e6e80000 { 967 compatible = "renesas,can-r8a7794", 968 "renesas,rcar-gen2-can"; 969 reg = <0 0xe6e80000 0 0x1000>; 970 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; 971 clocks = <&cpg CPG_MOD 916>, <&cpg CPG_CORE R8A7794_CLK_RCAN>, 972 <&can_clk>; 973 clock-names = "clkp1", "clkp2", "can_clk"; 974 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 975 resets = <&cpg 916>; 976 status = "disabled"; 977 }; 978 979 can1: can@e6e88000 { 980 compatible = "renesas,can-r8a7794", 981 "renesas,rcar-gen2-can"; 982 reg = <0 0xe6e88000 0 0x1000>; 983 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; 984 clocks = <&cpg CPG_MOD 915>, <&cpg CPG_CORE R8A7794_CLK_RCAN>, 985 <&can_clk>; 986 clock-names = "clkp1", "clkp2", "can_clk"; 987 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 988 resets = <&cpg 915>; 989 status = "disabled"; 990 }; 991 992 vin0: video@e6ef0000 { 993 compatible = "renesas,vin-r8a7794", 994 "renesas,rcar-gen2-vin"; 995 reg = <0 0xe6ef0000 0 0x1000>; 996 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; 997 clocks = <&cpg CPG_MOD 811>; 998 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 999 resets = <&cpg 811>; 1000 status = "disabled"; 1001 }; 1002 1003 vin1: video@e6ef1000 { 1004 compatible = "renesas,vin-r8a7794", 1005 "renesas,rcar-gen2-vin"; 1006 reg = <0 0xe6ef1000 0 0x1000>; 1007 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; 1008 clocks = <&cpg CPG_MOD 810>; 1009 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 1010 resets = <&cpg 810>; 1011 status = "disabled"; 1012 }; 1013 1014 rcar_sound: sound@ec500000 { 1015 /* 1016 * #sound-dai-cells is required if simple-card 1017 * 1018 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; 1019 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; 1020 */ 1021 compatible = "renesas,rcar_sound-r8a7794", 1022 "renesas,rcar_sound-gen2"; 1023 reg = <0 0xec500000 0 0x1000>, /* SCU */ 1024 <0 0xec5a0000 0 0x100>, /* ADG */ 1025 <0 0xec540000 0 0x1000>, /* SSIU */ 1026 <0 0xec541000 0 0x280>, /* SSI */ 1027 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri */ 1028 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; 1029 1030 clocks = <&cpg CPG_MOD 1005>, 1031 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, 1032 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, 1033 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, 1034 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, 1035 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, 1036 <&cpg CPG_MOD 1025>, <&cpg CPG_MOD 1026>, 1037 <&cpg CPG_MOD 1027>, <&cpg CPG_MOD 1028>, 1038 <&cpg CPG_MOD 1029>, <&cpg CPG_MOD 1030>, 1039 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>, 1040 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>, 1041 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, 1042 <&audio_clka>, <&audio_clkb>, <&audio_clkc>, 1043 <&cpg CPG_CORE R8A7794_CLK_M2>; 1044 clock-names = "ssi-all", 1045 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1046 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1047 "ssi.1", "ssi.0", 1048 "src.6", "src.5", "src.4", "src.3", 1049 "src.2", "src.1", 1050 "ctu.0", "ctu.1", 1051 "mix.0", "mix.1", 1052 "dvc.0", "dvc.1", 1053 "clk_a", "clk_b", "clk_c", "clk_i"; 1054 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 1055 resets = <&cpg 1005>, 1056 <&cpg 1006>, <&cpg 1007>, 1057 <&cpg 1008>, <&cpg 1009>, 1058 <&cpg 1010>, <&cpg 1011>, 1059 <&cpg 1012>, <&cpg 1013>, 1060 <&cpg 1014>, <&cpg 1015>; 1061 reset-names = "ssi-all", 1062 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1063 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1064 "ssi.1", "ssi.0"; 1065 1066 status = "disabled"; 1067 1068 rcar_sound,dvc { 1069 dvc0: dvc-0 { 1070 dmas = <&audma0 0xbc>; 1071 dma-names = "tx"; 1072 }; 1073 dvc1: dvc-1 { 1074 dmas = <&audma0 0xbe>; 1075 dma-names = "tx"; 1076 }; 1077 }; 1078 1079 rcar_sound,mix { 1080 mix0: mix-0 { }; 1081 mix1: mix-1 { }; 1082 }; 1083 1084 rcar_sound,ctu { 1085 ctu00: ctu-0 { }; 1086 ctu01: ctu-1 { }; 1087 ctu02: ctu-2 { }; 1088 ctu03: ctu-3 { }; 1089 ctu10: ctu-4 { }; 1090 ctu11: ctu-5 { }; 1091 ctu12: ctu-6 { }; 1092 ctu13: ctu-7 { }; 1093 }; 1094 1095 rcar_sound,src { 1096 src-0 { 1097 status = "disabled"; 1098 }; 1099 src1: src-1 { 1100 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 1101 dmas = <&audma0 0x87>, <&audma0 0x9c>; 1102 dma-names = "rx", "tx"; 1103 }; 1104 src2: src-2 { 1105 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; 1106 dmas = <&audma0 0x89>, <&audma0 0x9e>; 1107 dma-names = "rx", "tx"; 1108 }; 1109 src3: src-3 { 1110 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 1111 dmas = <&audma0 0x8b>, <&audma0 0xa0>; 1112 dma-names = "rx", "tx"; 1113 }; 1114 src4: src-4 { 1115 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; 1116 dmas = <&audma0 0x8d>, <&audma0 0xb0>; 1117 dma-names = "rx", "tx"; 1118 }; 1119 src5: src-5 { 1120 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 1121 dmas = <&audma0 0x8f>, <&audma0 0xb2>; 1122 dma-names = "rx", "tx"; 1123 }; 1124 src6: src-6 { 1125 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 1126 dmas = <&audma0 0x91>, <&audma0 0xb4>; 1127 dma-names = "rx", "tx"; 1128 }; 1129 }; 1130 1131 rcar_sound,ssi { 1132 ssi0: ssi-0 { 1133 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; 1134 dmas = <&audma0 0x01>, <&audma0 0x02>, 1135 <&audma0 0x15>, <&audma0 0x16>; 1136 dma-names = "rx", "tx", "rxu", "txu"; 1137 }; 1138 ssi1: ssi-1 { 1139 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; 1140 dmas = <&audma0 0x03>, <&audma0 0x04>, 1141 <&audma0 0x49>, <&audma0 0x4a>; 1142 dma-names = "rx", "tx", "rxu", "txu"; 1143 }; 1144 ssi2: ssi-2 { 1145 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; 1146 dmas = <&audma0 0x05>, <&audma0 0x06>, 1147 <&audma0 0x63>, <&audma0 0x64>; 1148 dma-names = "rx", "tx", "rxu", "txu"; 1149 }; 1150 ssi3: ssi-3 { 1151 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; 1152 dmas = <&audma0 0x07>, <&audma0 0x08>, 1153 <&audma0 0x6f>, <&audma0 0x70>; 1154 dma-names = "rx", "tx", "rxu", "txu"; 1155 }; 1156 ssi4: ssi-4 { 1157 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; 1158 dmas = <&audma0 0x09>, <&audma0 0x0a>, 1159 <&audma0 0x71>, <&audma0 0x72>; 1160 dma-names = "rx", "tx", "rxu", "txu"; 1161 }; 1162 ssi5: ssi-5 { 1163 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; 1164 dmas = <&audma0 0x0b>, <&audma0 0x0c>, 1165 <&audma0 0x73>, <&audma0 0x74>; 1166 dma-names = "rx", "tx", "rxu", "txu"; 1167 }; 1168 ssi6: ssi-6 { 1169 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; 1170 dmas = <&audma0 0x0d>, <&audma0 0x0e>, 1171 <&audma0 0x75>, <&audma0 0x76>; 1172 dma-names = "rx", "tx", "rxu", "txu"; 1173 }; 1174 ssi7: ssi-7 { 1175 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; 1176 dmas = <&audma0 0x0f>, <&audma0 0x10>, 1177 <&audma0 0x79>, <&audma0 0x7a>; 1178 dma-names = "rx", "tx", "rxu", "txu"; 1179 }; 1180 ssi8: ssi-8 { 1181 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; 1182 dmas = <&audma0 0x11>, <&audma0 0x12>, 1183 <&audma0 0x7b>, <&audma0 0x7c>; 1184 dma-names = "rx", "tx", "rxu", "txu"; 1185 }; 1186 ssi9: ssi-9 { 1187 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; 1188 dmas = <&audma0 0x13>, <&audma0 0x14>, 1189 <&audma0 0x7d>, <&audma0 0x7e>; 1190 dma-names = "rx", "tx", "rxu", "txu"; 1191 }; 1192 }; 1193 }; 1194 1195 audma0: dma-controller@ec700000 { 1196 compatible = "renesas,dmac-r8a7794", 1197 "renesas,rcar-dmac"; 1198 reg = <0 0xec700000 0 0x10000>; 1199 interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>, 1200 <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, 1201 <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, 1202 <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, 1203 <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, 1204 <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, 1205 <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, 1206 <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, 1207 <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, 1208 <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, 1209 <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, 1210 <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, 1211 <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, 1212 <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>; 1213 interrupt-names = "error", 1214 "ch0", "ch1", "ch2", "ch3", "ch4", 1215 "ch5", "ch6", "ch7", "ch8", "ch9", 1216 "ch10", "ch11", 1217 "ch12"; 1218 clocks = <&cpg CPG_MOD 502>; 1219 clock-names = "fck"; 1220 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 1221 resets = <&cpg 502>; 1222 #dma-cells = <1>; 1223 dma-channels = <13>; 1224 }; 1225 1226 pci0: pci@ee090000 { 1227 compatible = "renesas,pci-r8a7794", 1228 "renesas,pci-rcar-gen2"; 1229 device_type = "pci"; 1230 reg = <0 0xee090000 0 0xc00>, 1231 <0 0xee080000 0 0x1100>; 1232 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1233 clocks = <&cpg CPG_MOD 703>; 1234 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 1235 resets = <&cpg 703>; 1236 status = "disabled"; 1237 1238 bus-range = <0 0>; 1239 #address-cells = <3>; 1240 #size-cells = <2>; 1241 #interrupt-cells = <1>; 1242 ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>; 1243 interrupt-map-mask = <0xf800 0 0 0x7>; 1244 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, 1245 <0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, 1246 <0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1247 1248 usb@1,0 { 1249 reg = <0x800 0 0 0 0>; 1250 phys = <&usb0 0>; 1251 phy-names = "usb"; 1252 }; 1253 1254 usb@2,0 { 1255 reg = <0x1000 0 0 0 0>; 1256 phys = <&usb0 0>; 1257 phy-names = "usb"; 1258 }; 1259 }; 1260 1261 pci1: pci@ee0d0000 { 1262 compatible = "renesas,pci-r8a7794", 1263 "renesas,pci-rcar-gen2"; 1264 device_type = "pci"; 1265 reg = <0 0xee0d0000 0 0xc00>, 1266 <0 0xee0c0000 0 0x1100>; 1267 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; 1268 clocks = <&cpg CPG_MOD 703>; 1269 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 1270 resets = <&cpg 703>; 1271 status = "disabled"; 1272 1273 bus-range = <1 1>; 1274 #address-cells = <3>; 1275 #size-cells = <2>; 1276 #interrupt-cells = <1>; 1277 ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>; 1278 interrupt-map-mask = <0xf800 0 0 0x7>; 1279 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, 1280 <0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, 1281 <0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; 1282 1283 usb@1,0 { 1284 reg = <0x10800 0 0 0 0>; 1285 phys = <&usb2 0>; 1286 phy-names = "usb"; 1287 }; 1288 1289 usb@2,0 { 1290 reg = <0x11000 0 0 0 0>; 1291 phys = <&usb2 0>; 1292 phy-names = "usb"; 1293 }; 1294 }; 1295 1296 sdhi0: mmc@ee100000 { 1297 compatible = "renesas,sdhi-r8a7794", 1298 "renesas,rcar-gen2-sdhi"; 1299 reg = <0 0xee100000 0 0x328>; 1300 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 1301 clocks = <&cpg CPG_MOD 314>; 1302 dmas = <&dmac0 0xcd>, <&dmac0 0xce>, 1303 <&dmac1 0xcd>, <&dmac1 0xce>; 1304 dma-names = "tx", "rx", "tx", "rx"; 1305 max-frequency = <195000000>; 1306 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 1307 resets = <&cpg 314>; 1308 status = "disabled"; 1309 }; 1310 1311 sdhi1: mmc@ee140000 { 1312 compatible = "renesas,sdhi-r8a7794", 1313 "renesas,rcar-gen2-sdhi"; 1314 reg = <0 0xee140000 0 0x100>; 1315 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; 1316 clocks = <&cpg CPG_MOD 312>; 1317 dmas = <&dmac0 0xc1>, <&dmac0 0xc2>, 1318 <&dmac1 0xc1>, <&dmac1 0xc2>; 1319 dma-names = "tx", "rx", "tx", "rx"; 1320 max-frequency = <97500000>; 1321 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 1322 resets = <&cpg 312>; 1323 status = "disabled"; 1324 }; 1325 1326 sdhi2: mmc@ee160000 { 1327 compatible = "renesas,sdhi-r8a7794", 1328 "renesas,rcar-gen2-sdhi"; 1329 reg = <0 0xee160000 0 0x100>; 1330 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; 1331 clocks = <&cpg CPG_MOD 311>; 1332 dmas = <&dmac0 0xd3>, <&dmac0 0xd4>, 1333 <&dmac1 0xd3>, <&dmac1 0xd4>; 1334 dma-names = "tx", "rx", "tx", "rx"; 1335 max-frequency = <97500000>; 1336 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 1337 resets = <&cpg 311>; 1338 status = "disabled"; 1339 }; 1340 1341 mmcif0: mmc@ee200000 { 1342 compatible = "renesas,mmcif-r8a7794", 1343 "renesas,sh-mmcif"; 1344 reg = <0 0xee200000 0 0x80>; 1345 interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>; 1346 clocks = <&cpg CPG_MOD 315>; 1347 dmas = <&dmac0 0xd1>, <&dmac0 0xd2>, 1348 <&dmac1 0xd1>, <&dmac1 0xd2>; 1349 dma-names = "tx", "rx", "tx", "rx"; 1350 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 1351 resets = <&cpg 315>; 1352 reg-io-width = <4>; 1353 status = "disabled"; 1354 }; 1355 1356 ether: ethernet@ee700000 { 1357 compatible = "renesas,ether-r8a7794", 1358 "renesas,rcar-gen2-ether"; 1359 reg = <0 0xee700000 0 0x400>; 1360 interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>; 1361 clocks = <&cpg CPG_MOD 813>; 1362 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 1363 resets = <&cpg 813>; 1364 phy-mode = "rmii"; 1365 #address-cells = <1>; 1366 #size-cells = <0>; 1367 status = "disabled"; 1368 }; 1369 1370 gic: interrupt-controller@f1001000 { 1371 compatible = "arm,gic-400"; 1372 #interrupt-cells = <3>; 1373 #address-cells = <0>; 1374 interrupt-controller; 1375 reg = <0 0xf1001000 0 0x1000>, 1376 <0 0xf1002000 0 0x2000>, 1377 <0 0xf1004000 0 0x2000>, 1378 <0 0xf1006000 0 0x2000>; 1379 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; 1380 clocks = <&cpg CPG_MOD 408>; 1381 clock-names = "clk"; 1382 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 1383 resets = <&cpg 408>; 1384 }; 1385 1386 vsp@fe928000 { 1387 compatible = "renesas,vsp1"; 1388 reg = <0 0xfe928000 0 0x8000>; 1389 interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>; 1390 clocks = <&cpg CPG_MOD 131>; 1391 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 1392 resets = <&cpg 131>; 1393 }; 1394 1395 vsp@fe930000 { 1396 compatible = "renesas,vsp1"; 1397 reg = <0 0xfe930000 0 0x8000>; 1398 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 1399 clocks = <&cpg CPG_MOD 128>; 1400 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 1401 resets = <&cpg 128>; 1402 }; 1403 1404 fdp1@fe940000 { 1405 compatible = "renesas,fdp1"; 1406 reg = <0 0xfe940000 0 0x2400>; 1407 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>; 1408 clocks = <&cpg CPG_MOD 119>; 1409 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 1410 resets = <&cpg 119>; 1411 }; 1412 1413 du: display@feb00000 { 1414 compatible = "renesas,du-r8a7794"; 1415 reg = <0 0xfeb00000 0 0x40000>; 1416 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, 1417 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>; 1418 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>; 1419 clock-names = "du.0", "du.1"; 1420 resets = <&cpg 724>; 1421 reset-names = "du.0"; 1422 status = "disabled"; 1423 1424 ports { 1425 #address-cells = <1>; 1426 #size-cells = <0>; 1427 1428 port@0 { 1429 reg = <0>; 1430 du_out_rgb0: endpoint { 1431 }; 1432 }; 1433 port@1 { 1434 reg = <1>; 1435 du_out_rgb1: endpoint { 1436 }; 1437 }; 1438 }; 1439 }; 1440 1441 prr: chipid@ff000044 { 1442 compatible = "renesas,prr"; 1443 reg = <0 0xff000044 0 4>; 1444 }; 1445 1446 cmt0: timer@ffca0000 { 1447 compatible = "renesas,r8a7794-cmt0", 1448 "renesas,rcar-gen2-cmt0"; 1449 reg = <0 0xffca0000 0 0x1004>; 1450 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, 1451 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; 1452 clocks = <&cpg CPG_MOD 124>; 1453 clock-names = "fck"; 1454 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 1455 resets = <&cpg 124>; 1456 1457 status = "disabled"; 1458 }; 1459 1460 cmt1: timer@e6130000 { 1461 compatible = "renesas,r8a7794-cmt1", 1462 "renesas,rcar-gen2-cmt1"; 1463 reg = <0 0xe6130000 0 0x1004>; 1464 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, 1465 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, 1466 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, 1467 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, 1468 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, 1469 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, 1470 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, 1471 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; 1472 clocks = <&cpg CPG_MOD 329>; 1473 clock-names = "fck"; 1474 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 1475 resets = <&cpg 329>; 1476 1477 status = "disabled"; 1478 }; 1479 }; 1480 1481 timer { 1482 compatible = "arm,armv7-timer"; 1483 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1484 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1485 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1486 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; 1487 interrupt-names = "sec-phys", "phys", "virt", "hyp-phys"; 1488 }; 1489 1490 /* External USB clock - can be overridden by the board */ 1491 usb_extal_clk: usb_extal { 1492 compatible = "fixed-clock"; 1493 #clock-cells = <0>; 1494 clock-frequency = <48000000>; 1495 }; 1496}; 1497