1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the RZ/A1H RSK board 4 * 5 * Copyright (C) 2016 Renesas Electronics 6 */ 7 8/dts-v1/; 9#include "r7s72100.dtsi" 10#include <dt-bindings/gpio/gpio.h> 11#include <dt-bindings/input/input.h> 12#include <dt-bindings/pinctrl/r7s72100-pinctrl.h> 13 14/ { 15 model = "RSKRZA1"; 16 compatible = "renesas,rskrza1", "renesas,r7s72100"; 17 18 aliases { 19 serial0 = &scif2; 20 }; 21 22 chosen { 23 bootargs = "ignore_loglevel"; 24 stdout-path = "serial0:115200n8"; 25 }; 26 27 memory@8000000 { 28 device_type = "memory"; 29 reg = <0x08000000 0x02000000>; 30 }; 31 32 flash@18000000 { 33 compatible = "mtd-rom"; 34 reg = <0x18000000 0x08000000>; 35 clocks = <&mstp9_clks R7S72100_CLK_SPIBSC0>; 36 power-domains = <&cpg_clocks>; 37 bank-width = <4>; 38 device-width = <1>; 39 #address-cells = <1>; 40 #size-cells = <1>; 41 42 partitions { 43 compatible = "fixed-partitions"; 44 #address-cells = <1>; 45 #size-cells = <1>; 46 47 partition@0 { 48 label = "uboot"; 49 reg = <0x00000000 0x00080000>; 50 }; 51 52 partition@80000 { 53 label = "uboot-env"; 54 reg = <0x00080000 0x00040000>; 55 }; 56 57 partition@c0000 { 58 label = "dt"; 59 reg = <0x000c0000 0x00040000>; 60 }; 61 62 partition@100000 { 63 label = "kernel"; 64 reg = <0x00100000 0x00280000>; 65 }; 66 67 partition@400000 { 68 label = "rootfs"; 69 reg = <0x00400000 0x01c00000>; 70 }; 71 }; 72 }; 73 74 keyboard { 75 compatible = "gpio-keys"; 76 77 pinctrl-names = "default"; 78 pinctrl-0 = <&keyboard_pins>; 79 80 key-1 { 81 interrupt-parent = <&irqc>; 82 interrupts = <3 IRQ_TYPE_EDGE_BOTH>; 83 linux,code = <KEY_1>; 84 label = "SW1"; 85 wakeup-source; 86 }; 87 88 key-2 { 89 interrupt-parent = <&irqc>; 90 interrupts = <2 IRQ_TYPE_EDGE_BOTH>; 91 linux,code = <KEY_2>; 92 label = "SW2"; 93 wakeup-source; 94 }; 95 96 key-3 { 97 interrupt-parent = <&irqc>; 98 interrupts = <5 IRQ_TYPE_EDGE_BOTH>; 99 linux,code = <KEY_3>; 100 label = "SW3"; 101 wakeup-source; 102 }; 103 }; 104 105 leds { 106 compatible = "gpio-leds"; 107 108 led0 { 109 gpios = <&port7 1 GPIO_ACTIVE_LOW>; 110 }; 111 112 led1 { 113 gpios = <&io_expander1 0 GPIO_ACTIVE_LOW>; 114 }; 115 116 led2 { 117 gpios = <&io_expander1 1 GPIO_ACTIVE_LOW>; 118 }; 119 120 led3 { 121 gpios = <&io_expander1 2 GPIO_ACTIVE_LOW>; 122 }; 123 }; 124}; 125 126&extal_clk { 127 clock-frequency = <13330000>; 128}; 129 130&i2c3 { 131 pinctrl-names = "default"; 132 pinctrl-0 = <&i2c3_pins>; 133 status = "okay"; 134 135 clock-frequency = <400000>; 136 137 io_expander1: gpio@20 { 138 compatible = "onnn,cat9554"; 139 reg = <0x20>; 140 gpio-controller; 141 #gpio-cells = <2>; 142 }; 143 144 io_expander2: gpio@21 { 145 compatible = "onnn,cat9554"; 146 reg = <0x21>; 147 gpio-controller; 148 #gpio-cells = <2>; 149 }; 150 151 eeprom@50 { 152 compatible = "renesas,r1ex24016", "atmel,24c16"; 153 reg = <0x50>; 154 pagesize = <16>; 155 }; 156}; 157 158&bsc { 159 flash@0 { 160 compatible = "cfi-flash"; 161 reg = <0x00000000 0x4000000>; 162 bank-width = <2>; 163 164 partitions { 165 compatible = "fixed-partitions"; 166 #address-cells = <1>; 167 #size-cells = <1>; 168 169 partition@0 { 170 label = "apps"; 171 reg = <0x00000000 0x01000000>; 172 }; 173 174 partition@1000000 { 175 label = "data"; 176 reg = <0x01000000 0x03000000>; 177 }; 178 }; 179 }; 180}; 181 182&usb_x1_clk { 183 clock-frequency = <48000000>; 184}; 185 186&rtc_x1_clk { 187 clock-frequency = <32768>; 188}; 189 190&pinctrl { 191 /* RIIC ch3 (Port Expander, EEPROM (MAC Addr), Audio Codec) */ 192 i2c3_pins: i2c3 { 193 pinmux = <RZA1_PINMUX(1, 6, 1)>, /* RIIC3SCL */ 194 <RZA1_PINMUX(1, 7, 1)>; /* RIIC3SDA */ 195 }; 196 197 keyboard_pins: keyboard { 198 pinmux = <RZA1_PINMUX(1, 9, 3)>, /* IRQ3 */ 199 <RZA1_PINMUX(1, 8, 3)>, /* IRQ2 */ 200 <RZA1_PINMUX(1, 11, 3)>; /* IRQ5 */ 201 }; 202 203 /* Serial Console */ 204 scif2_pins: serial2 { 205 pinmux = <RZA1_PINMUX(3, 0, 6)>, /* TxD2 */ 206 <RZA1_PINMUX(3, 2, 4)>; /* RxD2 */ 207 }; 208 209 /* Ethernet */ 210 ether_pins: ether { 211 /* Ethernet on Ports 1,2,3,5 */ 212 pinmux = <RZA1_PINMUX(1, 14, 4)>, /* ET_COL */ 213 <RZA1_PINMUX(5, 9, 2)>, /* ET_MDC */ 214 <RZA1_PINMUX(3, 3, 2)>, /* ET_MDIO */ 215 <RZA1_PINMUX(3, 4, 2)>, /* ET_RXCLK */ 216 <RZA1_PINMUX(3, 5, 2)>, /* ET_RXER */ 217 <RZA1_PINMUX(3, 6, 2)>, /* ET_RXDV */ 218 <RZA1_PINMUX(2, 0, 2)>, /* ET_TXCLK */ 219 <RZA1_PINMUX(2, 1, 2)>, /* ET_TXER */ 220 <RZA1_PINMUX(2, 2, 2)>, /* ET_TXEN */ 221 <RZA1_PINMUX(2, 3, 2)>, /* ET_CRS */ 222 <RZA1_PINMUX(2, 4, 2)>, /* ET_TXD0 */ 223 <RZA1_PINMUX(2, 5, 2)>, /* ET_TXD1 */ 224 <RZA1_PINMUX(2, 6, 2)>, /* ET_TXD2 */ 225 <RZA1_PINMUX(2, 7, 2)>, /* ET_TXD3 */ 226 <RZA1_PINMUX(2, 8, 2)>, /* ET_RXD0 */ 227 <RZA1_PINMUX(2, 9, 2)>, /* ET_RXD1 */ 228 <RZA1_PINMUX(2, 10, 2)>, /* ET_RXD2 */ 229 <RZA1_PINMUX(2, 11, 2)>; /* ET_RXD3 */ 230 }; 231 232 /* SDHI ch1 on CN1 */ 233 sdhi1_pins: sdhi1 { 234 pinmux = <RZA1_PINMUX(3, 8, 7)>, /* SD_CD_1 */ 235 <RZA1_PINMUX(3, 9, 7)>, /* SD_WP_1 */ 236 <RZA1_PINMUX(3, 10, 7)>, /* SD_D1_1 */ 237 <RZA1_PINMUX(3, 11, 7)>, /* SD_D0_1 */ 238 <RZA1_PINMUX(3, 12, 7)>, /* SD_CLK_1 */ 239 <RZA1_PINMUX(3, 13, 7)>, /* SD_CMD_1 */ 240 <RZA1_PINMUX(3, 14, 7)>, /* SD_D3_1 */ 241 <RZA1_PINMUX(3, 15, 7)>; /* SD_D2_1 */ 242 }; 243}; 244 245&mtu2 { 246 status = "okay"; 247}; 248 249ðer { 250 pinctrl-names = "default"; 251 pinctrl-0 = <ðer_pins>; 252 status = "okay"; 253 renesas,no-ether-link; 254 phy-handle = <&phy0>; 255 phy0: ethernet-phy@0 { 256 compatible = "ethernet-phy-idb824.2814", 257 "ethernet-phy-ieee802.3-c22"; 258 reg = <0>; 259 }; 260}; 261 262&sdhi1 { 263 pinctrl-names = "default"; 264 pinctrl-0 = <&sdhi1_pins>; 265 bus-width = <4>; 266 status = "okay"; 267}; 268 269&ostm0 { 270 status = "okay"; 271}; 272 273&ostm1 { 274 status = "okay"; 275}; 276 277&rtc { 278 status = "okay"; 279}; 280 281&scif2 { 282 pinctrl-names = "default"; 283 pinctrl-0 = <&scif2_pins>; 284 status = "okay"; 285}; 286