xref: /linux/arch/arm/boot/dts/renesas/r7s72100-genmai.dts (revision 7f71507851fc7764b36a3221839607d3a45c2025) 
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the Genmai board
4 *
5 * Copyright (C) 2013-14 Renesas Solutions Corp.
6 * Copyright (C) 2014 Wolfram Sang, Sang Engineering <wsa@sang-engineering.com>
7 */
8
9/dts-v1/;
10#include "r7s72100.dtsi"
11#include <dt-bindings/gpio/gpio.h>
12#include <dt-bindings/input/input.h>
13#include <dt-bindings/pinctrl/r7s72100-pinctrl.h>
14
15/ {
16	model = "Genmai";
17	compatible = "renesas,genmai", "renesas,r7s72100";
18
19	aliases {
20		serial0 = &scif2;
21	};
22
23	chosen {
24		bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
25		stdout-path = "serial0:115200n8";
26	};
27
28	flash@18000000 {
29		compatible = "mtd-rom";
30		reg = <0x18000000 0x08000000>;
31		bank-width = <4>;
32		device-width = <1>;
33
34		clocks = <&mstp9_clks R7S72100_CLK_SPIBSC0>;
35		power-domains = <&cpg_clocks>;
36
37		#address-cells = <1>;
38		#size-cells = <1>;
39
40		partitions {
41			compatible = "fixed-partitions";
42			#address-cells = <1>;
43			#size-cells = <1>;
44
45			partition@0 {
46				label = "user";
47				reg = <0x00000000 0x04000000>;
48			};
49
50			partition@4000000 {
51				label = "user1";
52				reg = <0x04000000 0x04000000>;
53			};
54		};
55	};
56
57	keyboard {
58		compatible = "gpio-keys";
59
60		pinctrl-names = "default";
61		pinctrl-0 = <&keyboard_pins>;
62
63		key-1 {
64			/* JP3 must be set to 1-2 (default) */
65			interrupts-extended = <&irqc 6 IRQ_TYPE_EDGE_BOTH>;
66			linux,code = <KEY_1>;
67			label = "SW6,SW7";
68			wakeup-source;
69		};
70	};
71
72	leds {
73		/* Needs SDHI0 to be disabled */
74		status = "disabled";
75		compatible = "gpio-leds";
76
77		led1 {
78			gpios = <&port4 10 GPIO_ACTIVE_LOW>;
79		};
80
81		led2 {
82			gpios = <&port4 11 GPIO_ACTIVE_LOW>;
83		};
84	};
85
86	memory@8000000 {
87		device_type = "memory";
88		reg = <0x08000000 0x08000000>;
89	};
90
91	cvcc2: regulator-mmc {
92		compatible = "regulator-fixed";
93		regulator-name = "Cvcc2";
94		regulator-min-microvolt = <3300000>;
95		regulator-max-microvolt = <3300000>;
96		regulator-boot-on;
97		regulator-always-on;
98	};
99};
100
101&bsc {
102	flash@0 {
103		compatible = "cfi-flash";
104		reg = <0x00000000 0x04000000>;
105		bank-width = <2>;
106
107		partitions {
108			compatible = "fixed-partitions";
109			#address-cells = <1>;
110			#size-cells = <1>;
111
112			partition@0 {
113				label = "uboot";
114				reg = <0x00000000 0x00040000>;
115			};
116
117			partition@40000 {
118				label = "uboot-env";
119				reg = <0x00040000 0x00020000>;
120			};
121
122			partition@60000 {
123				label = "flash";
124				reg = <0x00060000 0x03fa0000>;
125			};
126		};
127	};
128
129	flash@4000000 {
130		compatible = "cfi-flash";
131		reg = <0x04000000 0x04000000>;
132		bank-width = <2>;
133
134		partitions {
135			compatible = "fixed-partitions";
136			#address-cells = <1>;
137			#size-cells = <1>;
138
139			partition@0 {
140				label = "uboot1";
141				reg = <0x00000000 0x00040000>;
142			};
143
144			partition@40000 {
145				label = "uboot-env1";
146				reg = <0x00040000 0x00020000>;
147			};
148
149			partition@60000 {
150				label = "flash1";
151				reg = <0x00060000 0x03fa0000>;
152			};
153		};
154	};
155};
156
157&ether {
158	pinctrl-names = "default";
159	pinctrl-0 = <&ether_pins>;
160
161	status = "okay";
162
163	renesas,no-ether-link;
164	phy-handle = <&phy0>;
165	phy0: ethernet-phy@0 {
166		compatible = "ethernet-phy-idb824.2814",
167			     "ethernet-phy-ieee802.3-c22";
168		reg = <0>;
169	};
170};
171
172&extal_clk {
173	clock-frequency = <13330000>;
174};
175
176&i2c2 {
177	status = "okay";
178	clock-frequency = <400000>;
179
180	pinctrl-names = "default";
181	pinctrl-0 = <&i2c2_pins>;
182
183	eeprom@50 {
184		compatible = "renesas,r1ex24128", "atmel,24c128";
185		reg = <0x50>;
186		pagesize = <64>;
187	};
188};
189
190&mmcif {
191	pinctrl-0 = <&mmcif_pins>;
192	pinctrl-names = "default";
193	cd-gpios = <&port3 8 GPIO_ACTIVE_LOW>;
194
195	vmmc-supply = <&cvcc2>;
196	vqmmc-supply = <&cvcc2>;
197	bus-width = <8>;
198	status = "okay";
199};
200
201&mtu2 {
202	status = "okay";
203};
204
205&ostm0 {
206	status = "okay";
207};
208
209&ostm1 {
210	status = "okay";
211};
212
213&pinctrl {
214	ether_pins: ether {
215		/* Ethernet on Ports 1,2,3,5 */
216		pinmux = <RZA1_PINMUX(1, 14, 4)>,/* P1_14 = ET_COL  */
217			 <RZA1_PINMUX(5, 9, 2)>, /* P5_9 = ET_MDC   */
218			 <RZA1_PINMUX(3, 3, 2)>, /* P3_3 = ET_MDIO */
219			 <RZA1_PINMUX(3, 4, 2)>, /* P3_4 = ET_RXCLK */
220			 <RZA1_PINMUX(3, 5, 2)>, /* P3_5 = ET_RXER  */
221			 <RZA1_PINMUX(3, 6, 2)>, /* P3_6 = ET_RXDV  */
222			 <RZA1_PINMUX(2, 0, 2)>, /* P2_0 = ET_TXCLK */
223			 <RZA1_PINMUX(2, 1, 2)>, /* P2_1 = ET_TXER  */
224			 <RZA1_PINMUX(2, 2, 2)>, /* P2_2 = ET_TXEN  */
225			 <RZA1_PINMUX(2, 3, 2)>, /* P2_3 = ET_CRS   */
226			 <RZA1_PINMUX(2, 4, 2)>, /* P2_4 = ET_TXD0  */
227			 <RZA1_PINMUX(2, 5, 2)>, /* P2_5 = ET_TXD1  */
228			 <RZA1_PINMUX(2, 6, 2)>, /* P2_6 = ET_TXD2  */
229			 <RZA1_PINMUX(2, 7, 2)>, /* P2_7 = ET_TXD3  */
230			 <RZA1_PINMUX(2, 8, 2)>, /* P2_8 = ET_RXD0  */
231			 <RZA1_PINMUX(2, 9, 2)>, /* P2_9 = ET_RXD1  */
232			 <RZA1_PINMUX(2, 10, 2)>,/* P2_10 = ET_RXD2 */
233			 <RZA1_PINMUX(2, 11, 2)>;/* P2_11 = ET_RXD3 */
234	};
235
236	i2c2_pins: i2c2 {
237		/* RIIC2: P1_4 as SCL, P1_5 as SDA */
238		pinmux = <RZA1_PINMUX(1, 4, 1)>, <RZA1_PINMUX(1, 5, 1)>;
239	};
240
241	keyboard_pins: keyboard {
242		/* P3_1 as IRQ6 */
243		pinmux = <RZA1_PINMUX(3, 1, 3)>;
244	};
245
246	mmcif_pins: mmcif {
247		/* MMCIF: P3_8 is CD_GPIO, P3_10 up to P3_15, P4_0 up to P4_3 */
248		pinmux = <RZA1_PINMUX(3, 10, 8)>,	/* MMC_D1 */
249			 <RZA1_PINMUX(3, 11, 8)>,	/* MMC_D0 */
250			 <RZA1_PINMUX(3, 12, 8)>,	/* MMC_CLK */
251			 <RZA1_PINMUX(3, 13, 8)>,	/* MMC_CMD */
252			 <RZA1_PINMUX(3, 14, 8)>,	/* MMC_D3 */
253			 <RZA1_PINMUX(3, 15, 8)>,	/* MMC_D2 */
254			 <RZA1_PINMUX(4, 0, 8)>,	/* MMC_D4 */
255			 <RZA1_PINMUX(4, 1, 8)>,	/* MMC_D5 */
256			 <RZA1_PINMUX(4, 2, 8)>,	/* MMC_D6 */
257			 <RZA1_PINMUX(4, 3, 8)>;	/* MMC_D7 */
258	};
259
260	scif2_pins: serial2 {
261		/* P3_0 as TxD2; P3_2 as RxD2 */
262		pinmux = <RZA1_PINMUX(3, 0, 6)>, <RZA1_PINMUX(3, 2, 4)>;
263	};
264
265	sdhi0_pins: sdhi0 {
266		/* SDHI0: P4_8 up to P4_15 */
267		pinmux = <RZA1_PINMUX(4, 8, 3)>,	/* SD_CD_0 */
268			 <RZA1_PINMUX(4, 9, 3)>,	/* SD_WP_0 */
269			 <RZA1_PINMUX(4, 10, 3)>,	/* SD_D1_0 */
270			 <RZA1_PINMUX(4, 11, 3)>,	/* SD_D0_0 */
271			 <RZA1_PINMUX(4, 12, 3)>,	/* SD_CLK_0 */
272			 <RZA1_PINMUX(4, 13, 3)>,	/* SD_CMD_0 */
273			 <RZA1_PINMUX(4, 14, 3)>,	/* SD_D3_0 */
274			 <RZA1_PINMUX(4, 15, 3)>;	/* SD_D2_0 */
275	};
276};
277
278&rtc_x1_clk {
279	clock-frequency = <32768>;
280};
281
282&rtc {
283	status = "okay";
284};
285
286&scif2 {
287	pinctrl-names = "default";
288	pinctrl-0 = <&scif2_pins>;
289
290	status = "okay";
291};
292
293&sdhi0 {
294	pinctrl-names = "default";
295	pinctrl-0 = <&sdhi0_pins>;
296
297	bus-width = <4>;
298	status = "okay";
299};
300
301&spi4 {
302	status = "okay";
303
304	codec: codec@0 {
305		compatible = "wlf,wm8978";
306		reg = <0>;
307		spi-max-frequency = <500000>;
308		#sound-dai-cells = <0>;
309	};
310};
311
312&usb_x1_clk {
313	clock-frequency = <48000000>;
314};
315
316&wdt {
317	timeout-sec = <60>;
318	status = "okay";
319};
320