xref: /linux/arch/arm/boot/dts/renesas/gr-peach-audiocamerashield.dtsi (revision cdd5b5a9761fd66d17586e4f4ba6588c70e640ea)
1*724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0
2*724ba675SRob Herring/*
3*724ba675SRob Herring * Device Tree Source for the GR-Peach audiocamera shield expansion board
4*724ba675SRob Herring *
5*724ba675SRob Herring * Copyright (C) 2017 Jacopo Mondi <jacopo+renesas@jmondi.org>
6*724ba675SRob Herring */
7*724ba675SRob Herring
8*724ba675SRob Herring#include "r7s72100.dtsi"
9*724ba675SRob Herring#include <dt-bindings/gpio/gpio.h>
10*724ba675SRob Herring#include <dt-bindings/pinctrl/r7s72100-pinctrl.h>
11*724ba675SRob Herring
12*724ba675SRob Herring/ {
13*724ba675SRob Herring	/* On-board camera clock. */
14*724ba675SRob Herring	camera_clk: camera_clk {
15*724ba675SRob Herring		compatible = "fixed-clock";
16*724ba675SRob Herring		#clock-cells = <0>;
17*724ba675SRob Herring		clock-frequency = <27000000>;
18*724ba675SRob Herring	};
19*724ba675SRob Herring};
20*724ba675SRob Herring
21*724ba675SRob Herring&pinctrl {
22*724ba675SRob Herring	i2c1_pins: i2c1 {
23*724ba675SRob Herring		/* P1_2 as SCL; P1_3 as SDA */
24*724ba675SRob Herring		pinmux = <RZA1_PINMUX(1, 2, 1)>, <RZA1_PINMUX(1, 3, 1)>;
25*724ba675SRob Herring	};
26*724ba675SRob Herring
27*724ba675SRob Herring	vio_pins: vio {
28*724ba675SRob Herring		/* CEU pins: VIO_D[0-10], VIO_VD, VIO_HD, VIO_CLK */
29*724ba675SRob Herring		pinmux = <RZA1_PINMUX(1, 0, 5)>, /* VIO_VD */
30*724ba675SRob Herring			 <RZA1_PINMUX(1, 1, 5)>, /* VIO_HD */
31*724ba675SRob Herring			 <RZA1_PINMUX(2, 0, 7)>, /* VIO_D0 */
32*724ba675SRob Herring			 <RZA1_PINMUX(2, 1, 7)>, /* VIO_D1 */
33*724ba675SRob Herring			 <RZA1_PINMUX(2, 2, 7)>, /* VIO_D2 */
34*724ba675SRob Herring			 <RZA1_PINMUX(2, 3, 7)>, /* VIO_D3 */
35*724ba675SRob Herring			 <RZA1_PINMUX(2, 4, 7)>, /* VIO_D4 */
36*724ba675SRob Herring			 <RZA1_PINMUX(2, 5, 7)>, /* VIO_D5 */
37*724ba675SRob Herring			 <RZA1_PINMUX(2, 6, 7)>, /* VIO_D6 */
38*724ba675SRob Herring			 <RZA1_PINMUX(2, 7, 7)>, /* VIO_D7 */
39*724ba675SRob Herring			 <RZA1_PINMUX(10, 0, 6)>; /* VIO_CLK */
40*724ba675SRob Herring	};
41*724ba675SRob Herring};
42*724ba675SRob Herring
43*724ba675SRob Herring&i2c1 {
44*724ba675SRob Herring	pinctrl-names = "default";
45*724ba675SRob Herring	pinctrl-0 = <&i2c1_pins>;
46*724ba675SRob Herring
47*724ba675SRob Herring	status = "okay";
48*724ba675SRob Herring	clock-frequency = <100000>;
49*724ba675SRob Herring
50*724ba675SRob Herring	camera@48 {
51*724ba675SRob Herring		compatible = "aptina,mt9v111";
52*724ba675SRob Herring		reg = <0x48>;
53*724ba675SRob Herring
54*724ba675SRob Herring		clocks = <&camera_clk>;
55*724ba675SRob Herring
56*724ba675SRob Herring		port {
57*724ba675SRob Herring			mt9v111_out: endpoint {
58*724ba675SRob Herring				remote-endpoint = <&ceu_in>;
59*724ba675SRob Herring			};
60*724ba675SRob Herring		};
61*724ba675SRob Herring	};
62*724ba675SRob Herring};
63*724ba675SRob Herring
64*724ba675SRob Herring&ceu {
65*724ba675SRob Herring	pinctrl-names = "default";
66*724ba675SRob Herring	pinctrl-0 = <&vio_pins>;
67*724ba675SRob Herring
68*724ba675SRob Herring	status = "okay";
69*724ba675SRob Herring
70*724ba675SRob Herring	port {
71*724ba675SRob Herring		ceu_in: endpoint {
72*724ba675SRob Herring			remote-endpoint = <&mt9v111_out>;
73*724ba675SRob Herring		};
74*724ba675SRob Herring	};
75*724ba675SRob Herring};
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