xref: /linux/arch/arm/boot/dts/qcom/qcom-ipq4018-ap120c-ac.dtsi (revision 55d0969c451159cff86949b38c39171cab962069)
1// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2
3#include "qcom-ipq4019.dtsi"
4#include <dt-bindings/gpio/gpio.h>
5#include <dt-bindings/input/input.h>
6
7/ {
8	model = "ALFA Network AP120C-AC";
9	compatible = "alfa-network,ap120c-ac", "qcom,ipq4018";
10
11	aliases {
12		serial0 = &blsp1_uart1;
13	};
14
15	chosen {
16		stdout-path = "serial0:115200n8";
17	};
18
19	keys {
20		compatible = "gpio-keys";
21
22		key-reset {
23			label = "reset";
24			gpios = <&tlmm 63 GPIO_ACTIVE_LOW>;
25			linux,code = <KEY_RESTART>;
26		};
27	};
28};
29
30&tlmm {
31	i2c0_pins: i2c0-state {
32		function = "blsp_i2c0";
33		pins = "gpio58", "gpio59";
34		drive-strength = <16>;
35		bias-disable;
36	};
37
38	mdio_pins: mdio-state {
39		mdio-pins {
40			pins = "gpio53";
41			function = "mdio";
42			bias-pull-up;
43		};
44
45		mdc-pins {
46			pins = "gpio52";
47			function = "mdc";
48			bias-pull-up;
49		};
50	};
51
52	serial0_pins: serial0-state {
53		pins = "gpio60", "gpio61";
54		function = "blsp_uart0";
55		bias-disable;
56	};
57
58	spi0_pins: spi0-state {
59		spi0-pins {
60			function = "blsp_spi0";
61			pins = "gpio55", "gpio56", "gpio57";
62			drive-strength = <12>;
63			bias-disable;
64		};
65
66		spi0-cs-pins {
67			function = "gpio";
68			pins = "gpio54", "gpio4";
69			drive-strength = <2>;
70			bias-disable;
71			output-high;
72		};
73	};
74
75	usb-power-hog {
76		line-name = "USB-power";
77		gpios = <1 GPIO_ACTIVE_HIGH>;
78		gpio-hog;
79		output-high;
80	};
81};
82
83&watchdog {
84	status = "okay";
85};
86
87&prng {
88	status = "okay";
89};
90
91&blsp_dma {
92	status = "okay";
93};
94
95&blsp1_i2c3 {
96	status = "okay";
97
98	pinctrl-0 = <&i2c0_pins>;
99	pinctrl-names = "default";
100
101	tpm@29 {
102		compatible = "atmel,at97sc3204t";
103		reg = <0x29>;
104	};
105};
106
107&blsp1_spi1 {
108	status = "okay";
109
110	pinctrl-0 = <&spi0_pins>;
111	pinctrl-names = "default";
112	cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>, <&tlmm 4 GPIO_ACTIVE_HIGH>;
113
114	flash@0 {
115		compatible = "jedec,spi-nor";
116		reg = <0>;
117		spi-max-frequency = <24000000>;
118
119		partitions {
120			compatible = "fixed-partitions";
121			#address-cells = <1>;
122			#size-cells = <1>;
123
124			partition@0 {
125				label = "SBL1";
126				reg = <0x00000000 0x00040000>;
127				read-only;
128			};
129
130			partition@40000 {
131				label = "MIBIB";
132				reg = <0x00040000 0x00020000>;
133				read-only;
134			};
135
136			partition@60000 {
137				label = "QSEE";
138				reg = <0x00060000 0x00060000>;
139				read-only;
140			};
141
142			partition@c0000 {
143				label = "CDT";
144				reg = <0x000c0000 0x00010000>;
145				read-only;
146			};
147
148			partition@d0000 {
149				label = "DDRPARAMS";
150				reg = <0x000d0000 0x00010000>;
151				read-only;
152			};
153
154			partition@e0000 {
155				label = "u-boot-env";
156				reg = <0x000e0000 0x00010000>;
157			};
158
159			partition@f0000 {
160				label = "u-boot";
161				reg = <0x000f0000 0x00080000>;
162				read-only;
163			};
164
165			partition@170000 {
166				label = "ART";
167				reg = <0x00170000 0x00010000>;
168				read-only;
169
170				nvmem-layout {
171					compatible = "fixed-layout";
172					#address-cells = <1>;
173					#size-cells = <1>;
174
175					precal_art_1000: precal@1000 {
176						reg = <0x1000 0x2f20>;
177					};
178
179					precal_art_5000: precal@5000 {
180						reg = <0x5000 0x2f20>;
181					};
182				};
183			};
184
185			partition@180000 {
186				label = "priv_data1";
187				reg = <0x00180000 0x00010000>;
188				read-only;
189			};
190
191			partition@190000 {
192				label = "priv_data2";
193				reg = <0x00190000 0x00010000>;
194				read-only;
195			};
196		};
197	};
198
199	flash@1 {
200		compatible = "spi-nand";
201		reg = <1>;
202		spi-max-frequency = <40000000>;
203
204		partitions {
205			compatible = "fixed-partitions";
206			#address-cells = <1>;
207			#size-cells = <1>;
208
209			partition@0 {
210				label = "ubi1";
211				reg = <0x00000000 0x04000000>;
212			};
213
214			partition@4000000 {
215				label = "ubi2";
216				reg = <0x04000000 0x04000000>;
217			};
218		};
219	};
220};
221
222&blsp1_uart1 {
223	status = "okay";
224
225	pinctrl-0 = <&serial0_pins>;
226	pinctrl-names = "default";
227};
228
229&cryptobam {
230	status = "okay";
231};
232
233&crypto {
234	status = "okay";
235};
236
237&mdio {
238	status = "okay";
239
240	pinctrl-0 = <&mdio_pins>;
241	pinctrl-names = "default";
242};
243
244&wifi0 {
245	status = "okay";
246	nvmem-cell-names = "pre-calibration";
247	nvmem-cells = <&precal_art_1000>;
248};
249
250&wifi1 {
251	status = "okay";
252	nvmem-cell-names = "pre-calibration";
253	nvmem-cells = <&precal_art_5000>;
254	qcom,ath10k-calibration-variant = "ALFA-Network-AP120C-AC";
255};
256
257&usb3_hs_phy {
258	status = "okay";
259};
260
261&usb3 {
262	status = "okay";
263
264	};
265
266&usb3_dwc {
267	phys = <&usb3_hs_phy>;
268	phy-names = "usb2-phy";
269};
270
271&usb2_hs_phy {
272	status = "okay";
273};
274
275&usb2 {
276	status = "okay";
277};
278