1724ba675SRob Herring// SPDX-License-Identifier: (GPL-2.0 OR MIT) 2724ba675SRob Herring 3724ba675SRob Herring/* 4724ba675SRob Herring * Device tree file for ZII's SSMB SPU3 board 5724ba675SRob Herring * 6724ba675SRob Herring * SSMB - SPU3 Switch Management Board 7724ba675SRob Herring * SPU - Seat Power Unit 8724ba675SRob Herring * 9724ba675SRob Herring * Copyright (C) 2015, 2016 Zodiac Inflight Innovations 10724ba675SRob Herring * 11724ba675SRob Herring * Based on an original 'vf610-twr.dts' which is Copyright 2015, 12724ba675SRob Herring * Freescale Semiconductor, Inc. 13724ba675SRob Herring */ 14724ba675SRob Herring 15724ba675SRob Herring/dts-v1/; 16724ba675SRob Herring#include "vf610.dtsi" 17724ba675SRob Herring 18724ba675SRob Herring/ { 19724ba675SRob Herring model = "ZII VF610 SSMB SPU3 Board"; 20724ba675SRob Herring compatible = "zii,vf610spu3", "zii,vf610dev", "fsl,vf610"; 21724ba675SRob Herring 22724ba675SRob Herring chosen { 23724ba675SRob Herring stdout-path = &uart0; 24724ba675SRob Herring }; 25724ba675SRob Herring 26724ba675SRob Herring memory@80000000 { 27724ba675SRob Herring device_type = "memory"; 28724ba675SRob Herring reg = <0x80000000 0x20000000>; 29724ba675SRob Herring }; 30724ba675SRob Herring 31724ba675SRob Herring gpio-leds { 32724ba675SRob Herring compatible = "gpio-leds"; 33724ba675SRob Herring pinctrl-0 = <&pinctrl_leds_debug>; 34724ba675SRob Herring pinctrl-names = "default"; 35724ba675SRob Herring 36724ba675SRob Herring led-debug { 37724ba675SRob Herring label = "zii:green:debug1"; 38724ba675SRob Herring gpios = <&gpio2 18 GPIO_ACTIVE_HIGH>; 39724ba675SRob Herring linux,default-trigger = "heartbeat"; 40724ba675SRob Herring }; 41724ba675SRob Herring }; 42724ba675SRob Herring 43724ba675SRob Herring reg_vcc_3v3_mcu: regulator { 44724ba675SRob Herring compatible = "regulator-fixed"; 45724ba675SRob Herring regulator-name = "vcc_3v3_mcu"; 46724ba675SRob Herring regulator-min-microvolt = <3300000>; 47724ba675SRob Herring regulator-max-microvolt = <3300000>; 48724ba675SRob Herring }; 49724ba675SRob Herring 50724ba675SRob Herring supply-voltage-monitor { 51724ba675SRob Herring compatible = "iio-hwmon"; 52724ba675SRob Herring io-channels = <&adc0 8>, /* 12V_MAIN */ 53724ba675SRob Herring <&adc0 9>, /* +3.3V */ 54724ba675SRob Herring <&adc1 8>, /* VCC_1V5 */ 55724ba675SRob Herring <&adc1 9>; /* VCC_1V2 */ 56724ba675SRob Herring }; 57724ba675SRob Herring}; 58724ba675SRob Herring 59724ba675SRob Herring&adc0 { 60724ba675SRob Herring vref-supply = <®_vcc_3v3_mcu>; 61724ba675SRob Herring status = "okay"; 62724ba675SRob Herring}; 63724ba675SRob Herring 64724ba675SRob Herring&adc1 { 65724ba675SRob Herring vref-supply = <®_vcc_3v3_mcu>; 66724ba675SRob Herring status = "okay"; 67724ba675SRob Herring}; 68724ba675SRob Herring 69724ba675SRob Herring&dspi1 { 70724ba675SRob Herring bus-num = <1>; 71724ba675SRob Herring pinctrl-names = "default"; 72724ba675SRob Herring pinctrl-0 = <&pinctrl_dspi1>; 73724ba675SRob Herring /* 74724ba675SRob Herring * Some SPU3s come with SPI-NOR chip DNPed, so we leave this 75724ba675SRob Herring * node disabled by default and rely on bootloader to enable 76724ba675SRob Herring * it when appropriate. 77724ba675SRob Herring */ 78724ba675SRob Herring status = "disabled"; 79724ba675SRob Herring 80724ba675SRob Herring flash@0 { 81724ba675SRob Herring #address-cells = <1>; 82724ba675SRob Herring #size-cells = <1>; 83724ba675SRob Herring compatible = "m25p128", "jedec,spi-nor"; 84724ba675SRob Herring reg = <0>; 85724ba675SRob Herring spi-max-frequency = <50000000>; 86724ba675SRob Herring 87724ba675SRob Herring partition@0 { 88724ba675SRob Herring label = "m25p128-0"; 89724ba675SRob Herring reg = <0x0 0x01000000>; 90724ba675SRob Herring }; 91724ba675SRob Herring }; 92724ba675SRob Herring}; 93724ba675SRob Herring 94724ba675SRob Herring&edma0 { 95724ba675SRob Herring status = "okay"; 96724ba675SRob Herring}; 97724ba675SRob Herring 98724ba675SRob Herring&edma1 { 99724ba675SRob Herring status = "okay"; 100724ba675SRob Herring}; 101724ba675SRob Herring 102724ba675SRob Herring&esdhc0 { 103724ba675SRob Herring pinctrl-names = "default"; 104724ba675SRob Herring pinctrl-0 = <&pinctrl_esdhc0>; 105724ba675SRob Herring bus-width = <8>; 106724ba675SRob Herring non-removable; 107724ba675SRob Herring no-1-8-v; 108724ba675SRob Herring keep-power-in-suspend; 109724ba675SRob Herring no-sdio; 110724ba675SRob Herring no-sd; 111724ba675SRob Herring status = "okay"; 112724ba675SRob Herring}; 113724ba675SRob Herring 114724ba675SRob Herring&esdhc1 { 115724ba675SRob Herring pinctrl-names = "default"; 116724ba675SRob Herring pinctrl-0 = <&pinctrl_esdhc1>; 117724ba675SRob Herring bus-width = <4>; 118724ba675SRob Herring no-sdio; 119724ba675SRob Herring status = "okay"; 120724ba675SRob Herring}; 121724ba675SRob Herring 122724ba675SRob Herring&fec1 { 123724ba675SRob Herring phy-mode = "rmii"; 124724ba675SRob Herring pinctrl-names = "default"; 125724ba675SRob Herring pinctrl-0 = <&pinctrl_fec1>; 126724ba675SRob Herring status = "okay"; 127724ba675SRob Herring 128724ba675SRob Herring fixed-link { 129724ba675SRob Herring speed = <100>; 130724ba675SRob Herring full-duplex; 131724ba675SRob Herring }; 132724ba675SRob Herring 133724ba675SRob Herring mdio1: mdio { 134724ba675SRob Herring #address-cells = <1>; 135724ba675SRob Herring #size-cells = <0>; 136724ba675SRob Herring clock-frequency = <12500000>; 137724ba675SRob Herring suppress-preamble; 138724ba675SRob Herring status = "okay"; 139724ba675SRob Herring 140*0b6b2650SLinus Walleij switch0: ethernet-switch@0 { 141724ba675SRob Herring compatible = "marvell,mv88e6190"; 142724ba675SRob Herring pinctrl-0 = <&pinctrl_gpio_switch0>; 143724ba675SRob Herring pinctrl-names = "default"; 144724ba675SRob Herring reg = <0>; 145724ba675SRob Herring eeprom-length = <65536>; 146724ba675SRob Herring interrupt-parent = <&gpio3>; 147724ba675SRob Herring interrupts = <2 IRQ_TYPE_LEVEL_LOW>; 148724ba675SRob Herring interrupt-controller; 149724ba675SRob Herring #interrupt-cells = <2>; 150724ba675SRob Herring 151*0b6b2650SLinus Walleij ethernet-ports { 152724ba675SRob Herring #address-cells = <1>; 153724ba675SRob Herring #size-cells = <0>; 154724ba675SRob Herring 155*0b6b2650SLinus Walleij ethernet-port@0 { 156724ba675SRob Herring reg = <0>; 157724ba675SRob Herring phy-mode = "rmii"; 158724ba675SRob Herring ethernet = <&fec1>; 159724ba675SRob Herring 160724ba675SRob Herring fixed-link { 161724ba675SRob Herring speed = <100>; 162724ba675SRob Herring full-duplex; 163724ba675SRob Herring }; 164724ba675SRob Herring }; 165724ba675SRob Herring 166*0b6b2650SLinus Walleij ethernet-port@1 { 167724ba675SRob Herring reg = <1>; 168724ba675SRob Herring label = "eth_cu_1000_1"; 169724ba675SRob Herring }; 170724ba675SRob Herring 171*0b6b2650SLinus Walleij ethernet-port@2 { 172724ba675SRob Herring reg = <2>; 173724ba675SRob Herring label = "eth_cu_1000_2"; 174724ba675SRob Herring }; 175724ba675SRob Herring 176*0b6b2650SLinus Walleij ethernet-port@3 { 177724ba675SRob Herring reg = <3>; 178724ba675SRob Herring label = "eth_cu_1000_3"; 179724ba675SRob Herring }; 180724ba675SRob Herring 181*0b6b2650SLinus Walleij ethernet-port@4 { 182724ba675SRob Herring reg = <4>; 183724ba675SRob Herring label = "eth_cu_1000_4"; 184724ba675SRob Herring }; 185724ba675SRob Herring 186*0b6b2650SLinus Walleij ethernet-port@5 { 187724ba675SRob Herring reg = <5>; 188724ba675SRob Herring label = "eth_cu_1000_5"; 189724ba675SRob Herring }; 190724ba675SRob Herring 191*0b6b2650SLinus Walleij ethernet-port@6 { 192724ba675SRob Herring reg = <6>; 193724ba675SRob Herring label = "eth_cu_1000_6"; 194724ba675SRob Herring }; 195724ba675SRob Herring }; 196724ba675SRob Herring }; 197724ba675SRob Herring }; 198724ba675SRob Herring}; 199724ba675SRob Herring 200724ba675SRob Herring&i2c0 { 201724ba675SRob Herring clock-frequency = <100000>; 202724ba675SRob Herring pinctrl-names = "default"; 203724ba675SRob Herring pinctrl-0 = <&pinctrl_i2c0>; 204724ba675SRob Herring status = "okay"; 205724ba675SRob Herring 206724ba675SRob Herring gpio6: io-expander@22 { 207724ba675SRob Herring compatible = "nxp,pca9554"; 208724ba675SRob Herring reg = <0x22>; 209724ba675SRob Herring gpio-controller; 210724ba675SRob Herring #gpio-cells = <2>; 211724ba675SRob Herring }; 212724ba675SRob Herring 213724ba675SRob Herring lm75@48 { 214724ba675SRob Herring compatible = "national,lm75"; 215724ba675SRob Herring reg = <0x48>; 216724ba675SRob Herring }; 217724ba675SRob Herring 218724ba675SRob Herring eeprom@50 { 219724ba675SRob Herring compatible = "atmel,24c04"; 220724ba675SRob Herring reg = <0x50>; 221724ba675SRob Herring label = "nameplate"; 222724ba675SRob Herring }; 223724ba675SRob Herring 224724ba675SRob Herring eeprom@52 { 225724ba675SRob Herring compatible = "atmel,24c04"; 226724ba675SRob Herring reg = <0x52>; 227724ba675SRob Herring }; 228724ba675SRob Herring}; 229724ba675SRob Herring 230724ba675SRob Herring&i2c1 { 231724ba675SRob Herring clock-frequency = <100000>; 232724ba675SRob Herring pinctrl-names = "default"; 233724ba675SRob Herring pinctrl-0 = <&pinctrl_i2c1>; 234724ba675SRob Herring status = "okay"; 235724ba675SRob Herring 236724ba675SRob Herring watchdog@38 { 237724ba675SRob Herring compatible = "zii,rave-wdt"; 238724ba675SRob Herring reg = <0x38>; 239724ba675SRob Herring }; 240724ba675SRob Herring}; 241724ba675SRob Herring 242724ba675SRob Herring&snvsrtc { 243724ba675SRob Herring status = "disabled"; 244724ba675SRob Herring}; 245724ba675SRob Herring 246724ba675SRob Herring&uart0 { 247724ba675SRob Herring pinctrl-names = "default"; 248724ba675SRob Herring pinctrl-0 = <&pinctrl_uart0>; 249724ba675SRob Herring status = "okay"; 250724ba675SRob Herring}; 251724ba675SRob Herring 252724ba675SRob Herring&uart1 { 253724ba675SRob Herring pinctrl-names = "default"; 254724ba675SRob Herring pinctrl-0 = <&pinctrl_uart1>; 255724ba675SRob Herring status = "okay"; 256724ba675SRob Herring 257724ba675SRob Herring mcu { 258724ba675SRob Herring compatible = "zii,rave-sp-rdu2"; 259724ba675SRob Herring current-speed = <1000000>; 260724ba675SRob Herring #address-cells = <1>; 261724ba675SRob Herring #size-cells = <1>; 262724ba675SRob Herring 263724ba675SRob Herring watchdog { 264724ba675SRob Herring compatible = "zii,rave-sp-watchdog"; 265724ba675SRob Herring }; 266724ba675SRob Herring 267724ba675SRob Herring eeprom@a3 { 268724ba675SRob Herring compatible = "zii,rave-sp-eeprom"; 269724ba675SRob Herring reg = <0xa3 0x4000>; 270724ba675SRob Herring #address-cells = <1>; 271724ba675SRob Herring #size-cells = <1>; 272724ba675SRob Herring zii,eeprom-name = "main-eeprom"; 273724ba675SRob Herring }; 274724ba675SRob Herring }; 275724ba675SRob Herring}; 276724ba675SRob Herring 277724ba675SRob Herring&wdoga5 { 278724ba675SRob Herring status = "disabled"; 279724ba675SRob Herring}; 280724ba675SRob Herring 281724ba675SRob Herring&iomuxc { 282724ba675SRob Herring pinctrl_dspi1: dspi1grp { 283724ba675SRob Herring fsl,pins = < 284724ba675SRob Herring VF610_PAD_PTD5__DSPI1_CS0 0x1182 285724ba675SRob Herring VF610_PAD_PTD4__DSPI1_CS1 0x1182 286724ba675SRob Herring VF610_PAD_PTC6__DSPI1_SIN 0x1181 287724ba675SRob Herring VF610_PAD_PTC7__DSPI1_SOUT 0x1182 288724ba675SRob Herring VF610_PAD_PTC8__DSPI1_SCK 0x1182 289724ba675SRob Herring >; 290724ba675SRob Herring }; 291724ba675SRob Herring 292724ba675SRob Herring pinctrl_esdhc0: esdhc0grp { 293724ba675SRob Herring fsl,pins = < 294724ba675SRob Herring VF610_PAD_PTC0__ESDHC0_CLK 0x31ef 295724ba675SRob Herring VF610_PAD_PTC1__ESDHC0_CMD 0x31ef 296724ba675SRob Herring VF610_PAD_PTC2__ESDHC0_DAT0 0x31ef 297724ba675SRob Herring VF610_PAD_PTC3__ESDHC0_DAT1 0x31ef 298724ba675SRob Herring VF610_PAD_PTC4__ESDHC0_DAT2 0x31ef 299724ba675SRob Herring VF610_PAD_PTC5__ESDHC0_DAT3 0x31ef 300724ba675SRob Herring VF610_PAD_PTD23__ESDHC0_DAT4 0x31ef 301724ba675SRob Herring VF610_PAD_PTD22__ESDHC0_DAT5 0x31ef 302724ba675SRob Herring VF610_PAD_PTD21__ESDHC0_DAT6 0x31ef 303724ba675SRob Herring VF610_PAD_PTD20__ESDHC0_DAT7 0x31ef 304724ba675SRob Herring >; 305724ba675SRob Herring }; 306724ba675SRob Herring 307724ba675SRob Herring pinctrl_esdhc1: esdhc1grp { 308724ba675SRob Herring fsl,pins = < 309724ba675SRob Herring VF610_PAD_PTA24__ESDHC1_CLK 0x31ef 310724ba675SRob Herring VF610_PAD_PTA25__ESDHC1_CMD 0x31ef 311724ba675SRob Herring VF610_PAD_PTA26__ESDHC1_DAT0 0x31ef 312724ba675SRob Herring VF610_PAD_PTA27__ESDHC1_DAT1 0x31ef 313724ba675SRob Herring VF610_PAD_PTA28__ESDHC1_DATA2 0x31ef 314724ba675SRob Herring VF610_PAD_PTA29__ESDHC1_DAT3 0x31ef 315724ba675SRob Herring >; 316724ba675SRob Herring }; 317724ba675SRob Herring 318724ba675SRob Herring pinctrl_fec1: fec1grp { 319724ba675SRob Herring fsl,pins = < 320724ba675SRob Herring VF610_PAD_PTA6__RMII_CLKIN 0x30d1 321724ba675SRob Herring VF610_PAD_PTC9__ENET_RMII1_MDC 0x30d2 322724ba675SRob Herring VF610_PAD_PTC10__ENET_RMII1_MDIO 0x30d3 323724ba675SRob Herring VF610_PAD_PTC11__ENET_RMII1_CRS 0x30d1 324724ba675SRob Herring VF610_PAD_PTC12__ENET_RMII1_RXD1 0x30d1 325724ba675SRob Herring VF610_PAD_PTC13__ENET_RMII1_RXD0 0x30d1 326724ba675SRob Herring VF610_PAD_PTC14__ENET_RMII1_RXER 0x30d1 327724ba675SRob Herring VF610_PAD_PTC15__ENET_RMII1_TXD1 0x30d2 328724ba675SRob Herring VF610_PAD_PTC16__ENET_RMII1_TXD0 0x30d2 329724ba675SRob Herring VF610_PAD_PTC17__ENET_RMII1_TXEN 0x30d2 330724ba675SRob Herring >; 331724ba675SRob Herring }; 332724ba675SRob Herring 333724ba675SRob Herring pinctrl_gpio_switch0: pinctrl-gpio-switch0 { 334724ba675SRob Herring fsl,pins = < 335724ba675SRob Herring VF610_PAD_PTB28__GPIO_98 0x219d 336724ba675SRob Herring >; 337724ba675SRob Herring }; 338724ba675SRob Herring 339724ba675SRob Herring pinctrl_i2c0: i2c0grp { 340724ba675SRob Herring fsl,pins = < 341724ba675SRob Herring VF610_PAD_PTB14__I2C0_SCL 0x37ff 342724ba675SRob Herring VF610_PAD_PTB15__I2C0_SDA 0x37ff 343724ba675SRob Herring >; 344724ba675SRob Herring }; 345724ba675SRob Herring 346724ba675SRob Herring pinctrl_i2c1: i2c1grp { 347724ba675SRob Herring fsl,pins = < 348724ba675SRob Herring VF610_PAD_PTB16__I2C1_SCL 0x37ff 349724ba675SRob Herring VF610_PAD_PTB17__I2C1_SDA 0x37ff 350724ba675SRob Herring >; 351724ba675SRob Herring }; 352724ba675SRob Herring 353724ba675SRob Herring pinctrl_leds_debug: pinctrl-leds-debug { 354724ba675SRob Herring fsl,pins = < 355724ba675SRob Herring VF610_PAD_PTD3__GPIO_82 0x31c2 356724ba675SRob Herring >; 357724ba675SRob Herring }; 358724ba675SRob Herring 359724ba675SRob Herring pinctrl_uart0: uart0grp { 360724ba675SRob Herring fsl,pins = < 361724ba675SRob Herring VF610_PAD_PTB10__UART0_TX 0x21a2 362724ba675SRob Herring VF610_PAD_PTB11__UART0_RX 0x21a1 363724ba675SRob Herring >; 364724ba675SRob Herring }; 365724ba675SRob Herring 366724ba675SRob Herring pinctrl_uart1: uart1grp { 367724ba675SRob Herring fsl,pins = < 368724ba675SRob Herring VF610_PAD_PTB23__UART1_TX 0x21a2 369724ba675SRob Herring VF610_PAD_PTB24__UART1_RX 0x21a1 370724ba675SRob Herring >; 371724ba675SRob Herring }; 372724ba675SRob Herring}; 373