1724ba675SRob Herring// SPDX-License-Identifier: (GPL-2.0 OR MIT) 2724ba675SRob Herring 3724ba675SRob Herring/* 4724ba675SRob Herring * Device tree file for ZII's SPB4 board 5724ba675SRob Herring * 6724ba675SRob Herring * SPB - Seat Power Box 7724ba675SRob Herring * 8724ba675SRob Herring * Copyright (C) 2019 Zodiac Inflight Innovations 9724ba675SRob Herring */ 10724ba675SRob Herring 11724ba675SRob Herring/dts-v1/; 12724ba675SRob Herring#include "vf610.dtsi" 13724ba675SRob Herring 14724ba675SRob Herring/ { 15724ba675SRob Herring model = "ZII VF610 SPB4 Board"; 16724ba675SRob Herring compatible = "zii,vf610spb4", "zii,vf610dev", "fsl,vf610"; 17724ba675SRob Herring 18724ba675SRob Herring chosen { 19724ba675SRob Herring stdout-path = &uart0; 20724ba675SRob Herring }; 21724ba675SRob Herring 22724ba675SRob Herring memory@80000000 { 23724ba675SRob Herring device_type = "memory"; 24724ba675SRob Herring reg = <0x80000000 0x20000000>; 25724ba675SRob Herring }; 26724ba675SRob Herring 27724ba675SRob Herring gpio-leds { 28724ba675SRob Herring compatible = "gpio-leds"; 29724ba675SRob Herring pinctrl-0 = <&pinctrl_leds_debug>; 30724ba675SRob Herring pinctrl-names = "default"; 31724ba675SRob Herring 32724ba675SRob Herring led-debug { 33724ba675SRob Herring label = "zii:green:debug1"; 34724ba675SRob Herring gpios = <&gpio2 18 GPIO_ACTIVE_HIGH>; 35724ba675SRob Herring linux,default-trigger = "heartbeat"; 36724ba675SRob Herring }; 37724ba675SRob Herring }; 38724ba675SRob Herring 39724ba675SRob Herring reg_vcc_3v3_mcu: regulator-vcc-3v3-mcu { 40724ba675SRob Herring compatible = "regulator-fixed"; 41724ba675SRob Herring regulator-name = "vcc_3v3_mcu"; 42724ba675SRob Herring regulator-min-microvolt = <3300000>; 43724ba675SRob Herring regulator-max-microvolt = <3300000>; 44724ba675SRob Herring }; 45724ba675SRob Herring 46724ba675SRob Herring supply-voltage-monitor { 47724ba675SRob Herring compatible = "iio-hwmon"; 48724ba675SRob Herring io-channels = <&adc0 8>, /* 28V_SW */ 49724ba675SRob Herring <&adc0 9>, /* +3.3V */ 50724ba675SRob Herring <&adc1 8>, /* VCC_1V5 */ 51724ba675SRob Herring <&adc1 9>; /* VCC_1V2 */ 52724ba675SRob Herring }; 53724ba675SRob Herring}; 54724ba675SRob Herring 55724ba675SRob Herring&adc0 { 56724ba675SRob Herring vref-supply = <®_vcc_3v3_mcu>; 57724ba675SRob Herring status = "okay"; 58724ba675SRob Herring}; 59724ba675SRob Herring 60724ba675SRob Herring&adc1 { 61724ba675SRob Herring vref-supply = <®_vcc_3v3_mcu>; 62724ba675SRob Herring status = "okay"; 63724ba675SRob Herring}; 64724ba675SRob Herring 65724ba675SRob Herring&dspi1 { 66724ba675SRob Herring bus-num = <1>; 67724ba675SRob Herring pinctrl-names = "default"; 68724ba675SRob Herring pinctrl-0 = <&pinctrl_dspi1>; 69724ba675SRob Herring status = "okay"; 70724ba675SRob Herring 71724ba675SRob Herring flash@0 { 72724ba675SRob Herring #address-cells = <1>; 73724ba675SRob Herring #size-cells = <1>; 74724ba675SRob Herring compatible = "m25p128", "jedec,spi-nor"; 75724ba675SRob Herring reg = <0>; 76724ba675SRob Herring spi-max-frequency = <50000000>; 77724ba675SRob Herring }; 78724ba675SRob Herring}; 79724ba675SRob Herring 80724ba675SRob Herring&edma0 { 81724ba675SRob Herring status = "okay"; 82724ba675SRob Herring}; 83724ba675SRob Herring 84724ba675SRob Herring&edma1 { 85724ba675SRob Herring status = "okay"; 86724ba675SRob Herring}; 87724ba675SRob Herring 88724ba675SRob Herring&esdhc0 { 89724ba675SRob Herring pinctrl-names = "default"; 90724ba675SRob Herring pinctrl-0 = <&pinctrl_esdhc0>; 91724ba675SRob Herring bus-width = <8>; 92724ba675SRob Herring non-removable; 93724ba675SRob Herring no-1-8-v; 94724ba675SRob Herring keep-power-in-suspend; 95724ba675SRob Herring no-sdio; 96724ba675SRob Herring no-sd; 97724ba675SRob Herring status = "okay"; 98724ba675SRob Herring}; 99724ba675SRob Herring 100724ba675SRob Herring&esdhc1 { 101724ba675SRob Herring pinctrl-names = "default"; 102724ba675SRob Herring pinctrl-0 = <&pinctrl_esdhc1>; 103724ba675SRob Herring bus-width = <4>; 104724ba675SRob Herring no-sdio; 105724ba675SRob Herring status = "okay"; 106724ba675SRob Herring}; 107724ba675SRob Herring 108724ba675SRob Herring&fec1 { 109724ba675SRob Herring phy-mode = "rmii"; 110724ba675SRob Herring pinctrl-names = "default"; 111724ba675SRob Herring pinctrl-0 = <&pinctrl_fec1>; 112724ba675SRob Herring status = "okay"; 113724ba675SRob Herring 114724ba675SRob Herring fixed-link { 115724ba675SRob Herring speed = <100>; 116724ba675SRob Herring full-duplex; 117724ba675SRob Herring }; 118724ba675SRob Herring 119724ba675SRob Herring mdio1: mdio { 120724ba675SRob Herring #address-cells = <1>; 121724ba675SRob Herring #size-cells = <0>; 122724ba675SRob Herring clock-frequency = <12500000>; 123724ba675SRob Herring suppress-preamble; 124724ba675SRob Herring status = "okay"; 125724ba675SRob Herring 126*0b6b2650SLinus Walleij switch0: ethernet-switch@0 { 127724ba675SRob Herring compatible = "marvell,mv88e6190"; 128724ba675SRob Herring pinctrl-0 = <&pinctrl_gpio_switch0>; 129724ba675SRob Herring pinctrl-names = "default"; 130724ba675SRob Herring reg = <0>; 131724ba675SRob Herring eeprom-length = <65536>; 132724ba675SRob Herring interrupt-parent = <&gpio3>; 133724ba675SRob Herring interrupts = <2 IRQ_TYPE_LEVEL_LOW>; 134724ba675SRob Herring interrupt-controller; 135724ba675SRob Herring #interrupt-cells = <2>; 136724ba675SRob Herring 137*0b6b2650SLinus Walleij ethernet-ports { 138724ba675SRob Herring #address-cells = <1>; 139724ba675SRob Herring #size-cells = <0>; 140724ba675SRob Herring 141*0b6b2650SLinus Walleij ethernet-port@0 { 142724ba675SRob Herring reg = <0>; 143724ba675SRob Herring phy-mode = "rmii"; 144724ba675SRob Herring ethernet = <&fec1>; 145724ba675SRob Herring 146724ba675SRob Herring fixed-link { 147724ba675SRob Herring speed = <100>; 148724ba675SRob Herring full-duplex; 149724ba675SRob Herring }; 150724ba675SRob Herring }; 151724ba675SRob Herring 152*0b6b2650SLinus Walleij ethernet-port@1 { 153724ba675SRob Herring reg = <1>; 154724ba675SRob Herring label = "eth_cu_1000_1"; 155724ba675SRob Herring }; 156724ba675SRob Herring 157*0b6b2650SLinus Walleij ethernet-port@2 { 158724ba675SRob Herring reg = <2>; 159724ba675SRob Herring label = "eth_cu_1000_2"; 160724ba675SRob Herring }; 161724ba675SRob Herring 162*0b6b2650SLinus Walleij ethernet-port@3 { 163724ba675SRob Herring reg = <3>; 164724ba675SRob Herring label = "eth_cu_1000_3"; 165724ba675SRob Herring }; 166724ba675SRob Herring 167*0b6b2650SLinus Walleij ethernet-port@4 { 168724ba675SRob Herring reg = <4>; 169724ba675SRob Herring label = "eth_cu_1000_4"; 170724ba675SRob Herring }; 171724ba675SRob Herring 172*0b6b2650SLinus Walleij ethernet-port@5 { 173724ba675SRob Herring reg = <5>; 174724ba675SRob Herring label = "eth_cu_1000_5"; 175724ba675SRob Herring }; 176724ba675SRob Herring 177*0b6b2650SLinus Walleij ethernet-port@6 { 178724ba675SRob Herring reg = <6>; 179724ba675SRob Herring label = "eth_cu_1000_6"; 180724ba675SRob Herring }; 181724ba675SRob Herring }; 182724ba675SRob Herring }; 183724ba675SRob Herring }; 184724ba675SRob Herring}; 185724ba675SRob Herring 186724ba675SRob Herring&i2c0 { 187724ba675SRob Herring clock-frequency = <100000>; 188724ba675SRob Herring pinctrl-names = "default"; 189724ba675SRob Herring pinctrl-0 = <&pinctrl_i2c0>; 190724ba675SRob Herring status = "okay"; 191724ba675SRob Herring 192724ba675SRob Herring io-expander@22 { 193724ba675SRob Herring compatible = "nxp,pca9554"; 194724ba675SRob Herring reg = <0x22>; 195724ba675SRob Herring gpio-controller; 196724ba675SRob Herring #gpio-cells = <2>; 197724ba675SRob Herring }; 198724ba675SRob Herring 199724ba675SRob Herring eeprom@50 { 200724ba675SRob Herring compatible = "atmel,24c04"; 201724ba675SRob Herring reg = <0x50>; 202724ba675SRob Herring label = "nameplate"; 203724ba675SRob Herring }; 204724ba675SRob Herring 205724ba675SRob Herring eeprom@52 { 206724ba675SRob Herring compatible = "atmel,24c04"; 207724ba675SRob Herring reg = <0x52>; 208724ba675SRob Herring }; 209724ba675SRob Herring}; 210724ba675SRob Herring 211724ba675SRob Herring&i2c1 { 212724ba675SRob Herring clock-frequency = <100000>; 213724ba675SRob Herring pinctrl-names = "default"; 214724ba675SRob Herring pinctrl-0 = <&pinctrl_i2c1>; 215724ba675SRob Herring status = "okay"; 216724ba675SRob Herring 217724ba675SRob Herring watchdog@38 { 218724ba675SRob Herring compatible = "zii,rave-wdt"; 219724ba675SRob Herring reg = <0x38>; 220724ba675SRob Herring }; 221724ba675SRob Herring}; 222724ba675SRob Herring 223724ba675SRob Herring&snvsrtc { 224724ba675SRob Herring status = "disabled"; 225724ba675SRob Herring}; 226724ba675SRob Herring 227724ba675SRob Herring&uart0 { 228724ba675SRob Herring pinctrl-names = "default"; 229724ba675SRob Herring pinctrl-0 = <&pinctrl_uart0>; 230724ba675SRob Herring status = "okay"; 231724ba675SRob Herring}; 232724ba675SRob Herring 233724ba675SRob Herring&uart1 { 234724ba675SRob Herring pinctrl-names = "default"; 235724ba675SRob Herring pinctrl-0 = <&pinctrl_uart1>; 236724ba675SRob Herring status = "okay"; 237724ba675SRob Herring}; 238724ba675SRob Herring 239724ba675SRob Herring&uart2 { 240724ba675SRob Herring pinctrl-names = "default"; 241724ba675SRob Herring pinctrl-0 = <&pinctrl_uart2>; 242724ba675SRob Herring status = "okay"; 243724ba675SRob Herring 244724ba675SRob Herring mcu { 245724ba675SRob Herring compatible = "zii,rave-sp-rdu2"; 246724ba675SRob Herring current-speed = <1000000>; 247724ba675SRob Herring #address-cells = <1>; 248724ba675SRob Herring #size-cells = <1>; 249724ba675SRob Herring 250724ba675SRob Herring watchdog { 251724ba675SRob Herring compatible = "zii,rave-sp-watchdog"; 252724ba675SRob Herring }; 253724ba675SRob Herring 254724ba675SRob Herring eeprom@a3 { 255724ba675SRob Herring compatible = "zii,rave-sp-eeprom"; 256724ba675SRob Herring reg = <0xa3 0x4000>; 257724ba675SRob Herring #address-cells = <1>; 258724ba675SRob Herring #size-cells = <1>; 259724ba675SRob Herring zii,eeprom-name = "main-eeprom"; 260724ba675SRob Herring }; 261724ba675SRob Herring }; 262724ba675SRob Herring}; 263724ba675SRob Herring 264724ba675SRob Herring&uart3 { 265724ba675SRob Herring pinctrl-names = "default"; 266724ba675SRob Herring pinctrl-0 = <&pinctrl_uart3>; 267724ba675SRob Herring status = "okay"; 268724ba675SRob Herring}; 269724ba675SRob Herring 270724ba675SRob Herring&wdoga5 { 271724ba675SRob Herring status = "disabled"; 272724ba675SRob Herring}; 273724ba675SRob Herring 274724ba675SRob Herring&iomuxc { 275724ba675SRob Herring pinctrl_dspi1: dspi1grp { 276724ba675SRob Herring fsl,pins = < 277724ba675SRob Herring VF610_PAD_PTD5__DSPI1_CS0 0x1182 278724ba675SRob Herring VF610_PAD_PTD4__DSPI1_CS1 0x1182 279724ba675SRob Herring VF610_PAD_PTC6__DSPI1_SIN 0x1181 280724ba675SRob Herring VF610_PAD_PTC7__DSPI1_SOUT 0x1182 281724ba675SRob Herring VF610_PAD_PTC8__DSPI1_SCK 0x1182 282724ba675SRob Herring >; 283724ba675SRob Herring }; 284724ba675SRob Herring 285724ba675SRob Herring pinctrl_esdhc0: esdhc0grp { 286724ba675SRob Herring fsl,pins = < 287724ba675SRob Herring VF610_PAD_PTC0__ESDHC0_CLK 0x31ef 288724ba675SRob Herring VF610_PAD_PTC1__ESDHC0_CMD 0x31ef 289724ba675SRob Herring VF610_PAD_PTC2__ESDHC0_DAT0 0x31ef 290724ba675SRob Herring VF610_PAD_PTC3__ESDHC0_DAT1 0x31ef 291724ba675SRob Herring VF610_PAD_PTC4__ESDHC0_DAT2 0x31ef 292724ba675SRob Herring VF610_PAD_PTC5__ESDHC0_DAT3 0x31ef 293724ba675SRob Herring VF610_PAD_PTD23__ESDHC0_DAT4 0x31ef 294724ba675SRob Herring VF610_PAD_PTD22__ESDHC0_DAT5 0x31ef 295724ba675SRob Herring VF610_PAD_PTD21__ESDHC0_DAT6 0x31ef 296724ba675SRob Herring VF610_PAD_PTD20__ESDHC0_DAT7 0x31ef 297724ba675SRob Herring >; 298724ba675SRob Herring }; 299724ba675SRob Herring 300724ba675SRob Herring pinctrl_esdhc1: esdhc1grp { 301724ba675SRob Herring fsl,pins = < 302724ba675SRob Herring VF610_PAD_PTA24__ESDHC1_CLK 0x31ef 303724ba675SRob Herring VF610_PAD_PTA25__ESDHC1_CMD 0x31ef 304724ba675SRob Herring VF610_PAD_PTA26__ESDHC1_DAT0 0x31ef 305724ba675SRob Herring VF610_PAD_PTA27__ESDHC1_DAT1 0x31ef 306724ba675SRob Herring VF610_PAD_PTA28__ESDHC1_DATA2 0x31ef 307724ba675SRob Herring VF610_PAD_PTA29__ESDHC1_DAT3 0x31ef 308724ba675SRob Herring >; 309724ba675SRob Herring }; 310724ba675SRob Herring 311724ba675SRob Herring pinctrl_fec1: fec1grp { 312724ba675SRob Herring fsl,pins = < 313724ba675SRob Herring VF610_PAD_PTA6__RMII_CLKIN 0x30d1 314724ba675SRob Herring VF610_PAD_PTC9__ENET_RMII1_MDC 0x30d2 315724ba675SRob Herring VF610_PAD_PTC10__ENET_RMII1_MDIO 0x30d3 316724ba675SRob Herring VF610_PAD_PTC11__ENET_RMII1_CRS 0x30d1 317724ba675SRob Herring VF610_PAD_PTC12__ENET_RMII1_RXD1 0x30d1 318724ba675SRob Herring VF610_PAD_PTC13__ENET_RMII1_RXD0 0x30d1 319724ba675SRob Herring VF610_PAD_PTC14__ENET_RMII1_RXER 0x30d1 320724ba675SRob Herring VF610_PAD_PTC15__ENET_RMII1_TXD1 0x30d2 321724ba675SRob Herring VF610_PAD_PTC16__ENET_RMII1_TXD0 0x30d2 322724ba675SRob Herring VF610_PAD_PTC17__ENET_RMII1_TXEN 0x30d2 323724ba675SRob Herring >; 324724ba675SRob Herring }; 325724ba675SRob Herring 326724ba675SRob Herring pinctrl_gpio_switch0: pinctrl-gpio-switch0 { 327724ba675SRob Herring fsl,pins = < 328724ba675SRob Herring VF610_PAD_PTB28__GPIO_98 0x219d 329724ba675SRob Herring >; 330724ba675SRob Herring }; 331724ba675SRob Herring 332724ba675SRob Herring pinctrl_i2c0: i2c0grp { 333724ba675SRob Herring fsl,pins = < 334724ba675SRob Herring VF610_PAD_PTB14__I2C0_SCL 0x37ff 335724ba675SRob Herring VF610_PAD_PTB15__I2C0_SDA 0x37ff 336724ba675SRob Herring >; 337724ba675SRob Herring }; 338724ba675SRob Herring 339724ba675SRob Herring pinctrl_i2c1: i2c1grp { 340724ba675SRob Herring fsl,pins = < 341724ba675SRob Herring VF610_PAD_PTB16__I2C1_SCL 0x37ff 342724ba675SRob Herring VF610_PAD_PTB17__I2C1_SDA 0x37ff 343724ba675SRob Herring >; 344724ba675SRob Herring }; 345724ba675SRob Herring 346724ba675SRob Herring pinctrl_leds_debug: pinctrl-leds-debug { 347724ba675SRob Herring fsl,pins = < 348724ba675SRob Herring VF610_PAD_PTD3__GPIO_82 0x31c2 349724ba675SRob Herring >; 350724ba675SRob Herring }; 351724ba675SRob Herring 352724ba675SRob Herring pinctrl_uart0: uart0grp { 353724ba675SRob Herring fsl,pins = < 354724ba675SRob Herring VF610_PAD_PTB10__UART0_TX 0x21a2 355724ba675SRob Herring VF610_PAD_PTB11__UART0_RX 0x21a1 356724ba675SRob Herring >; 357724ba675SRob Herring }; 358724ba675SRob Herring 359724ba675SRob Herring pinctrl_uart1: uart1grp { 360724ba675SRob Herring fsl,pins = < 361724ba675SRob Herring VF610_PAD_PTB23__UART1_TX 0x21a2 362724ba675SRob Herring VF610_PAD_PTB24__UART1_RX 0x21a1 363724ba675SRob Herring >; 364724ba675SRob Herring }; 365724ba675SRob Herring 366724ba675SRob Herring pinctrl_uart2: uart2grp { 367724ba675SRob Herring fsl,pins = < 368724ba675SRob Herring VF610_PAD_PTD0__UART2_TX 0x21a2 369724ba675SRob Herring VF610_PAD_PTD1__UART2_RX 0x21a1 370724ba675SRob Herring >; 371724ba675SRob Herring }; 372724ba675SRob Herring 373724ba675SRob Herring pinctrl_uart3: uart3grp { 374724ba675SRob Herring fsl,pins = < 375724ba675SRob Herring VF610_PAD_PTA30__UART3_TX 0x21a2 376724ba675SRob Herring VF610_PAD_PTA31__UART3_RX 0x21a1 377724ba675SRob Herring >; 378724ba675SRob Herring }; 379724ba675SRob Herring}; 380