xref: /linux/arch/arm/boot/dts/nxp/ls/ls1021a-moxa-uc-8410a.dts (revision c532de5a67a70f8533d495f8f2aaa9a0491c3ad0) 
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copyright (C) 2017 Moxa Inc. - https://www.moxa.com/
4 *
5 * Author: Harry YJ Jhou (周亞諄) <harryyj.jhou@moxa.com>
6 *         Jimmy Chen (陳永達)    <jimmy.chen@moxa.com>
7 *         SZ Lin (林上智)        <sz.lin@moxa.com>
8 */
9
10/dts-v1/;
11
12#include <dt-bindings/gpio/gpio.h>
13#include <dt-bindings/input/input.h>
14#include "ls1021a.dtsi"
15
16/ {
17	model = "Moxa UC-8410A";
18	compatible = "fsl,ls1021a-moxa-uc-8410a", "fsl,ls1021a";
19
20	aliases {
21		enet0_rgmii_phy = &rgmii_phy0;
22		enet1_rgmii_phy = &rgmii_phy1;
23		enet2_rgmii_phy = &rgmii_phy2;
24	};
25
26	sys_mclk: clock-mclk {
27		compatible = "fixed-clock";
28		#clock-cells = <0>;
29		clock-frequency = <24576000>;
30	};
31
32	reg_3p3v: regulator-3p3v {
33		compatible = "regulator-fixed";
34		regulator-name = "3P3V";
35		regulator-min-microvolt = <3300000>;
36		regulator-max-microvolt = <3300000>;
37		regulator-always-on;
38	};
39
40	leds {
41		compatible = "gpio-leds";
42
43		cel-pwr {
44			label = "UC8410A:CEL-PWR";
45			gpios = <&gpio3 27 GPIO_ACTIVE_LOW>;
46			default-state = "off";
47		};
48
49		cel-reset {
50			label = "UC8410A:CEL-RESET";
51			gpios = <&gpio3 28 GPIO_ACTIVE_LOW>;
52			default-state = "off";
53		};
54
55		str-led {
56			label = "UC8410A:RED:PROG";
57			gpios = <&gpio0 16 GPIO_ACTIVE_HIGH>;
58			linux,default-trigger = "mmc0";
59		};
60
61		sw-ready {
62			label = "UC8410A:GREEN:SWRDY";
63			gpios = <&gpio0 18 GPIO_ACTIVE_HIGH>;
64			default-state = "on";
65		};
66
67		beeper {
68			label = "UC8410A:BEEP";
69			gpios = <&gpio0 20 GPIO_ACTIVE_HIGH>;
70			default-state = "off";
71		};
72
73		prog-led0 {
74			label = "UC8410A:GREEN:PROG2";
75			gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>;
76			default-state = "off";
77		};
78
79		prog-led1 {
80			label = "UC8410A:GREEN:PROG1";
81			gpios = <&gpio3 15 GPIO_ACTIVE_HIGH>;
82			default-state = "off";
83		};
84
85		prog-led2 {
86			label = "UC8410A:GREEN:PROG0";
87			gpios = <&gpio3 16 GPIO_ACTIVE_HIGH>;
88			default-state = "off";
89		};
90
91		wifi-signal0 {
92			label = "UC8410A:GREEN:CEL2";
93			gpios = <&gpio3 17 GPIO_ACTIVE_HIGH>;
94			default-state = "off";
95		};
96
97		wifi-signal1 {
98			label = "UC8410A:GREEN:CEL1";
99			gpios = <&gpio3 18 GPIO_ACTIVE_HIGH>;
100			default-state = "off";
101		};
102
103		wifi-signal2 {
104			label = "UC8410A:GREEN:CEL0";
105			gpios = <&gpio3 19 GPIO_ACTIVE_HIGH>;
106			default-state = "off";
107		};
108
109		cpu-diag-red {
110			label = "UC8410A:RED:DIA";
111			gpios = <&gpio3 20 GPIO_ACTIVE_HIGH>;
112			default-state = "off";
113		};
114
115		cpu-diag-green {
116			label = "UC8410A:GREEN:DIA";
117			gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>;
118			default-state = "off";
119		};
120
121		cpu-diag-yellow {
122			label = "UC8410A:YELLOW:DIA";
123			gpios = <&gpio3 22 GPIO_ACTIVE_HIGH>;
124			default-state = "off";
125		};
126	};
127
128	gpio-keys {
129		compatible = "gpio-keys";
130
131		pushbtn-key {
132			label = "push button key";
133			gpios = <&gpio1 21 GPIO_ACTIVE_LOW>;
134			linux,code = <BTN_MISC>;
135			default-state = "on";
136		};
137	};
138};
139
140&enet0 {
141	phy-handle = <&rgmii_phy0>;
142	phy-connection-type = "rgmii-id";
143	status = "okay";
144};
145
146&enet1 {
147	phy-handle = <&rgmii_phy1>;
148	phy-connection-type = "rgmii-id";
149	status = "okay";
150};
151
152&enet2 {
153	phy-handle = <&rgmii_phy2>;
154	phy-connection-type = "rgmii-id";
155	status = "okay";
156};
157
158&i2c0 {
159	clock-frequency = <100000>;
160	status = "okay";
161
162	tpm@20 {
163		compatible = "infineon,slb9635tt";
164		reg = <0x20>;
165	};
166
167	rtc@68 {
168		compatible = "dallas,ds1374";
169		reg = <0x68>;
170	};
171};
172
173&lpuart0 {
174	status = "okay";
175};
176
177&mdio0 {
178	rgmii_phy0: ethernet-phy@0 {
179		compatible = "marvell,88e1118";
180		reg = <0x0>;
181		marvell,reg-init =
182			<3 0x11 0 0x4415>, /* Reg 3,17 */
183			<3 0x10 0 0x77>; /* Reg 3,16 */
184	};
185
186	rgmii_phy1: ethernet-phy@1 {
187		compatible = "marvell,88e1118";
188		reg = <0x1>;
189		marvell,reg-init =
190			<3 0x11 0 0x4415>, /* Reg 3,17 */
191			<3 0x10 0 0x77>; /* Reg 3,16 */
192	};
193
194	rgmii_phy2: ethernet-phy@2 {
195		compatible = "marvell,88e1118";
196		reg = <0x2>;
197		marvell,reg-init =
198			<3 0x11 0 0x4415>, /* Reg 3,17 */
199			<3 0x10 0 0x77>; /* Reg 3,16 */
200	};
201};
202
203&qspi {
204	status = "okay";
205
206	flash: flash@0 {
207		compatible = "spansion,s25fl064l", "spansion,s25fl164k";
208		#address-cells = <1>;
209		#size-cells = <1>;
210		spi-max-frequency = <20000000>;
211		spi-rx-bus-width = <4>;
212		spi-tx-bus-width = <4>;
213		reg = <0>;
214
215		partitions@0 {
216			label = "U-Boot";
217			reg = <0x0 0x180000>;
218		};
219
220		partitions@180000 {
221			label = "U-Boot Env";
222			reg = <0x180000 0x680000>;
223		};
224	};
225};
226
227&sata {
228	status = "okay";
229};
230
231&uart0 {
232	status = "okay";
233};
234
235&uart1 {
236	status = "okay";
237};
238