xref: /linux/arch/arm/boot/dts/nxp/lpc/lpc4357-myd-lpc4357.dts (revision 55a42f78ffd386e01a5404419f8c5ded7db70a21) 
1// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
2/*
3 * MYIR Tech MYD-LPC4357 Development Board with 800x480 7" TFT panel
4 *
5 * Copyright (C) 2016-2018 Vladimir Zapolskiy <vz@mleia.com>
6 */
7
8/dts-v1/;
9
10#include "lpc18xx.dtsi"
11#include "lpc4357.dtsi"
12
13#include <dt-bindings/gpio/gpio.h>
14
15/ {
16	model = "MYIR Tech LPC4357 Development Board";
17	compatible = "myir,myd-lpc4357", "nxp,lpc4357";
18
19	chosen {
20		stdout-path = "serial3:115200n8";
21	};
22
23	memory@28000000 {
24		device_type = "memory";
25		reg = <0x28000000 0x2000000>;
26	};
27
28	leds {
29		compatible = "gpio-leds";
30		pinctrl-names = "default";
31		pinctrl-0 = <&led_pins>;
32
33		led1 {
34			gpios = <&gpio LPC_GPIO(6,15) GPIO_ACTIVE_LOW>;
35			default-state = "off";
36		};
37
38		led2 {
39			gpios = <&gpio LPC_GPIO(6,16) GPIO_ACTIVE_LOW>;
40			default-state = "off";
41		};
42
43		led3 {
44			gpios = <&gpio LPC_GPIO(6,17) GPIO_ACTIVE_LOW>;
45			default-state = "off";
46		};
47
48		led4 {
49			gpios = <&gpio LPC_GPIO(6,10) GPIO_ACTIVE_LOW>;
50			default-state = "off";
51		};
52
53		led5 {
54			gpios = <&gpio LPC_GPIO(7,14) GPIO_ACTIVE_LOW>;
55			default-state = "off";
56		};
57
58		led6 {
59			gpios = <&gpio LPC_GPIO(6,14) GPIO_ACTIVE_LOW>;
60			default-state = "off";
61		};
62	};
63
64	panel: panel {
65		compatible = "innolux,at070tn92";
66		power-supply = <&vcc>;
67
68		port {
69			panel_input: endpoint {
70				remote-endpoint = <&lcdc_output>;
71			};
72		};
73	};
74
75	vcc: vcc_fixed {
76		compatible = "regulator-fixed";
77		regulator-name = "vcc-supply";
78		regulator-min-microvolt = <3300000>;
79		regulator-max-microvolt = <3300000>;
80	};
81
82	vmmc: vmmc_fixed {
83		compatible = "regulator-fixed";
84		regulator-name = "vmmc-supply";
85		regulator-min-microvolt = <3300000>;
86		regulator-max-microvolt = <3300000>;
87	};
88};
89
90&pinctrl {
91	can0_pins: can0-pins {
92		can_rd_cfg {
93			pins = "p3_1";
94			function = "can0";
95			input-enable;
96		};
97
98		can_td_cfg {
99			pins = "p3_2";
100			function = "can0";
101		};
102	};
103
104	can1_pins: can1-pins {
105		can_rd_cfg {
106			pins = "pe_1";
107			function = "can1";
108			input-enable;
109		};
110
111		can_td_cfg {
112			pins = "pe_0";
113			function = "can1";
114		};
115	};
116
117	emc_pins: emc-pins {
118		emc_addr0_22_cfg {
119			pins = "p2_9",  "p2_10", "p2_11", "p2_12",
120			       "p2_13", "p1_0",  "p1_1",  "p1_2",
121			       "p2_8",  "p2_7",  "p2_6",  "p2_2",
122			       "p2_1",  "p2_0",  "p6_8",  "p6_7",
123			       "pd_16", "pd_15", "pe_0",  "pe_1",
124			       "pe_2",  "pe_3",  "pe_4";
125			function = "emc";
126			slew-rate = <1>;
127			bias-disable;
128		};
129
130		emc_data0_15_cfg {
131			pins = "p1_7",  "p1_8",  "p1_9",  "p1_10",
132			       "p1_11", "p1_12", "p1_13", "p1_14",
133			       "p5_4",  "p5_5",  "p5_6",  "p5_7",
134			       "p5_0",  "p5_1",  "p5_2",  "p5_3";
135			function = "emc";
136			input-enable;
137			input-schmitt-disable;
138			slew-rate = <1>;
139			bias-disable;
140		};
141
142		emc_we_oe_cfg {
143			pins = "p1_6", "p1_3";
144			function = "emc";
145			slew-rate = <1>;
146			bias-disable;
147		};
148
149		emc_cs0_cfg {
150			pins = "p1_5";
151			function = "emc";
152			slew-rate = <1>;
153			bias-disable;
154		};
155
156		emc_sdram_dqm0_1_cfg {
157			pins = "p6_12", "p6_10";
158			function = "emc";
159			slew-rate = <1>;
160			bias-disable;
161		};
162
163		emc_sdram_ras_cas_cfg {
164			pins = "p6_5", "p6_4";
165			function = "emc";
166			slew-rate = <1>;
167			bias-disable;
168		};
169
170		emc_sdram_dycs0_cfg {
171			pins = "p6_9";
172			function = "emc";
173			slew-rate = <1>;
174			bias-disable;
175		};
176
177		emc_sdram_cke_cfg {
178			pins = "p6_11";
179			function = "emc";
180			slew-rate = <1>;
181			bias-disable;
182		};
183
184		emc_sdram_clock_cfg {
185			pins = "clk0";
186			function = "emc";
187			input-enable;
188			input-schmitt-disable;
189			slew-rate = <1>;
190			bias-disable;
191		};
192	};
193
194	enet_rmii_pins: enet-rmii-pins {
195		enet_rmii_rxd_cfg {
196			pins = "p1_15", "p0_0";
197			function = "enet";
198			input-enable;
199			input-schmitt-disable;
200			slew-rate = <1>;
201			bias-disable;
202		};
203
204		enet_rmii_txd_cfg {
205			pins = "p1_18", "p1_20";
206			function = "enet";
207			slew-rate = <1>;
208			bias-disable;
209		};
210
211		enet_rmii_rx_dv_cfg {
212			pins = "p1_16";
213			function = "enet";
214			input-enable;
215			input-schmitt-disable;
216			bias-disable;
217		};
218
219		enet_mdio_cfg {
220			pins = "p1_17";
221			function = "enet";
222			input-enable;
223			input-schmitt-disable;
224			bias-disable;
225		};
226
227		enet_mdc_cfg {
228			pins = "pc_1";
229			function = "enet";
230			slew-rate = <1>;
231			bias-disable;
232		};
233
234		enet_rmii_tx_en_cfg {
235			pins = "p0_1";
236			function = "enet";
237			bias-disable;
238		};
239
240		enet_ref_clk_cfg {
241			pins = "p1_19";
242			function = "enet";
243			slew-rate = <1>;
244			input-enable;
245			input-schmitt-disable;
246			bias-disable;
247		};
248	};
249
250	i2c0_pins: i2c0-pins {
251		i2c0_pins_cfg {
252			pins = "i2c0_scl", "i2c0_sda";
253			function = "i2c0";
254			input-enable;
255		};
256	};
257
258	i2c1_pins: i2c1-pins {
259		i2c1_pins_cfg {
260			pins = "pe_15", "pe_13";
261			function = "i2c1";
262			input-enable;
263		};
264	};
265
266	lcd_pins: lcd-pins {
267		lcd_vd0_23_cfg {
268			pins = "p4_1", "p4_4", "p4_3",  "p4_2",
269			       "p8_7", "p8_6", "p8_5",  "p8_4",
270			       "p7_5", "p4_8", "p4_10", "p4_9",
271			       "p8_3", "pb_6", "pb_5",  "pb_4",
272			       "p7_4", "p7_3", "p7_2",  "p7_1",
273			       "pb_3", "pb_2", "pb_1",  "pb_0";
274			function = "lcd";
275		};
276
277		lcd_vsync_en_dclk_lp_pwr_cfg {
278			pins = "p4_5", "p4_6", "p4_7", "p7_6", "p7_7";
279			function = "lcd";
280		};
281	};
282
283	led_pins: led-pins {
284		led_1_6_cfg {
285			pins = "pd_1", "pd_2", "pd_3", "pc_11", "pe_14", "pd_0";
286			function = "gpio";
287			bias-pull-down;
288		};
289	};
290
291	sdmmc_pins: sdmmc-pins {
292		sdmmc_clk_cfg {
293			pins = "pc_0";
294			function = "sdmmc";
295			slew-rate = <1>;
296			bias-pull-down;
297		};
298
299		sdmmc_cmd_dat0_3_cfg {
300			pins = "pc_4", "pc_5", "pc_6", "pc_7", "pc_10";
301			function = "sdmmc";
302			input-enable;
303			input-schmitt-disable;
304			slew-rate = <1>;
305			bias-disable;
306		};
307
308		sdmmc_cd_cfg {
309			pins = "pc_8";
310			function = "sdmmc";
311			input-enable;
312			bias-pull-down;
313		};
314	};
315
316	spifi_pins: spifi-pins {
317		spifi_sck_cfg {
318			pins = "p3_3";
319			function = "spifi";
320			input-enable;
321			input-schmitt-disable;
322			slew-rate = <1>;
323			bias-disable;
324		};
325
326		spifi_mosi_miso_sio2_sio3_cfg {
327			pins = "p3_7", "p3_6", "p3_5", "p3_4";
328			function = "spifi";
329			input-enable;
330			input-schmitt-disable;
331			slew-rate = <1>;
332			bias-disable;
333		};
334
335		spifi_cs_cfg {
336			pins = "p3_8";
337			function = "spifi";
338			bias-disable;
339		};
340	};
341
342	ssp1_pins: ssp1-pins {
343		ssp1_sck_cfg {
344			pins = "pf_4";
345			function = "ssp1";
346			slew-rate = <1>;
347			bias-pull-down;
348		};
349
350		ssp1_miso_cfg {
351			pins = "pf_6";
352			function = "ssp1";
353			input-enable;
354			input-schmitt-disable;
355			slew-rate = <1>;
356			bias-pull-down;
357		};
358
359		ssp1_mosi_cfg {
360			pins = "pf_7";
361			function = "ssp1";
362			slew-rate = <1>;
363			bias-pull-down;
364		};
365
366		ssp1_ssel_cfg {
367			pins = "pf_5";
368			function = "gpio";
369			bias-disable;
370		};
371	};
372
373	uart0_pins: uart0-pins {
374		uart0_rxd_cfg {
375			pins = "pf_11";
376			function = "uart0";
377			input-enable;
378			input-schmitt-disable;
379			bias-disable;
380		};
381
382		uart0_clk_dir_txd_cfg {
383			pins = "pf_8", "pf_9", "pf_10";
384			function = "uart0";
385			bias-pull-down;
386		};
387	};
388
389	uart1_pins: uart1-pins {
390		uart1_rxd_cfg {
391			pins = "pc_14";
392			function = "uart1";
393			bias-disable;
394			input-enable;
395			input-schmitt-disable;
396		};
397
398		uart1_dtr_txd_cfg {
399			pins = "pc_12", "pc_13";
400			function = "uart1";
401			bias-pull-down;
402		};
403	};
404
405	uart2_pins: uart2-pins {
406		uart2_rxd_cfg {
407			pins = "pa_2";
408			function = "uart2";
409			bias-disable;
410			input-enable;
411			input-schmitt-disable;
412		};
413
414		uart2_txd_cfg {
415			pins = "pa_1";
416			function = "uart2";
417			bias-pull-down;
418		};
419	};
420
421	uart3_pins: uart3-pins {
422		uart3_rx_cfg {
423			pins = "p2_4";
424			function = "uart3";
425			bias-disable;
426			input-enable;
427			input-schmitt-disable;
428		};
429
430		uart3_tx_cfg {
431			pins = "p2_3";
432			function = "uart3";
433			bias-pull-down;
434		};
435	};
436
437	usb0_pins: usb0-pins {
438		usb0_pwr_enable_cfg {
439			pins = "p6_3";
440			function = "usb0";
441		};
442
443		usb0_pwr_fault_cfg {
444			pins = "p8_0";
445			function = "usb0";
446			bias-disable;
447			input-enable;
448		};
449	};
450};
451
452&adc1 {
453	status = "okay";
454	vref-supply = <&vcc>;
455};
456
457&can0 {
458	status = "okay";
459	pinctrl-names = "default";
460	pinctrl-0 = <&can0_pins>;
461};
462
463/* Pin conflict with EMC, muxed by JP5 and JP6 */
464&can1 {
465	status = "disabled";
466	pinctrl-names = "default";
467	pinctrl-0 = <&can1_pins>;
468};
469
470&emc {
471	status = "okay";
472	pinctrl-names = "default";
473	pinctrl-0 = <&emc_pins>;
474
475	cs0 {
476		#address-cells = <2>;
477		#size-cells = <1>;
478		ranges;
479
480		mpmc,cs = <0>;
481		mpmc,memory-width = <16>;
482		mpmc,byte-lane-low;
483		mpmc,write-enable-delay = <0>;
484		mpmc,output-enable-delay = <0>;
485		mpmc,read-access-delay = <70>;
486		mpmc,page-mode-read-delay = <70>;
487
488		/* SST/Microchip SST39VF1601 */
489		flash@0,0 {
490			compatible = "cfi-flash";
491			reg = <0 0 0x400000>;
492			bank-width = <2>;
493		};
494	};
495};
496
497&enet_tx_clk {
498	clock-frequency = <50000000>;
499};
500
501&i2c0 {
502	status = "okay";
503	pinctrl-names = "default";
504	pinctrl-0 = <&i2c0_pins>;
505	clock-frequency = <400000>;
506};
507
508&i2c1 {
509	status = "okay";
510	pinctrl-names = "default";
511	pinctrl-0 = <&i2c1_pins>;
512	clock-frequency = <400000>;
513
514	sensor@49 {
515		compatible = "national,lm75";
516		reg = <0x49>;
517	};
518
519	eeprom@50 {
520		compatible = "atmel,24c512";
521		reg = <0x50>;
522	};
523};
524
525&lcdc {
526	status = "okay";
527	pinctrl-names = "default";
528	pinctrl-0 = <&lcd_pins>;
529
530	max-memory-bandwidth = <92240000>;
531
532	port {
533		lcdc_output: endpoint {
534			remote-endpoint = <&panel_input>;
535			arm,pl11x,tft-r0g0b0-pads = <0 8 16>;
536		};
537	};
538};
539
540&mac {
541	status = "okay";
542	phy-mode = "rmii";
543	pinctrl-names = "default";
544	pinctrl-0 = <&enet_rmii_pins>;
545	phy-handle = <&phy1>;
546
547	mdio {
548		#address-cells = <1>;
549		#size-cells = <0>;
550		compatible = "snps,dwmac-mdio";
551
552		phy1: ethernet-phy@1 {
553			reg = <1>;
554		};
555	};
556};
557
558&mmcsd {
559	status = "okay";
560	pinctrl-names = "default";
561	pinctrl-0 = <&sdmmc_pins>;
562	bus-width = <4>;
563	vmmc-supply = <&vmmc>;
564};
565
566/* Pin conflict with SSP0, the latter is routed to J17 pin header */
567&spifi {
568	status = "okay";
569	pinctrl-names = "default";
570	pinctrl-0 = <&spifi_pins>;
571
572	/* Atmel AT25DF321A */
573	flash@0 {
574		compatible = "jedec,spi-nor";
575		reg = <0>;
576		spi-max-frequency = <51000000>;
577		spi-cpol;
578		spi-cpha;
579	};
580};
581
582&ssp1 {
583	status = "okay";
584	pinctrl-names = "default";
585	pinctrl-0 = <&ssp1_pins>;
586	num-cs = <1>;
587	cs-gpios = <&gpio LPC_GPIO(7,19) GPIO_ACTIVE_LOW>;
588};
589
590/* Routed to J17 pin header */
591&uart0 {
592	status = "okay";
593	pinctrl-names = "default";
594	pinctrl-0 = <&uart0_pins>;
595};
596
597/* RS485 */
598&uart1 {
599	status = "okay";
600	pinctrl-names = "default";
601	pinctrl-0 = <&uart1_pins>;
602};
603
604/* Routed to J17 pin header */
605&uart2 {
606	status = "okay";
607	pinctrl-names = "default";
608	pinctrl-0 = <&uart2_pins>;
609};
610
611&uart3 {
612	status = "okay";
613	pinctrl-names = "default";
614	pinctrl-0 = <&uart3_pins>;
615};
616
617&usb0 {
618	status = "okay";
619	pinctrl-names = "default";
620	pinctrl-0 = <&usb0_pins>;
621};
622