1*724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0 OR X11 2*724ba675SRob Herring/* 3*724ba675SRob Herring * Device Tree Include file for TQ-Systems MBa7 carrier board. 4*724ba675SRob Herring * 5*724ba675SRob Herring * Copyright (C) 2016 TQ-Systems GmbH 6*724ba675SRob Herring * Author: Markus Niebel <Markus.Niebel@tq-group.com> 7*724ba675SRob Herring * Copyright (C) 2019 Bruno Thomsen <bruno.thomsen@gmail.com> 8*724ba675SRob Herring * 9*724ba675SRob Herring * Note: This file does not include nodes for all peripheral devices. 10*724ba675SRob Herring * As device driver coverage increases additional nodes can be added. 11*724ba675SRob Herring */ 12*724ba675SRob Herring 13*724ba675SRob Herring#include <dt-bindings/input/input.h> 14*724ba675SRob Herring#include <dt-bindings/net/ti-dp83867.h> 15*724ba675SRob Herring 16*724ba675SRob Herring/ { 17*724ba675SRob Herring aliases { 18*724ba675SRob Herring mmc0 = &usdhc3; 19*724ba675SRob Herring mmc1 = &usdhc1; 20*724ba675SRob Herring /delete-property/ mmc2; 21*724ba675SRob Herring }; 22*724ba675SRob Herring 23*724ba675SRob Herring beeper { 24*724ba675SRob Herring compatible = "gpio-beeper"; 25*724ba675SRob Herring gpios = <&pca9555 0 GPIO_ACTIVE_HIGH>; 26*724ba675SRob Herring }; 27*724ba675SRob Herring 28*724ba675SRob Herring chosen { 29*724ba675SRob Herring stdout-path = &uart6; 30*724ba675SRob Herring }; 31*724ba675SRob Herring 32*724ba675SRob Herring gpio_buttons: gpio-keys { 33*724ba675SRob Herring compatible = "gpio-keys"; 34*724ba675SRob Herring 35*724ba675SRob Herring button-0 { 36*724ba675SRob Herring /* #SWITCH_A */ 37*724ba675SRob Herring label = "S11"; 38*724ba675SRob Herring linux,code = <KEY_1>; 39*724ba675SRob Herring gpios = <&pca9555 13 GPIO_ACTIVE_LOW>; 40*724ba675SRob Herring }; 41*724ba675SRob Herring 42*724ba675SRob Herring button-1 { 43*724ba675SRob Herring /* #SWITCH_B */ 44*724ba675SRob Herring label = "S12"; 45*724ba675SRob Herring linux,code = <KEY_2>; 46*724ba675SRob Herring gpios = <&pca9555 14 GPIO_ACTIVE_LOW>; 47*724ba675SRob Herring }; 48*724ba675SRob Herring 49*724ba675SRob Herring button-2 { 50*724ba675SRob Herring /* #SWITCH_C */ 51*724ba675SRob Herring label = "S13"; 52*724ba675SRob Herring linux,code = <KEY_3>; 53*724ba675SRob Herring gpios = <&pca9555 15 GPIO_ACTIVE_LOW>; 54*724ba675SRob Herring }; 55*724ba675SRob Herring }; 56*724ba675SRob Herring 57*724ba675SRob Herring gpio-leds { 58*724ba675SRob Herring compatible = "gpio-leds"; 59*724ba675SRob Herring 60*724ba675SRob Herring led1 { 61*724ba675SRob Herring label = "led1"; 62*724ba675SRob Herring gpios = <&pca9555 8 GPIO_ACTIVE_HIGH>; 63*724ba675SRob Herring linux,default-trigger = "default-on"; 64*724ba675SRob Herring }; 65*724ba675SRob Herring 66*724ba675SRob Herring led2 { 67*724ba675SRob Herring label = "led2"; 68*724ba675SRob Herring gpios = <&pca9555 9 GPIO_ACTIVE_HIGH>; 69*724ba675SRob Herring linux,default-trigger = "heartbeat"; 70*724ba675SRob Herring }; 71*724ba675SRob Herring }; 72*724ba675SRob Herring 73*724ba675SRob Herring reg_sd1_vmmc: regulator-sd1-vmmc { 74*724ba675SRob Herring compatible = "regulator-fixed"; 75*724ba675SRob Herring regulator-name = "VCC3V3_SD1"; 76*724ba675SRob Herring regulator-min-microvolt = <3300000>; 77*724ba675SRob Herring regulator-max-microvolt = <3300000>; 78*724ba675SRob Herring regulator-always-on; 79*724ba675SRob Herring }; 80*724ba675SRob Herring 81*724ba675SRob Herring reg_fec1_pwdn: regulator-fec1-pwdn { 82*724ba675SRob Herring compatible = "regulator-fixed"; 83*724ba675SRob Herring regulator-name = "PWDN_FEC1"; 84*724ba675SRob Herring regulator-min-microvolt = <3300000>; 85*724ba675SRob Herring regulator-max-microvolt = <3300000>; 86*724ba675SRob Herring regulator-always-on; 87*724ba675SRob Herring gpio = <&gpio1 9 GPIO_ACTIVE_HIGH>; 88*724ba675SRob Herring enable-active-high; 89*724ba675SRob Herring }; 90*724ba675SRob Herring 91*724ba675SRob Herring reg_fec2_pwdn: regulator-fec2-pwdn { 92*724ba675SRob Herring compatible = "regulator-fixed"; 93*724ba675SRob Herring regulator-name = "PWDN_FEC2"; 94*724ba675SRob Herring regulator-min-microvolt = <3300000>; 95*724ba675SRob Herring regulator-max-microvolt = <3300000>; 96*724ba675SRob Herring regulator-always-on; 97*724ba675SRob Herring gpio = <&gpio2 31 GPIO_ACTIVE_HIGH>; 98*724ba675SRob Herring enable-active-high; 99*724ba675SRob Herring }; 100*724ba675SRob Herring 101*724ba675SRob Herring reg_usb_otg1_vbus: regulator-usb-otg1-vbus { 102*724ba675SRob Herring compatible = "regulator-fixed"; 103*724ba675SRob Herring regulator-name = "VBUS_USBOTG1"; 104*724ba675SRob Herring regulator-min-microvolt = <5000000>; 105*724ba675SRob Herring regulator-max-microvolt = <5000000>; 106*724ba675SRob Herring gpio = <&gpio1 5 GPIO_ACTIVE_HIGH>; 107*724ba675SRob Herring enable-active-high; 108*724ba675SRob Herring }; 109*724ba675SRob Herring 110*724ba675SRob Herring reg_usb_otg2_vbus: regulator-usb-otg2-vbus { 111*724ba675SRob Herring compatible = "regulator-fixed"; 112*724ba675SRob Herring regulator-name = "VBUS_USBOTG2"; 113*724ba675SRob Herring regulator-min-microvolt = <5000000>; 114*724ba675SRob Herring regulator-max-microvolt = <5000000>; 115*724ba675SRob Herring gpio = <&gpio1 7 GPIO_ACTIVE_HIGH>; 116*724ba675SRob Herring enable-active-high; 117*724ba675SRob Herring }; 118*724ba675SRob Herring 119*724ba675SRob Herring reg_mpcie_1v5: regulator-mpcie-1v5 { 120*724ba675SRob Herring compatible = "regulator-fixed"; 121*724ba675SRob Herring regulator-name = "VCC1V5_MPCIE"; 122*724ba675SRob Herring regulator-min-microvolt = <1500000>; 123*724ba675SRob Herring regulator-max-microvolt = <1500000>; 124*724ba675SRob Herring gpio = <&pca9555 12 GPIO_ACTIVE_HIGH>; 125*724ba675SRob Herring enable-active-high; 126*724ba675SRob Herring regulator-always-on; 127*724ba675SRob Herring }; 128*724ba675SRob Herring 129*724ba675SRob Herring reg_mpcie_3v3: regulator-mpcie-3v3 { 130*724ba675SRob Herring compatible = "regulator-fixed"; 131*724ba675SRob Herring regulator-name = "VCC3V3_MPCIE"; 132*724ba675SRob Herring regulator-min-microvolt = <3300000>; 133*724ba675SRob Herring regulator-max-microvolt = <3300000>; 134*724ba675SRob Herring gpio = <&pca9555 10 GPIO_ACTIVE_HIGH>; 135*724ba675SRob Herring enable-active-high; 136*724ba675SRob Herring regulator-always-on; 137*724ba675SRob Herring }; 138*724ba675SRob Herring 139*724ba675SRob Herring reg_mba_12v0: regulator-mba-12v0 { 140*724ba675SRob Herring compatible = "regulator-fixed"; 141*724ba675SRob Herring regulator-name = "VCC12V0_MBA7"; 142*724ba675SRob Herring regulator-min-microvolt = <12000000>; 143*724ba675SRob Herring regulator-max-microvolt = <12000000>; 144*724ba675SRob Herring gpio = <&pca9555 11 GPIO_ACTIVE_HIGH>; 145*724ba675SRob Herring enable-active-high; 146*724ba675SRob Herring }; 147*724ba675SRob Herring 148*724ba675SRob Herring reg_lvds_transmitter: regulator-lvds-transmitter { 149*724ba675SRob Herring compatible = "regulator-fixed"; 150*724ba675SRob Herring regulator-name = "#SHTDN_LVDS"; 151*724ba675SRob Herring regulator-min-microvolt = <3300000>; 152*724ba675SRob Herring regulator-max-microvolt = <3300000>; 153*724ba675SRob Herring gpio = <&pca9555 1 GPIO_ACTIVE_HIGH>; 154*724ba675SRob Herring enable-active-high; 155*724ba675SRob Herring }; 156*724ba675SRob Herring 157*724ba675SRob Herring reg_vref_1v8: regulator-vref-1v8 { 158*724ba675SRob Herring compatible = "regulator-fixed"; 159*724ba675SRob Herring regulator-name = "VCC1V8_REF"; 160*724ba675SRob Herring regulator-min-microvolt = <1800000>; 161*724ba675SRob Herring regulator-max-microvolt = <1800000>; 162*724ba675SRob Herring regulator-always-on; 163*724ba675SRob Herring vin-supply = <&sw2_reg>; 164*724ba675SRob Herring }; 165*724ba675SRob Herring 166*724ba675SRob Herring reg_audio_3v3: regulator-audio-3v3 { 167*724ba675SRob Herring compatible = "regulator-fixed"; 168*724ba675SRob Herring regulator-name = "VCC3V3_AUDIO"; 169*724ba675SRob Herring regulator-min-microvolt = <3300000>; 170*724ba675SRob Herring regulator-max-microvolt = <3300000>; 171*724ba675SRob Herring regulator-always-on; 172*724ba675SRob Herring }; 173*724ba675SRob Herring 174*724ba675SRob Herring sound { 175*724ba675SRob Herring compatible = "fsl,imx-audio-tlv320aic32x4"; 176*724ba675SRob Herring model = "imx-audio-tlv320aic32x4"; 177*724ba675SRob Herring ssi-controller = <&sai1>; 178*724ba675SRob Herring audio-codec = <&tlv320aic32x4>; 179*724ba675SRob Herring audio-routing = 180*724ba675SRob Herring "IN3_L", "Mic Jack", 181*724ba675SRob Herring "Mic Jack", "Mic Bias", 182*724ba675SRob Herring "IN1_L", "Line In Jack", 183*724ba675SRob Herring "IN1_R", "Line In Jack", 184*724ba675SRob Herring "Line Out Jack", "LOL", 185*724ba675SRob Herring "Line Out Jack", "LOR"; 186*724ba675SRob Herring }; 187*724ba675SRob Herring}; 188*724ba675SRob Herring 189*724ba675SRob Herring&adc1 { 190*724ba675SRob Herring vref-supply = <®_vref_1v8>; 191*724ba675SRob Herring status = "okay"; 192*724ba675SRob Herring}; 193*724ba675SRob Herring 194*724ba675SRob Herring&adc2 { 195*724ba675SRob Herring vref-supply = <®_vref_1v8>; 196*724ba675SRob Herring status = "okay"; 197*724ba675SRob Herring}; 198*724ba675SRob Herring 199*724ba675SRob Herring&ecspi1 { 200*724ba675SRob Herring pinctrl-names = "default"; 201*724ba675SRob Herring pinctrl-0 = <&pinctrl_ecspi1>; 202*724ba675SRob Herring cs-gpios = <&gpio4 0 GPIO_ACTIVE_LOW>, <&gpio4 1 GPIO_ACTIVE_LOW>, 203*724ba675SRob Herring <&gpio4 2 GPIO_ACTIVE_LOW>; 204*724ba675SRob Herring status = "okay"; 205*724ba675SRob Herring}; 206*724ba675SRob Herring 207*724ba675SRob Herring&ecspi2 { 208*724ba675SRob Herring pinctrl-names = "default"; 209*724ba675SRob Herring pinctrl-0 = <&pinctrl_ecspi2>; 210*724ba675SRob Herring status = "okay"; 211*724ba675SRob Herring}; 212*724ba675SRob Herring 213*724ba675SRob Herring&fec1 { 214*724ba675SRob Herring pinctrl-names = "default"; 215*724ba675SRob Herring pinctrl-0 = <&pinctrl_enet1>; 216*724ba675SRob Herring phy-mode = "rgmii-id"; 217*724ba675SRob Herring phy-reset-gpios = <&gpio7 15 GPIO_ACTIVE_LOW>; 218*724ba675SRob Herring phy-reset-duration = <1>; 219*724ba675SRob Herring phy-supply = <®_fec1_pwdn>; 220*724ba675SRob Herring phy-handle = <ðphy1_0>; 221*724ba675SRob Herring fsl,magic-packet; 222*724ba675SRob Herring status = "okay"; 223*724ba675SRob Herring 224*724ba675SRob Herring mdio { 225*724ba675SRob Herring #address-cells = <1>; 226*724ba675SRob Herring #size-cells = <0>; 227*724ba675SRob Herring 228*724ba675SRob Herring ethphy1_0: ethernet-phy@0 { 229*724ba675SRob Herring compatible = "ethernet-phy-ieee802.3-c22"; 230*724ba675SRob Herring reg = <0>; 231*724ba675SRob Herring ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_50_NS>; 232*724ba675SRob Herring ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_50_NS>; 233*724ba675SRob Herring ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; 234*724ba675SRob Herring ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>; 235*724ba675SRob Herring }; 236*724ba675SRob Herring }; 237*724ba675SRob Herring}; 238*724ba675SRob Herring 239*724ba675SRob Herring&flash0 { 240*724ba675SRob Herring partitions { 241*724ba675SRob Herring compatible = "fixed-partitions"; 242*724ba675SRob Herring #address-cells = <1>; 243*724ba675SRob Herring #size-cells = <1>; 244*724ba675SRob Herring 245*724ba675SRob Herring uboot@0 { 246*724ba675SRob Herring label = "U-Boot"; 247*724ba675SRob Herring reg = <0x0 0xd0000>; 248*724ba675SRob Herring }; 249*724ba675SRob Herring 250*724ba675SRob Herring env1@d0000 { 251*724ba675SRob Herring label = "ENV1"; 252*724ba675SRob Herring reg = <0xd0000 0x10000>; 253*724ba675SRob Herring }; 254*724ba675SRob Herring 255*724ba675SRob Herring env2@e0000 { 256*724ba675SRob Herring label = "ENV2"; 257*724ba675SRob Herring reg = <0xe0000 0x10000>; 258*724ba675SRob Herring }; 259*724ba675SRob Herring 260*724ba675SRob Herring dtb@f0000 { 261*724ba675SRob Herring label = "DTB"; 262*724ba675SRob Herring reg = <0xf0000 0x10000>; 263*724ba675SRob Herring }; 264*724ba675SRob Herring 265*724ba675SRob Herring linux@100000 { 266*724ba675SRob Herring label = "Linux"; 267*724ba675SRob Herring reg = <0x100000 0x700000>; 268*724ba675SRob Herring }; 269*724ba675SRob Herring 270*724ba675SRob Herring rootfs@800000 { 271*724ba675SRob Herring label = "RootFS"; 272*724ba675SRob Herring reg = <0x800000 0x3800000>; 273*724ba675SRob Herring }; 274*724ba675SRob Herring }; 275*724ba675SRob Herring}; 276*724ba675SRob Herring 277*724ba675SRob Herring&flexcan1 { 278*724ba675SRob Herring pinctrl-names = "default"; 279*724ba675SRob Herring pinctrl-0 = <&pinctrl_flexcan1>; 280*724ba675SRob Herring status = "okay"; 281*724ba675SRob Herring}; 282*724ba675SRob Herring 283*724ba675SRob Herring&flexcan2 { 284*724ba675SRob Herring pinctrl-names = "default"; 285*724ba675SRob Herring pinctrl-0 = <&pinctrl_flexcan2>; 286*724ba675SRob Herring status = "okay"; 287*724ba675SRob Herring}; 288*724ba675SRob Herring 289*724ba675SRob Herring&i2c1 { 290*724ba675SRob Herring lm75: temperature-sensor@49 { 291*724ba675SRob Herring compatible = "national,lm75"; 292*724ba675SRob Herring reg = <0x49>; 293*724ba675SRob Herring }; 294*724ba675SRob Herring}; 295*724ba675SRob Herring 296*724ba675SRob Herring&i2c2 { 297*724ba675SRob Herring clock-frequency = <100000>; 298*724ba675SRob Herring pinctrl-names = "default"; 299*724ba675SRob Herring pinctrl-0 = <&pinctrl_i2c2>; 300*724ba675SRob Herring status = "okay"; 301*724ba675SRob Herring 302*724ba675SRob Herring tlv320aic32x4: audio-codec@18 { 303*724ba675SRob Herring compatible = "ti,tlv320aic32x4"; 304*724ba675SRob Herring reg = <0x18>; 305*724ba675SRob Herring clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_DIV>; 306*724ba675SRob Herring clock-names = "mclk"; 307*724ba675SRob Herring ldoin-supply = <®_audio_3v3>; 308*724ba675SRob Herring iov-supply = <®_audio_3v3>; 309*724ba675SRob Herring }; 310*724ba675SRob Herring 311*724ba675SRob Herring pca9555: gpio-expander@20 { 312*724ba675SRob Herring compatible = "nxp,pca9555"; 313*724ba675SRob Herring reg = <0x20>; 314*724ba675SRob Herring pinctrl-names = "default"; 315*724ba675SRob Herring pinctrl-0 = <&pinctrl_pca9555>; 316*724ba675SRob Herring gpio-controller; 317*724ba675SRob Herring #gpio-cells = <2>; 318*724ba675SRob Herring interrupt-parent = <&gpio7>; 319*724ba675SRob Herring interrupts = <12 IRQ_TYPE_EDGE_FALLING>; 320*724ba675SRob Herring interrupt-controller; 321*724ba675SRob Herring #interrupt-cells = <2>; 322*724ba675SRob Herring }; 323*724ba675SRob Herring}; 324*724ba675SRob Herring 325*724ba675SRob Herring&i2c3 { 326*724ba675SRob Herring clock-frequency = <100000>; 327*724ba675SRob Herring pinctrl-names = "default"; 328*724ba675SRob Herring pinctrl-0 = <&pinctrl_i2c3>; 329*724ba675SRob Herring status = "okay"; 330*724ba675SRob Herring}; 331*724ba675SRob Herring 332*724ba675SRob Herring&iomuxc { 333*724ba675SRob Herring pinctrl-names = "default"; 334*724ba675SRob Herring pinctrl-0 = <&pinctrl_hog_mba7_1>; 335*724ba675SRob Herring 336*724ba675SRob Herring pinctrl_ecspi1: ecspi1grp { 337*724ba675SRob Herring fsl,pins = < 338*724ba675SRob Herring MX7D_PAD_ECSPI1_MISO__ECSPI1_MISO 0x7c 339*724ba675SRob Herring MX7D_PAD_ECSPI1_MOSI__ECSPI1_MOSI 0x74 340*724ba675SRob Herring MX7D_PAD_ECSPI1_SCLK__ECSPI1_SCLK 0x74 341*724ba675SRob Herring MX7D_PAD_UART1_RX_DATA__GPIO4_IO0 0x74 342*724ba675SRob Herring MX7D_PAD_UART1_TX_DATA__GPIO4_IO1 0x74 343*724ba675SRob Herring MX7D_PAD_UART2_RX_DATA__GPIO4_IO2 0x74 344*724ba675SRob Herring >; 345*724ba675SRob Herring }; 346*724ba675SRob Herring 347*724ba675SRob Herring pinctrl_ecspi2: ecspi2grp { 348*724ba675SRob Herring fsl,pins = < 349*724ba675SRob Herring MX7D_PAD_ECSPI2_MISO__ECSPI2_MISO 0x7c 350*724ba675SRob Herring MX7D_PAD_ECSPI2_MOSI__ECSPI2_MOSI 0x74 351*724ba675SRob Herring MX7D_PAD_ECSPI2_SCLK__ECSPI2_SCLK 0x74 352*724ba675SRob Herring MX7D_PAD_ECSPI2_SS0__ECSPI2_SS0 0x74 353*724ba675SRob Herring >; 354*724ba675SRob Herring }; 355*724ba675SRob Herring 356*724ba675SRob Herring pinctrl_enet1: enet1grp { 357*724ba675SRob Herring fsl,pins = < 358*724ba675SRob Herring MX7D_PAD_GPIO1_IO10__ENET1_MDIO 0x02 359*724ba675SRob Herring MX7D_PAD_GPIO1_IO11__ENET1_MDC 0x00 360*724ba675SRob Herring MX7D_PAD_ENET1_RGMII_TXC__ENET1_RGMII_TXC 0x71 361*724ba675SRob Herring MX7D_PAD_ENET1_RGMII_TD0__ENET1_RGMII_TD0 0x71 362*724ba675SRob Herring MX7D_PAD_ENET1_RGMII_TD1__ENET1_RGMII_TD1 0x71 363*724ba675SRob Herring MX7D_PAD_ENET1_RGMII_TD2__ENET1_RGMII_TD2 0x71 364*724ba675SRob Herring MX7D_PAD_ENET1_RGMII_TD3__ENET1_RGMII_TD3 0x71 365*724ba675SRob Herring MX7D_PAD_ENET1_RGMII_TX_CTL__ENET1_RGMII_TX_CTL 0x71 366*724ba675SRob Herring MX7D_PAD_ENET1_RGMII_RXC__ENET1_RGMII_RXC 0x79 367*724ba675SRob Herring MX7D_PAD_ENET1_RGMII_RD0__ENET1_RGMII_RD0 0x79 368*724ba675SRob Herring MX7D_PAD_ENET1_RGMII_RD1__ENET1_RGMII_RD1 0x79 369*724ba675SRob Herring MX7D_PAD_ENET1_RGMII_RD2__ENET1_RGMII_RD2 0x79 370*724ba675SRob Herring MX7D_PAD_ENET1_RGMII_RD3__ENET1_RGMII_RD3 0x79 371*724ba675SRob Herring MX7D_PAD_ENET1_RGMII_RX_CTL__ENET1_RGMII_RX_CTL 0x79 372*724ba675SRob Herring /* Reset: SION, 100kPU, SRE_FAST, DSE_X1 */ 373*724ba675SRob Herring MX7D_PAD_ENET1_COL__GPIO7_IO15 0x40000070 374*724ba675SRob Herring /* INT/PWDN: SION, 100kPU, HYS, SRE_FAST, DSE_X1 */ 375*724ba675SRob Herring MX7D_PAD_GPIO1_IO09__GPIO1_IO9 0x40000078 376*724ba675SRob Herring >; 377*724ba675SRob Herring }; 378*724ba675SRob Herring 379*724ba675SRob Herring pinctrl_flexcan1: flexcan1grp { 380*724ba675SRob Herring fsl,pins = < 381*724ba675SRob Herring MX7D_PAD_GPIO1_IO12__FLEXCAN1_RX 0x5a 382*724ba675SRob Herring MX7D_PAD_GPIO1_IO13__FLEXCAN1_TX 0x52 383*724ba675SRob Herring >; 384*724ba675SRob Herring }; 385*724ba675SRob Herring 386*724ba675SRob Herring pinctrl_flexcan2: flexcan2grp { 387*724ba675SRob Herring fsl,pins = < 388*724ba675SRob Herring MX7D_PAD_GPIO1_IO14__FLEXCAN2_RX 0x5a 389*724ba675SRob Herring MX7D_PAD_GPIO1_IO15__FLEXCAN2_TX 0x52 390*724ba675SRob Herring >; 391*724ba675SRob Herring }; 392*724ba675SRob Herring 393*724ba675SRob Herring pinctrl_hog_mba7_1: hogmba71grp { 394*724ba675SRob Herring fsl,pins = < 395*724ba675SRob Herring /* Limitation: WDOG2_B / WDOG2_RESET not usable */ 396*724ba675SRob Herring MX7D_PAD_ENET1_RX_CLK__GPIO7_IO13 0x4000007c 397*724ba675SRob Herring MX7D_PAD_ENET1_CRS__GPIO7_IO14 0x40000074 398*724ba675SRob Herring /* #BOOT_EN */ 399*724ba675SRob Herring MX7D_PAD_UART2_TX_DATA__GPIO4_IO3 0x40000010 400*724ba675SRob Herring >; 401*724ba675SRob Herring }; 402*724ba675SRob Herring 403*724ba675SRob Herring pinctrl_i2c2: i2c2grp { 404*724ba675SRob Herring fsl,pins = < 405*724ba675SRob Herring MX7D_PAD_I2C2_SCL__I2C2_SCL 0x40000078 406*724ba675SRob Herring MX7D_PAD_I2C2_SDA__I2C2_SDA 0x40000078 407*724ba675SRob Herring >; 408*724ba675SRob Herring }; 409*724ba675SRob Herring 410*724ba675SRob Herring pinctrl_i2c3: i2c3grp { 411*724ba675SRob Herring fsl,pins = < 412*724ba675SRob Herring MX7D_PAD_I2C3_SCL__I2C3_SCL 0x40000078 413*724ba675SRob Herring MX7D_PAD_I2C3_SDA__I2C3_SDA 0x40000078 414*724ba675SRob Herring >; 415*724ba675SRob Herring }; 416*724ba675SRob Herring 417*724ba675SRob Herring pinctrl_pca9555: pca95550grp { 418*724ba675SRob Herring fsl,pins = < 419*724ba675SRob Herring MX7D_PAD_ENET1_TX_CLK__GPIO7_IO12 0x78 420*724ba675SRob Herring >; 421*724ba675SRob Herring }; 422*724ba675SRob Herring 423*724ba675SRob Herring pinctrl_sai1: sai1grp { 424*724ba675SRob Herring fsl,pins = < 425*724ba675SRob Herring MX7D_PAD_SAI1_MCLK__SAI1_MCLK 0x11 426*724ba675SRob Herring MX7D_PAD_SAI1_RX_BCLK__SAI1_RX_BCLK 0x1c 427*724ba675SRob Herring MX7D_PAD_SAI1_RX_DATA__SAI1_RX_DATA0 0x1c 428*724ba675SRob Herring MX7D_PAD_SAI1_RX_SYNC__SAI2_RX_SYNC 0x1c 429*724ba675SRob Herring 430*724ba675SRob Herring MX7D_PAD_SAI1_TX_BCLK__SAI1_TX_BCLK 0x1c 431*724ba675SRob Herring MX7D_PAD_SAI1_TX_DATA__SAI1_TX_DATA0 0x14 432*724ba675SRob Herring MX7D_PAD_SAI1_TX_SYNC__SAI1_TX_SYNC 0x14 433*724ba675SRob Herring >; 434*724ba675SRob Herring }; 435*724ba675SRob Herring 436*724ba675SRob Herring pinctrl_uart3: uart3grp { 437*724ba675SRob Herring fsl,pins = < 438*724ba675SRob Herring MX7D_PAD_UART3_RX_DATA__UART3_DCE_RX 0x7e 439*724ba675SRob Herring MX7D_PAD_UART3_TX_DATA__UART3_DCE_TX 0x76 440*724ba675SRob Herring MX7D_PAD_UART3_CTS_B__UART3_DCE_CTS 0x76 441*724ba675SRob Herring MX7D_PAD_UART3_RTS_B__UART3_DCE_RTS 0x7e 442*724ba675SRob Herring >; 443*724ba675SRob Herring }; 444*724ba675SRob Herring 445*724ba675SRob Herring pinctrl_uart4: uart4grp { 446*724ba675SRob Herring fsl,pins = < 447*724ba675SRob Herring MX7D_PAD_SAI2_TX_SYNC__UART4_DCE_RX 0x7e 448*724ba675SRob Herring MX7D_PAD_SAI2_TX_BCLK__UART4_DCE_TX 0x76 449*724ba675SRob Herring MX7D_PAD_SAI2_RX_DATA__UART4_DCE_CTS 0x76 450*724ba675SRob Herring MX7D_PAD_SAI2_TX_DATA__UART4_DCE_RTS 0x7e 451*724ba675SRob Herring >; 452*724ba675SRob Herring }; 453*724ba675SRob Herring 454*724ba675SRob Herring pinctrl_uart5: uart5grp { 455*724ba675SRob Herring fsl,pins = < 456*724ba675SRob Herring MX7D_PAD_I2C4_SCL__UART5_DCE_RX 0x7e 457*724ba675SRob Herring MX7D_PAD_I2C4_SDA__UART5_DCE_TX 0x76 458*724ba675SRob Herring >; 459*724ba675SRob Herring }; 460*724ba675SRob Herring 461*724ba675SRob Herring pinctrl_uart6: uart6grp { 462*724ba675SRob Herring fsl,pins = < 463*724ba675SRob Herring MX7D_PAD_EPDC_DATA08__UART6_DCE_RX 0x7d 464*724ba675SRob Herring MX7D_PAD_EPDC_DATA09__UART6_DCE_TX 0x75 465*724ba675SRob Herring MX7D_PAD_EPDC_DATA11__UART6_DCE_CTS 0x75 466*724ba675SRob Herring MX7D_PAD_EPDC_DATA10__UART6_DCE_RTS 0x7d 467*724ba675SRob Herring >; 468*724ba675SRob Herring }; 469*724ba675SRob Herring 470*724ba675SRob Herring pinctrl_uart7: uart7grp { 471*724ba675SRob Herring fsl,pins = < 472*724ba675SRob Herring MX7D_PAD_EPDC_DATA12__UART7_DCE_RX 0x7e 473*724ba675SRob Herring MX7D_PAD_EPDC_DATA13__UART7_DCE_TX 0x76 474*724ba675SRob Herring MX7D_PAD_EPDC_DATA15__UART7_DCE_CTS 0x76 475*724ba675SRob Herring /* Limitation: RTS is not connected */ 476*724ba675SRob Herring MX7D_PAD_EPDC_DATA14__UART7_DCE_RTS 0x7e 477*724ba675SRob Herring >; 478*724ba675SRob Herring }; 479*724ba675SRob Herring 480*724ba675SRob Herring pinctrl_usdhc1_gpio: usdhc1grp_gpio { 481*724ba675SRob Herring fsl,pins = < 482*724ba675SRob Herring /* WP */ 483*724ba675SRob Herring MX7D_PAD_SD1_WP__GPIO5_IO1 0x7c 484*724ba675SRob Herring /* CD */ 485*724ba675SRob Herring MX7D_PAD_SD1_CD_B__GPIO5_IO0 0x7c 486*724ba675SRob Herring /* VSELECT */ 487*724ba675SRob Herring MX7D_PAD_GPIO1_IO08__SD1_VSELECT 0x59 488*724ba675SRob Herring >; 489*724ba675SRob Herring }; 490*724ba675SRob Herring 491*724ba675SRob Herring pinctrl_usdhc1: usdhc1grp { 492*724ba675SRob Herring fsl,pins = < 493*724ba675SRob Herring MX7D_PAD_SD1_CMD__SD1_CMD 0x5e 494*724ba675SRob Herring MX7D_PAD_SD1_CLK__SD1_CLK 0x57 495*724ba675SRob Herring MX7D_PAD_SD1_DATA0__SD1_DATA0 0x5e 496*724ba675SRob Herring MX7D_PAD_SD1_DATA1__SD1_DATA1 0x5e 497*724ba675SRob Herring MX7D_PAD_SD1_DATA2__SD1_DATA2 0x5e 498*724ba675SRob Herring MX7D_PAD_SD1_DATA3__SD1_DATA3 0x5e 499*724ba675SRob Herring >; 500*724ba675SRob Herring }; 501*724ba675SRob Herring 502*724ba675SRob Herring pinctrl_usdhc1_100mhz: usdhc1grp_100mhz { 503*724ba675SRob Herring fsl,pins = < 504*724ba675SRob Herring MX7D_PAD_SD1_CMD__SD1_CMD 0x5a 505*724ba675SRob Herring MX7D_PAD_SD1_CLK__SD1_CLK 0x57 506*724ba675SRob Herring MX7D_PAD_SD1_DATA0__SD1_DATA0 0x5a 507*724ba675SRob Herring MX7D_PAD_SD1_DATA1__SD1_DATA1 0x5a 508*724ba675SRob Herring MX7D_PAD_SD1_DATA2__SD1_DATA2 0x5a 509*724ba675SRob Herring MX7D_PAD_SD1_DATA3__SD1_DATA3 0x5a 510*724ba675SRob Herring >; 511*724ba675SRob Herring }; 512*724ba675SRob Herring 513*724ba675SRob Herring pinctrl_usdhc1_200mhz: usdhc1grp_200mhz { 514*724ba675SRob Herring fsl,pins = < 515*724ba675SRob Herring MX7D_PAD_SD1_CMD__SD1_CMD 0x5b 516*724ba675SRob Herring MX7D_PAD_SD1_CLK__SD1_CLK 0x57 517*724ba675SRob Herring MX7D_PAD_SD1_DATA0__SD1_DATA0 0x5b 518*724ba675SRob Herring MX7D_PAD_SD1_DATA1__SD1_DATA1 0x5b 519*724ba675SRob Herring MX7D_PAD_SD1_DATA2__SD1_DATA2 0x5b 520*724ba675SRob Herring MX7D_PAD_SD1_DATA3__SD1_DATA3 0x5b 521*724ba675SRob Herring >; 522*724ba675SRob Herring }; 523*724ba675SRob Herring}; 524*724ba675SRob Herring 525*724ba675SRob Herring&iomuxc_lpsr { 526*724ba675SRob Herring pinctrl_pwm1: pwm1grp { 527*724ba675SRob Herring fsl,pins = < 528*724ba675SRob Herring /* LCD_CONTRAST */ 529*724ba675SRob Herring MX7D_PAD_LPSR_GPIO1_IO01__PWM1_OUT 0x50 530*724ba675SRob Herring >; 531*724ba675SRob Herring }; 532*724ba675SRob Herring 533*724ba675SRob Herring pinctrl_usbotg1: usbotg1grp { 534*724ba675SRob Herring fsl,pins = < 535*724ba675SRob Herring MX7D_PAD_LPSR_GPIO1_IO04__USB_OTG1_OC 0x5c 536*724ba675SRob Herring MX7D_PAD_LPSR_GPIO1_IO05__GPIO1_IO5 0x59 537*724ba675SRob Herring >; 538*724ba675SRob Herring }; 539*724ba675SRob Herring 540*724ba675SRob Herring pinctrl_wdog1: wdog1grp { 541*724ba675SRob Herring fsl,pins = < 542*724ba675SRob Herring MX7D_PAD_LPSR_GPIO1_IO00__WDOG1_WDOG_B 0x30 543*724ba675SRob Herring >; 544*724ba675SRob Herring }; 545*724ba675SRob Herring}; 546*724ba675SRob Herring 547*724ba675SRob Herring&pwm1 { 548*724ba675SRob Herring pinctrl-names = "default"; 549*724ba675SRob Herring pinctrl-0 = <&pinctrl_pwm1>; 550*724ba675SRob Herring status = "okay"; 551*724ba675SRob Herring}; 552*724ba675SRob Herring 553*724ba675SRob Herring&sai1 { 554*724ba675SRob Herring pinctrl-names = "default"; 555*724ba675SRob Herring pinctrl-0 = <&pinctrl_sai1>; 556*724ba675SRob Herring assigned-clocks = <&clks IMX7D_SAI1_ROOT_SRC>, 557*724ba675SRob Herring <&clks IMX7D_SAI1_ROOT_CLK>; 558*724ba675SRob Herring assigned-clock-parents = <&clks IMX7D_PLL_AUDIO_POST_DIV>; 559*724ba675SRob Herring assigned-clock-rates = <0>, <36864000>; 560*724ba675SRob Herring status = "okay"; 561*724ba675SRob Herring}; 562*724ba675SRob Herring 563*724ba675SRob Herring&uart3 { 564*724ba675SRob Herring pinctrl-names = "default"; 565*724ba675SRob Herring pinctrl-0 = <&pinctrl_uart3>; 566*724ba675SRob Herring assigned-clocks = <&clks IMX7D_UART3_ROOT_SRC>; 567*724ba675SRob Herring assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>; 568*724ba675SRob Herring status = "okay"; 569*724ba675SRob Herring}; 570*724ba675SRob Herring 571*724ba675SRob Herring&uart4 { 572*724ba675SRob Herring pinctrl-names = "default"; 573*724ba675SRob Herring pinctrl-0 = <&pinctrl_uart4>; 574*724ba675SRob Herring assigned-clocks = <&clks IMX7D_UART4_ROOT_SRC>; 575*724ba675SRob Herring assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>; 576*724ba675SRob Herring status = "okay"; 577*724ba675SRob Herring}; 578*724ba675SRob Herring 579*724ba675SRob Herring&uart5 { 580*724ba675SRob Herring pinctrl-names = "default"; 581*724ba675SRob Herring pinctrl-0 = <&pinctrl_uart5>; 582*724ba675SRob Herring assigned-clocks = <&clks IMX7D_UART5_ROOT_SRC>; 583*724ba675SRob Herring assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>; 584*724ba675SRob Herring status = "okay"; 585*724ba675SRob Herring}; 586*724ba675SRob Herring 587*724ba675SRob Herring&uart6 { 588*724ba675SRob Herring pinctrl-names = "default"; 589*724ba675SRob Herring pinctrl-0 = <&pinctrl_uart6>; 590*724ba675SRob Herring assigned-clocks = <&clks IMX7D_UART6_ROOT_SRC>; 591*724ba675SRob Herring assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>; 592*724ba675SRob Herring status = "okay"; 593*724ba675SRob Herring}; 594*724ba675SRob Herring 595*724ba675SRob Herring&uart7 { 596*724ba675SRob Herring pinctrl-names = "default"; 597*724ba675SRob Herring pinctrl-0 = <&pinctrl_uart7>; 598*724ba675SRob Herring assigned-clocks = <&clks IMX7D_UART7_ROOT_SRC>; 599*724ba675SRob Herring assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>; 600*724ba675SRob Herring uart-has-rtscts; 601*724ba675SRob Herring linux,rs485-enabled-at-boot-time; 602*724ba675SRob Herring rs485-rts-active-low; 603*724ba675SRob Herring rs485-rx-during-tx; 604*724ba675SRob Herring status = "okay"; 605*724ba675SRob Herring}; 606*724ba675SRob Herring 607*724ba675SRob Herring&usbh { 608*724ba675SRob Herring status = "okay"; 609*724ba675SRob Herring}; 610*724ba675SRob Herring 611*724ba675SRob Herring&usbotg1 { 612*724ba675SRob Herring pinctrl-names = "default"; 613*724ba675SRob Herring pinctrl-0 = <&pinctrl_usbotg1>; 614*724ba675SRob Herring vbus-supply = <®_usb_otg1_vbus>; 615*724ba675SRob Herring srp-disable; 616*724ba675SRob Herring hnp-disable; 617*724ba675SRob Herring adp-disable; 618*724ba675SRob Herring over-current-active-low; 619*724ba675SRob Herring dr_mode = "otg"; 620*724ba675SRob Herring status = "okay"; 621*724ba675SRob Herring}; 622*724ba675SRob Herring 623*724ba675SRob Herring&usdhc1 { 624*724ba675SRob Herring pinctrl-names = "default", "state_100mhz", "state_200mhz"; 625*724ba675SRob Herring pinctrl-0 = <&pinctrl_usdhc1>, <&pinctrl_usdhc1_gpio>; 626*724ba675SRob Herring pinctrl-1 = <&pinctrl_usdhc1_100mhz>, <&pinctrl_usdhc1_gpio>; 627*724ba675SRob Herring pinctrl-2 = <&pinctrl_usdhc1_200mhz>, <&pinctrl_usdhc1_gpio>; 628*724ba675SRob Herring cd-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>; 629*724ba675SRob Herring wp-gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>; 630*724ba675SRob Herring vmmc-supply = <®_sd1_vmmc>; 631*724ba675SRob Herring bus-width = <4>; 632*724ba675SRob Herring no-1-8-v; 633*724ba675SRob Herring status = "okay"; 634*724ba675SRob Herring}; 635*724ba675SRob Herring 636*724ba675SRob Herring&wdog1 { 637*724ba675SRob Herring pinctrl-names = "default"; 638*724ba675SRob Herring pinctrl-0 = <&pinctrl_wdog1>; 639*724ba675SRob Herring fsl,ext-reset-output; 640*724ba675SRob Herring}; 641