xref: /linux/arch/arm/boot/dts/nxp/imx/imx6ull-engicam-microgea-bmm.dts (revision 115e74a29b530d121891238e9551c4bcdf7b04b5)
1*02e0babfSDario Binacchi// SPDX-License-Identifier: GPL-2.0
2*02e0babfSDario Binacchi/*
3*02e0babfSDario Binacchi * Copyright (C) 2025 Amarula Solutions, Dario Binacchi <dario.binacchi@amarulasolutions.com>
4*02e0babfSDario Binacchi * Copyright (C) 2025 Engicam srl
5*02e0babfSDario Binacchi */
6*02e0babfSDario Binacchi
7*02e0babfSDario Binacchi/dts-v1/;
8*02e0babfSDario Binacchi
9*02e0babfSDario Binacchi#include "imx6ull-engicam-microgea.dtsi"
10*02e0babfSDario Binacchi
11*02e0babfSDario Binacchi/ {
12*02e0babfSDario Binacchi	compatible = "engicam,microgea-imx6ull-bmm",
13*02e0babfSDario Binacchi		     "engicam,microgea-imx6ull", "fsl,imx6ull";
14*02e0babfSDario Binacchi	model = "Engicam MicroGEA i.MX6ULL BMM Board";
15*02e0babfSDario Binacchi
16*02e0babfSDario Binacchi	backlight {
17*02e0babfSDario Binacchi		compatible = "pwm-backlight";
18*02e0babfSDario Binacchi		brightness-levels = <0 100>;
19*02e0babfSDario Binacchi		num-interpolated-steps = <100>;
20*02e0babfSDario Binacchi		default-brightness-level = <85>;
21*02e0babfSDario Binacchi		pwms = <&pwm8 0 100000 0>;
22*02e0babfSDario Binacchi	};
23*02e0babfSDario Binacchi
24*02e0babfSDario Binacchi	buzzer {
25*02e0babfSDario Binacchi		compatible = "pwm-beeper";
26*02e0babfSDario Binacchi		pwms = <&pwm4 0 1000000 0>;
27*02e0babfSDario Binacchi	};
28*02e0babfSDario Binacchi
29*02e0babfSDario Binacchi	reg_1v8: regulator-1v8 {
30*02e0babfSDario Binacchi		compatible = "regulator-fixed";
31*02e0babfSDario Binacchi		regulator-name = "1v8";
32*02e0babfSDario Binacchi		regulator-min-microvolt = <1800000>;
33*02e0babfSDario Binacchi		regulator-max-microvolt = <1800000>;
34*02e0babfSDario Binacchi	};
35*02e0babfSDario Binacchi
36*02e0babfSDario Binacchi	reg_3v3: regulator-3v3 {
37*02e0babfSDario Binacchi		compatible = "regulator-fixed";
38*02e0babfSDario Binacchi		regulator-name = "3v3";
39*02e0babfSDario Binacchi		regulator-min-microvolt = <3300000>;
40*02e0babfSDario Binacchi		regulator-max-microvolt = <3300000>;
41*02e0babfSDario Binacchi	};
42*02e0babfSDario Binacchi
43*02e0babfSDario Binacchi	reg_usb1_vbus: regulator-usb1-vbus {
44*02e0babfSDario Binacchi		compatible = "regulator-fixed";
45*02e0babfSDario Binacchi		pinctrl-names = "default";
46*02e0babfSDario Binacchi		pinctrl-0 = <&pinctrl_reg_usb1>;
47*02e0babfSDario Binacchi		regulator-name = "usb1_vbus";
48*02e0babfSDario Binacchi		regulator-min-microvolt = <5000000>;
49*02e0babfSDario Binacchi		regulator-max-microvolt = <5000000>;
50*02e0babfSDario Binacchi		gpio = <&gpio5 0 GPIO_ACTIVE_HIGH>;
51*02e0babfSDario Binacchi		enable-active-high;
52*02e0babfSDario Binacchi	};
53*02e0babfSDario Binacchi
54*02e0babfSDario Binacchi	reg_usb2_vbus: regulator-usb2-vbus {
55*02e0babfSDario Binacchi		compatible = "regulator-fixed";
56*02e0babfSDario Binacchi		pinctrl-names = "default";
57*02e0babfSDario Binacchi		pinctrl-0 = <&pinctrl_reg_usb2>;
58*02e0babfSDario Binacchi		regulator-name = "usbotg_vbus";
59*02e0babfSDario Binacchi		regulator-min-microvolt = <5000000>;
60*02e0babfSDario Binacchi		regulator-max-microvolt = <5000000>;
61*02e0babfSDario Binacchi		gpio = <&gpio5 3 GPIO_ACTIVE_HIGH>;
62*02e0babfSDario Binacchi		enable-active-high;
63*02e0babfSDario Binacchi	};
64*02e0babfSDario Binacchi
65*02e0babfSDario Binacchi	reg_ext_pwr: regulator-ext-pwr {
66*02e0babfSDario Binacchi		compatible = "regulator-fixed";
67*02e0babfSDario Binacchi		pinctrl-names = "default";
68*02e0babfSDario Binacchi		pinctrl-0 = <&pinctrl_reg_ext_pwr>;
69*02e0babfSDario Binacchi		regulator-name = "ext-pwr";
70*02e0babfSDario Binacchi		regulator-min-microvolt = <5000000>;
71*02e0babfSDario Binacchi		regulator-max-microvolt = <5000000>;
72*02e0babfSDario Binacchi		gpio = <&gpio5 6 GPIO_ACTIVE_HIGH>;
73*02e0babfSDario Binacchi		enable-active-high;
74*02e0babfSDario Binacchi		regulator-always-on;
75*02e0babfSDario Binacchi	};
76*02e0babfSDario Binacchi
77*02e0babfSDario Binacchi	sound {
78*02e0babfSDario Binacchi		compatible = "simple-audio-card";
79*02e0babfSDario Binacchi		simple-audio-card,name = "imx6ull-microgea-bmm-sgtl5000";
80*02e0babfSDario Binacchi		simple-audio-card,format = "i2s";
81*02e0babfSDario Binacchi		simple-audio-card,bitclock-master = <&codec_dai>;
82*02e0babfSDario Binacchi		simple-audio-card,frame-master = <&codec_dai>;
83*02e0babfSDario Binacchi		simple-audio-card,widgets =
84*02e0babfSDario Binacchi			"Microphone", "Mic Jack",
85*02e0babfSDario Binacchi			"Headphone", "Headphone Jack";
86*02e0babfSDario Binacchi		simple-audio-card,routing =
87*02e0babfSDario Binacchi			"MIC_IN", "Mic Jack",
88*02e0babfSDario Binacchi			"Mic Jack", "Mic Bias",
89*02e0babfSDario Binacchi			"Headphone Jack", "HP_OUT";
90*02e0babfSDario Binacchi
91*02e0babfSDario Binacchi		cpu_dai: simple-audio-card,cpu {
92*02e0babfSDario Binacchi			sound-dai = <&sai2>;
93*02e0babfSDario Binacchi		};
94*02e0babfSDario Binacchi
95*02e0babfSDario Binacchi		codec_dai: simple-audio-card,codec {
96*02e0babfSDario Binacchi			sound-dai = <&codec>;
97*02e0babfSDario Binacchi		};
98*02e0babfSDario Binacchi	};
99*02e0babfSDario Binacchi};
100*02e0babfSDario Binacchi
101*02e0babfSDario Binacchi&can1 {
102*02e0babfSDario Binacchi	pinctrl-names = "default";
103*02e0babfSDario Binacchi	pinctrl-0 = <&pinctrl_can>;
104*02e0babfSDario Binacchi	status = "okay";
105*02e0babfSDario Binacchi};
106*02e0babfSDario Binacchi
107*02e0babfSDario Binacchi&i2c2 {
108*02e0babfSDario Binacchi	pinctrl-names = "default";
109*02e0babfSDario Binacchi	pinctrl-0 = <&pinctrl_i2c2>;
110*02e0babfSDario Binacchi	clock-frequency = <100000>;
111*02e0babfSDario Binacchi	status = "okay";
112*02e0babfSDario Binacchi
113*02e0babfSDario Binacchi	codec: audio-codec@a {
114*02e0babfSDario Binacchi		compatible = "fsl,sgtl5000";
115*02e0babfSDario Binacchi		reg = <0x0a>;
116*02e0babfSDario Binacchi		pinctrl-names = "default";
117*02e0babfSDario Binacchi		pinctrl-0 = <&pinctrl_mclk>;
118*02e0babfSDario Binacchi		#sound-dai-cells = <0>;
119*02e0babfSDario Binacchi		clocks = <&clks IMX6UL_CLK_CKO>;
120*02e0babfSDario Binacchi		assigned-clocks = <&clks IMX6UL_CLK_CKO2_SEL>,
121*02e0babfSDario Binacchi				  <&clks IMX6UL_CLK_CKO2_PODF>,
122*02e0babfSDario Binacchi				  <&clks IMX6UL_CLK_CKO2>,
123*02e0babfSDario Binacchi				  <&clks IMX6UL_CLK_CKO>;
124*02e0babfSDario Binacchi		assigned-clock-parents = <&clks IMX6UL_CLK_OSC>,
125*02e0babfSDario Binacchi					 <&clks IMX6UL_CLK_CKO2_SEL>,
126*02e0babfSDario Binacchi					 <&clks IMX6UL_CLK_CKO2_PODF>,
127*02e0babfSDario Binacchi					 <&clks IMX6UL_CLK_CKO2>;
128*02e0babfSDario Binacchi		VDDA-supply = <&reg_3v3>;
129*02e0babfSDario Binacchi		VDDIO-supply = <&reg_3v3>;
130*02e0babfSDario Binacchi		VDDD-supply = <&reg_1v8>;
131*02e0babfSDario Binacchi	};
132*02e0babfSDario Binacchi};
133*02e0babfSDario Binacchi
134*02e0babfSDario Binacchi&pwm4 {
135*02e0babfSDario Binacchi	pinctrl-names = "default";
136*02e0babfSDario Binacchi	pinctrl-0 = <&pinctrl_pwm4>;
137*02e0babfSDario Binacchi	status = "okay";
138*02e0babfSDario Binacchi};
139*02e0babfSDario Binacchi
140*02e0babfSDario Binacchi&pwm8 {
141*02e0babfSDario Binacchi	pinctrl-names = "default";
142*02e0babfSDario Binacchi	pinctrl-0 = <&pinctrl_pwm8>;
143*02e0babfSDario Binacchi	status = "okay";
144*02e0babfSDario Binacchi};
145*02e0babfSDario Binacchi
146*02e0babfSDario Binacchi&sai2 {
147*02e0babfSDario Binacchi	pinctrl-names = "default";
148*02e0babfSDario Binacchi	pinctrl-0 = <&pinctrl_sai2>;
149*02e0babfSDario Binacchi	status = "okay";
150*02e0babfSDario Binacchi};
151*02e0babfSDario Binacchi
152*02e0babfSDario Binacchi&tsc {
153*02e0babfSDario Binacchi	pinctrl-names = "default";
154*02e0babfSDario Binacchi	pinctrl-0 = <&pinctrl_tsc>;
155*02e0babfSDario Binacchi	measure-delay-time = <0x9ffff>;
156*02e0babfSDario Binacchi	pre-charge-time = <0xfff>;
157*02e0babfSDario Binacchi	xnur-gpios = <&gpio1 3 GPIO_ACTIVE_LOW>;
158*02e0babfSDario Binacchi	status = "okay";
159*02e0babfSDario Binacchi};
160*02e0babfSDario Binacchi
161*02e0babfSDario Binacchi&uart1 {
162*02e0babfSDario Binacchi	pinctrl-names = "default";
163*02e0babfSDario Binacchi	pinctrl-0 = <&pinctrl_uart1>;
164*02e0babfSDario Binacchi	status = "okay";
165*02e0babfSDario Binacchi};
166*02e0babfSDario Binacchi
167*02e0babfSDario Binacchi&usbotg1 {
168*02e0babfSDario Binacchi	dr_mode = "host";
169*02e0babfSDario Binacchi	vbus-supply = <&reg_usb1_vbus>;
170*02e0babfSDario Binacchi	status = "okay";
171*02e0babfSDario Binacchi};
172*02e0babfSDario Binacchi
173*02e0babfSDario Binacchi&usbotg2 {
174*02e0babfSDario Binacchi	dr_mode = "host";
175*02e0babfSDario Binacchi	vbus-supply = <&reg_usb2_vbus>;
176*02e0babfSDario Binacchi	status = "okay";
177*02e0babfSDario Binacchi};
178*02e0babfSDario Binacchi
179*02e0babfSDario Binacchi/* MicroSD */
180*02e0babfSDario Binacchi&usdhc1 {
181*02e0babfSDario Binacchi	pinctrl-names = "default", "state_100mhz", "state_200mhz";
182*02e0babfSDario Binacchi	pinctrl-0 = <&pinctrl_usdhc1>;
183*02e0babfSDario Binacchi	pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
184*02e0babfSDario Binacchi	pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
185*02e0babfSDario Binacchi	vmmc-supply = <&reg_3v3>;
186*02e0babfSDario Binacchi	bus-width = <4>;
187*02e0babfSDario Binacchi	keep-power-in-suspend;
188*02e0babfSDario Binacchi	non-removable;
189*02e0babfSDario Binacchi	wakeup-source;
190*02e0babfSDario Binacchi	status = "okay";
191*02e0babfSDario Binacchi};
192*02e0babfSDario Binacchi
193*02e0babfSDario Binacchi&iomuxc {
194*02e0babfSDario Binacchi	pinctrl_can: can-grp {
195*02e0babfSDario Binacchi		fsl,pins = <
196*02e0babfSDario Binacchi			MX6UL_PAD_UART3_RTS_B__FLEXCAN1_RX	0x1b020
197*02e0babfSDario Binacchi			MX6UL_PAD_UART3_CTS_B__FLEXCAN1_TX	0x1b020
198*02e0babfSDario Binacchi		>;
199*02e0babfSDario Binacchi	};
200*02e0babfSDario Binacchi
201*02e0babfSDario Binacchi	pinctrl_i2c2: i2c2grp {
202*02e0babfSDario Binacchi		fsl,pins = <
203*02e0babfSDario Binacchi			MX6UL_PAD_GPIO1_IO00__I2C2_SCL		0x4001b8b0
204*02e0babfSDario Binacchi			MX6UL_PAD_UART5_RX_DATA__I2C2_SDA	0x4001b8b0
205*02e0babfSDario Binacchi		>;
206*02e0babfSDario Binacchi	};
207*02e0babfSDario Binacchi
208*02e0babfSDario Binacchi	pinctrl_mclk: mclkgrp {
209*02e0babfSDario Binacchi		fsl,pins = <
210*02e0babfSDario Binacchi			MX6UL_PAD_JTAG_TMS__CCM_CLKO1		0x13009
211*02e0babfSDario Binacchi		>;
212*02e0babfSDario Binacchi	};
213*02e0babfSDario Binacchi
214*02e0babfSDario Binacchi	pinctrl_pwm4: pwm4grp {
215*02e0babfSDario Binacchi		fsl,pins = <
216*02e0babfSDario Binacchi			MX6UL_PAD_GPIO1_IO05__PWM4_OUT		0x110b0
217*02e0babfSDario Binacchi		>;
218*02e0babfSDario Binacchi	};
219*02e0babfSDario Binacchi
220*02e0babfSDario Binacchi	pinctrl_pwm8: pwm8grp {
221*02e0babfSDario Binacchi		fsl,pins = <
222*02e0babfSDario Binacchi			MX6UL_PAD_ENET1_RX_ER__PWM8_OUT		0x11008
223*02e0babfSDario Binacchi		>;
224*02e0babfSDario Binacchi	};
225*02e0babfSDario Binacchi
226*02e0babfSDario Binacchi	pinctrl_sai2: sai2grp {
227*02e0babfSDario Binacchi		fsl,pins = <
228*02e0babfSDario Binacchi			MX6UL_PAD_JTAG_TCK__SAI2_RX_DATA	0x130b0
229*02e0babfSDario Binacchi			MX6UL_PAD_JTAG_TDI__SAI2_TX_BCLK	0x17088
230*02e0babfSDario Binacchi			MX6UL_PAD_JTAG_TDO__SAI2_TX_SYNC	0x17088
231*02e0babfSDario Binacchi			MX6UL_PAD_JTAG_TRST_B__SAI2_TX_DATA	0x120b0
232*02e0babfSDario Binacchi		>;
233*02e0babfSDario Binacchi	};
234*02e0babfSDario Binacchi
235*02e0babfSDario Binacchi	pinctrl_tsc: tscgrp {
236*02e0babfSDario Binacchi		fsl,pins = <
237*02e0babfSDario Binacchi			MX6UL_PAD_GPIO1_IO01__GPIO1_IO01	0x000b0
238*02e0babfSDario Binacchi			MX6UL_PAD_GPIO1_IO02__GPIO1_IO02	0x000b0
239*02e0babfSDario Binacchi			MX6UL_PAD_GPIO1_IO03__GPIO1_IO03	0x000b0
240*02e0babfSDario Binacchi			MX6UL_PAD_GPIO1_IO04__GPIO1_IO04	0x000b0
241*02e0babfSDario Binacchi		>;
242*02e0babfSDario Binacchi	};
243*02e0babfSDario Binacchi
244*02e0babfSDario Binacchi	pinctrl_uart1: uart1grp {
245*02e0babfSDario Binacchi		fsl,pins = <
246*02e0babfSDario Binacchi			MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX	0x1b0b1
247*02e0babfSDario Binacchi			MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX	0x1b0b1
248*02e0babfSDario Binacchi		>;
249*02e0babfSDario Binacchi	};
250*02e0babfSDario Binacchi
251*02e0babfSDario Binacchi	pinctrl_usdhc1: usdhc1grp {
252*02e0babfSDario Binacchi		fsl,pins = <
253*02e0babfSDario Binacchi			MX6UL_PAD_SD1_CMD__USDHC1_CMD		0x17059
254*02e0babfSDario Binacchi			MX6UL_PAD_SD1_CLK__USDHC1_CLK		0x10059
255*02e0babfSDario Binacchi			MX6UL_PAD_SD1_DATA0__USDHC1_DATA0	0x17059
256*02e0babfSDario Binacchi			MX6UL_PAD_SD1_DATA1__USDHC1_DATA1	0x17059
257*02e0babfSDario Binacchi			MX6UL_PAD_SD1_DATA2__USDHC1_DATA2	0x17059
258*02e0babfSDario Binacchi			MX6UL_PAD_SD1_DATA3__USDHC1_DATA3	0x17059
259*02e0babfSDario Binacchi		>;
260*02e0babfSDario Binacchi	};
261*02e0babfSDario Binacchi
262*02e0babfSDario Binacchi	pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {
263*02e0babfSDario Binacchi		fsl,pins = <
264*02e0babfSDario Binacchi			MX6UL_PAD_SD1_CMD__USDHC1_CMD		0x170b9
265*02e0babfSDario Binacchi			MX6UL_PAD_SD1_CLK__USDHC1_CLK		0x100b9
266*02e0babfSDario Binacchi			MX6UL_PAD_SD1_DATA0__USDHC1_DATA0	0x170b9
267*02e0babfSDario Binacchi			MX6UL_PAD_SD1_DATA1__USDHC1_DATA1	0x170b9
268*02e0babfSDario Binacchi			MX6UL_PAD_SD1_DATA2__USDHC1_DATA2	0x170b9
269*02e0babfSDario Binacchi			MX6UL_PAD_SD1_DATA3__USDHC1_DATA3	0x170b9
270*02e0babfSDario Binacchi		>;
271*02e0babfSDario Binacchi	};
272*02e0babfSDario Binacchi
273*02e0babfSDario Binacchi	pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {
274*02e0babfSDario Binacchi		fsl,pins = <
275*02e0babfSDario Binacchi			MX6UL_PAD_SD1_CMD__USDHC1_CMD		0x170f9
276*02e0babfSDario Binacchi			MX6UL_PAD_SD1_CLK__USDHC1_CLK		0x100f9
277*02e0babfSDario Binacchi			MX6UL_PAD_SD1_DATA0__USDHC1_DATA0	0x170f9
278*02e0babfSDario Binacchi			MX6UL_PAD_SD1_DATA1__USDHC1_DATA1	0x170f9
279*02e0babfSDario Binacchi			MX6UL_PAD_SD1_DATA2__USDHC1_DATA2	0x170f9
280*02e0babfSDario Binacchi			MX6UL_PAD_SD1_DATA3__USDHC1_DATA3	0x170f9
281*02e0babfSDario Binacchi		>;
282*02e0babfSDario Binacchi	};
283*02e0babfSDario Binacchi};
284*02e0babfSDario Binacchi
285*02e0babfSDario Binacchi&iomuxc_snvs {
286*02e0babfSDario Binacchi	pinctrl_reg_usb1: regusb1grp {
287*02e0babfSDario Binacchi		fsl,pins = <
288*02e0babfSDario Binacchi			MX6ULL_PAD_SNVS_TAMPER0__GPIO5_IO00	0x17059
289*02e0babfSDario Binacchi		>;
290*02e0babfSDario Binacchi	};
291*02e0babfSDario Binacchi
292*02e0babfSDario Binacchi	pinctrl_reg_usb2: regusb2grp {
293*02e0babfSDario Binacchi		fsl,pins = <
294*02e0babfSDario Binacchi			MX6ULL_PAD_SNVS_TAMPER3__GPIO5_IO03	0x17059
295*02e0babfSDario Binacchi		>;
296*02e0babfSDario Binacchi	};
297*02e0babfSDario Binacchi
298*02e0babfSDario Binacchi	pinctrl_reg_ext_pwr: reg-ext-pwrgrp {
299*02e0babfSDario Binacchi		fsl,pins = <
300*02e0babfSDario Binacchi			MX6ULL_PAD_SNVS_TAMPER6__GPIO5_IO06	0x17059
301*02e0babfSDario Binacchi		>;
302*02e0babfSDario Binacchi	};
303*02e0babfSDario Binacchi};
304