1*724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0-or-later OR MIT 2*724ba675SRob Herring/* 3*724ba675SRob Herring * Copyright 2022 Toradex 4*724ba675SRob Herring */ 5*724ba675SRob Herring 6*724ba675SRob Herring#include "imx6ull-colibri.dtsi" 7*724ba675SRob Herring 8*724ba675SRob Herring/ { 9*724ba675SRob Herring aliases { 10*724ba675SRob Herring mmc0 = &usdhc2; /* eMMC */ 11*724ba675SRob Herring mmc1 = &usdhc1; /* MMC 4-bit slot */ 12*724ba675SRob Herring }; 13*724ba675SRob Herring 14*724ba675SRob Herring memory@80000000 { 15*724ba675SRob Herring device_type = "memory"; 16*724ba675SRob Herring reg = <0x80000000 0x10000000>; 17*724ba675SRob Herring }; 18*724ba675SRob Herring}; 19*724ba675SRob Herring 20*724ba675SRob Herring&gpio1 { 21*724ba675SRob Herring gpio-line-names = "SODIMM_8", 22*724ba675SRob Herring "SODIMM_6", 23*724ba675SRob Herring "SODIMM_129", 24*724ba675SRob Herring "SODIMM_89", 25*724ba675SRob Herring "SODIMM_19", 26*724ba675SRob Herring "SODIMM_21", 27*724ba675SRob Herring "UNUSABLE_SODIMM_180", 28*724ba675SRob Herring "UNUSABLE_SODIMM_184", 29*724ba675SRob Herring "SODIMM_4", 30*724ba675SRob Herring "SODIMM_2", 31*724ba675SRob Herring "SODIMM_106", 32*724ba675SRob Herring "SODIMM_71", 33*724ba675SRob Herring "SODIMM_23", 34*724ba675SRob Herring "SODIMM_31", 35*724ba675SRob Herring "SODIMM_99", 36*724ba675SRob Herring "SODIMM_102", 37*724ba675SRob Herring "SODIMM_33", 38*724ba675SRob Herring "SODIMM_35", 39*724ba675SRob Herring "SODIMM_25", 40*724ba675SRob Herring "SODIMM_27", 41*724ba675SRob Herring "SODIMM_36", 42*724ba675SRob Herring "SODIMM_38", 43*724ba675SRob Herring "SODIMM_32", 44*724ba675SRob Herring "SODIMM_34", 45*724ba675SRob Herring "SODIMM_135", 46*724ba675SRob Herring "SODIMM_77", 47*724ba675SRob Herring "SODIMM_100", 48*724ba675SRob Herring "SODIMM_186", 49*724ba675SRob Herring "SODIMM_196", 50*724ba675SRob Herring "SODIMM_194"; 51*724ba675SRob Herring}; 52*724ba675SRob Herring 53*724ba675SRob Herring&gpio2 { 54*724ba675SRob Herring gpio-line-names = "SODIMM_55", 55*724ba675SRob Herring "SODIMM_63", 56*724ba675SRob Herring "SODIMM_178", 57*724ba675SRob Herring "SODIMM_188", 58*724ba675SRob Herring "SODIMM_73", 59*724ba675SRob Herring "SODIMM_30", 60*724ba675SRob Herring "SODIMM_67", 61*724ba675SRob Herring "SODIMM_104", 62*724ba675SRob Herring "", 63*724ba675SRob Herring "", 64*724ba675SRob Herring "", 65*724ba675SRob Herring "", 66*724ba675SRob Herring "", 67*724ba675SRob Herring "", 68*724ba675SRob Herring "", 69*724ba675SRob Herring "", 70*724ba675SRob Herring "SODIMM_190", 71*724ba675SRob Herring "SODIMM_47", 72*724ba675SRob Herring "SODIMM_192", 73*724ba675SRob Herring "SODIMM_49", 74*724ba675SRob Herring "SODIMM_51", 75*724ba675SRob Herring "SODIMM_53"; 76*724ba675SRob Herring}; 77*724ba675SRob Herring 78*724ba675SRob Herring&gpio3 { 79*724ba675SRob Herring gpio-line-names = "SODIMM_56", 80*724ba675SRob Herring "SODIMM_44", 81*724ba675SRob Herring "SODIMM_68", 82*724ba675SRob Herring "SODIMM_82", 83*724ba675SRob Herring "", 84*724ba675SRob Herring "SODIMM_76", 85*724ba675SRob Herring "SODIMM_70", 86*724ba675SRob Herring "SODIMM_60", 87*724ba675SRob Herring "SODIMM_58", 88*724ba675SRob Herring "SODIMM_78", 89*724ba675SRob Herring "SODIMM_72", 90*724ba675SRob Herring "SODIMM_80", 91*724ba675SRob Herring "SODIMM_46", 92*724ba675SRob Herring "SODIMM_62", 93*724ba675SRob Herring "SODIMM_48", 94*724ba675SRob Herring "SODIMM_74", 95*724ba675SRob Herring "SODIMM_50", 96*724ba675SRob Herring "SODIMM_52", 97*724ba675SRob Herring "SODIMM_54", 98*724ba675SRob Herring "SODIMM_66", 99*724ba675SRob Herring "SODIMM_64", 100*724ba675SRob Herring "SODIMM_57", 101*724ba675SRob Herring "SODIMM_61", 102*724ba675SRob Herring "SODIMM_29", 103*724ba675SRob Herring "SODIMM_37", 104*724ba675SRob Herring "SODIMM_88", 105*724ba675SRob Herring "SODIMM_86", 106*724ba675SRob Herring "SODIMM_92", 107*724ba675SRob Herring "SODIMM_90"; 108*724ba675SRob Herring}; 109*724ba675SRob Herring 110*724ba675SRob Herring&gpio4 { 111*724ba675SRob Herring gpio-line-names = "", 112*724ba675SRob Herring "", 113*724ba675SRob Herring "", 114*724ba675SRob Herring "", 115*724ba675SRob Herring "", 116*724ba675SRob Herring "", 117*724ba675SRob Herring "", 118*724ba675SRob Herring "", 119*724ba675SRob Herring "", 120*724ba675SRob Herring "", 121*724ba675SRob Herring "SODIMM_140", 122*724ba675SRob Herring "SODIMM_59", 123*724ba675SRob Herring "SODIMM_142", 124*724ba675SRob Herring "SODIMM_144", 125*724ba675SRob Herring "SODIMM_133", 126*724ba675SRob Herring "SODIMM_146", 127*724ba675SRob Herring "SODIMM_28", 128*724ba675SRob Herring "SODIMM_75", 129*724ba675SRob Herring "SODIMM_96", 130*724ba675SRob Herring "SODIMM_81", 131*724ba675SRob Herring "SODIMM_94", 132*724ba675SRob Herring "SODIMM_101", 133*724ba675SRob Herring "SODIMM_103", 134*724ba675SRob Herring "SODIMM_79", 135*724ba675SRob Herring "SODIMM_97", 136*724ba675SRob Herring "SODIMM_69", 137*724ba675SRob Herring "SODIMM_98", 138*724ba675SRob Herring "SODIMM_85", 139*724ba675SRob Herring "SODIMM_65"; 140*724ba675SRob Herring}; 141*724ba675SRob Herring 142*724ba675SRob Herring&gpio5 { 143*724ba675SRob Herring gpio-line-names = "SODIMM_43", 144*724ba675SRob Herring "SODIMM_45", 145*724ba675SRob Herring "SODIMM_137", 146*724ba675SRob Herring "SODIMM_95", 147*724ba675SRob Herring "SODIMM_107", 148*724ba675SRob Herring "SODIMM_131", 149*724ba675SRob Herring "SODIMM_93", 150*724ba675SRob Herring "", 151*724ba675SRob Herring "SODIMM_138", 152*724ba675SRob Herring "", 153*724ba675SRob Herring "SODIMM_105", 154*724ba675SRob Herring "SODIMM_127"; 155*724ba675SRob Herring}; 156*724ba675SRob Herring 157*724ba675SRob Herring/* NAND */ 158*724ba675SRob Herring&gpmi { 159*724ba675SRob Herring status = "disabled"; 160*724ba675SRob Herring}; 161*724ba675SRob Herring 162*724ba675SRob Herring&iomuxc { 163*724ba675SRob Herring pinctrl-names = "default"; 164*724ba675SRob Herring pinctrl-0 = <&pinctrl_gpio1 &pinctrl_gpio2 &pinctrl_gpio3 165*724ba675SRob Herring &pinctrl_gpio4 &pinctrl_gpio6 &pinctrl_gpio7 166*724ba675SRob Herring &pinctrl_gpmi_gpio>; 167*724ba675SRob Herring}; 168*724ba675SRob Herring 169*724ba675SRob Herring&iomuxc_snvs { 170*724ba675SRob Herring pinctrl-names = "default"; 171*724ba675SRob Herring pinctrl-0 = <&pinctrl_snvs_gpio1 &pinctrl_snvs_gpio3>; 172*724ba675SRob Herring}; 173*724ba675SRob Herring 174*724ba675SRob Herring/* eMMC */ 175*724ba675SRob Herring&usdhc2 { 176*724ba675SRob Herring pinctrl-names = "default"; 177*724ba675SRob Herring pinctrl-0 = <&pinctrl_usdhc2emmc>; 178*724ba675SRob Herring assigned-clocks = <&clks IMX6UL_CLK_USDHC2_SEL>, <&clks IMX6UL_CLK_USDHC2>; 179*724ba675SRob Herring assigned-clock-parents = <&clks IMX6UL_CLK_PLL2_PFD2>; 180*724ba675SRob Herring assigned-clock-rates = <0>, <198000000>; 181*724ba675SRob Herring bus-width = <8>; 182*724ba675SRob Herring keep-power-in-suspend; 183*724ba675SRob Herring no-1-8-v; 184*724ba675SRob Herring non-removable; 185*724ba675SRob Herring vmmc-supply = <®_module_3v3>; 186*724ba675SRob Herring status = "okay"; 187*724ba675SRob Herring}; 188