1*44b96e7aSAntonin Godard// SPDX-License-Identifier: GPL-2.0+ 2*44b96e7aSAntonin Godard/* 3*44b96e7aSAntonin Godard * Support for Variscite MX6 Concerto Carrier board with the VAR-SOM-MX6UL 4*44b96e7aSAntonin Godard * Variscite SoM mounted on it 5*44b96e7aSAntonin Godard * 6*44b96e7aSAntonin Godard * Copyright 2019 Variscite Ltd. 7*44b96e7aSAntonin Godard * Copyright 2025 Bootlin 8*44b96e7aSAntonin Godard */ 9*44b96e7aSAntonin Godard 10*44b96e7aSAntonin Godard#include "imx6ul-var-som.dtsi" 11*44b96e7aSAntonin Godard#include <dt-bindings/leds/common.h> 12*44b96e7aSAntonin Godard 13*44b96e7aSAntonin Godard/ { 14*44b96e7aSAntonin Godard model = "Variscite VAR-SOM-MX6UL Concerto Board"; 15*44b96e7aSAntonin Godard compatible = "variscite,mx6ulconcerto", "variscite,var-som-imx6ul", "fsl,imx6ul"; 16*44b96e7aSAntonin Godard 17*44b96e7aSAntonin Godard chosen { 18*44b96e7aSAntonin Godard stdout-path = &uart1; 19*44b96e7aSAntonin Godard }; 20*44b96e7aSAntonin Godard 21*44b96e7aSAntonin Godard gpio-keys { 22*44b96e7aSAntonin Godard compatible = "gpio-keys"; 23*44b96e7aSAntonin Godard pinctrl-names = "default"; 24*44b96e7aSAntonin Godard pinctrl-0 = <&pinctrl_gpio_key_back>, <&pinctrl_gpio_key_wakeup>; 25*44b96e7aSAntonin Godard 26*44b96e7aSAntonin Godard key-back { 27*44b96e7aSAntonin Godard gpios = <&gpio4 14 GPIO_ACTIVE_LOW>; 28*44b96e7aSAntonin Godard linux,code = <KEY_BACK>; 29*44b96e7aSAntonin Godard }; 30*44b96e7aSAntonin Godard 31*44b96e7aSAntonin Godard key-wakeup { 32*44b96e7aSAntonin Godard gpios = <&gpio5 8 GPIO_ACTIVE_LOW>; 33*44b96e7aSAntonin Godard linux,code = <KEY_WAKEUP>; 34*44b96e7aSAntonin Godard wakeup-source; 35*44b96e7aSAntonin Godard }; 36*44b96e7aSAntonin Godard }; 37*44b96e7aSAntonin Godard 38*44b96e7aSAntonin Godard leds { 39*44b96e7aSAntonin Godard compatible = "gpio-leds"; 40*44b96e7aSAntonin Godard pinctrl-names = "default"; 41*44b96e7aSAntonin Godard pinctrl-0 = <&pinctrl_gpio_leds>; 42*44b96e7aSAntonin Godard 43*44b96e7aSAntonin Godard led-0 { 44*44b96e7aSAntonin Godard function = LED_FUNCTION_STATUS; 45*44b96e7aSAntonin Godard color = <LED_COLOR_ID_GREEN>; 46*44b96e7aSAntonin Godard label = "gpled2"; 47*44b96e7aSAntonin Godard gpios = <&gpio1 25 GPIO_ACTIVE_HIGH>; 48*44b96e7aSAntonin Godard linux,default-trigger = "heartbeat"; 49*44b96e7aSAntonin Godard }; 50*44b96e7aSAntonin Godard }; 51*44b96e7aSAntonin Godard}; 52*44b96e7aSAntonin Godard 53*44b96e7aSAntonin Godard&can1 { 54*44b96e7aSAntonin Godard pinctrl-names = "default"; 55*44b96e7aSAntonin Godard pinctrl-0 = <&pinctrl_flexcan1>; 56*44b96e7aSAntonin Godard status = "okay"; 57*44b96e7aSAntonin Godard}; 58*44b96e7aSAntonin Godard 59*44b96e7aSAntonin Godard&fec1 { 60*44b96e7aSAntonin Godard status = "disabled"; 61*44b96e7aSAntonin Godard}; 62*44b96e7aSAntonin Godard 63*44b96e7aSAntonin Godard&fec2 { 64*44b96e7aSAntonin Godard pinctrl-names = "default"; 65*44b96e7aSAntonin Godard pinctrl-0 = <&pinctrl_enet2>, <&pinctrl_enet2_gpio>, <&pinctrl_enet2_mdio>; 66*44b96e7aSAntonin Godard phy-mode = "rmii"; 67*44b96e7aSAntonin Godard phy-handle = <ðphy1>; 68*44b96e7aSAntonin Godard status = "okay"; 69*44b96e7aSAntonin Godard 70*44b96e7aSAntonin Godard mdio { 71*44b96e7aSAntonin Godard #address-cells = <1>; 72*44b96e7aSAntonin Godard #size-cells = <0>; 73*44b96e7aSAntonin Godard 74*44b96e7aSAntonin Godard ethphy1: ethernet-phy@3 { 75*44b96e7aSAntonin Godard compatible = "ethernet-phy-ieee802.3-c22"; 76*44b96e7aSAntonin Godard reg = <3>; 77*44b96e7aSAntonin Godard clocks = <&rmii_ref_clk>; 78*44b96e7aSAntonin Godard clock-names = "rmii-ref"; 79*44b96e7aSAntonin Godard reset-gpios = <&gpio5 5 GPIO_ACTIVE_LOW>; 80*44b96e7aSAntonin Godard reset-assert-us = <100000>; 81*44b96e7aSAntonin Godard micrel,led-mode = <0>; 82*44b96e7aSAntonin Godard micrel,rmii-reference-clock-select-25-mhz = <1>; 83*44b96e7aSAntonin Godard }; 84*44b96e7aSAntonin Godard }; 85*44b96e7aSAntonin Godard}; 86*44b96e7aSAntonin Godard 87*44b96e7aSAntonin Godard&i2c1 { 88*44b96e7aSAntonin Godard clock-frequency = <100000>; 89*44b96e7aSAntonin Godard pinctrl-names = "default"; 90*44b96e7aSAntonin Godard pinctrl-0 = <&pinctrl_i2c1>; 91*44b96e7aSAntonin Godard status = "okay"; 92*44b96e7aSAntonin Godard 93*44b96e7aSAntonin Godard rtc@68 { 94*44b96e7aSAntonin Godard /* 95*44b96e7aSAntonin Godard * To actually use this interrupt 96*44b96e7aSAntonin Godard * connect pins J14.8 & J14.10 on the Concerto-Board. 97*44b96e7aSAntonin Godard */ 98*44b96e7aSAntonin Godard compatible = "dallas,ds1337"; 99*44b96e7aSAntonin Godard reg = <0x68>; 100*44b96e7aSAntonin Godard pinctrl-names = "default"; 101*44b96e7aSAntonin Godard pinctrl-0 = <&pinctrl_rtc>; 102*44b96e7aSAntonin Godard interrupt-parent = <&gpio1>; 103*44b96e7aSAntonin Godard interrupts = <10 IRQ_TYPE_EDGE_FALLING>; 104*44b96e7aSAntonin Godard }; 105*44b96e7aSAntonin Godard}; 106*44b96e7aSAntonin Godard 107*44b96e7aSAntonin Godard&iomuxc { 108*44b96e7aSAntonin Godard pinctrl_enet2: enet2grp { 109*44b96e7aSAntonin Godard fsl,pins = < 110*44b96e7aSAntonin Godard MX6UL_PAD_ENET2_RX_EN__ENET2_RX_EN 0x1b0b0 111*44b96e7aSAntonin Godard MX6UL_PAD_ENET2_RX_ER__ENET2_RX_ER 0x1b0b0 112*44b96e7aSAntonin Godard MX6UL_PAD_ENET2_RX_DATA0__ENET2_RDATA00 0x1b0b0 113*44b96e7aSAntonin Godard MX6UL_PAD_ENET2_RX_DATA1__ENET2_RDATA01 0x1b0b0 114*44b96e7aSAntonin Godard MX6UL_PAD_ENET2_TX_EN__ENET2_TX_EN 0x1b0b0 115*44b96e7aSAntonin Godard MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00 0x1b0b0 116*44b96e7aSAntonin Godard MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01 0x1b0b0 117*44b96e7aSAntonin Godard MX6UL_PAD_ENET2_TX_CLK__ENET2_REF_CLK2 0x4001b031 118*44b96e7aSAntonin Godard >; 119*44b96e7aSAntonin Godard }; 120*44b96e7aSAntonin Godard 121*44b96e7aSAntonin Godard pinctrl_enet2_gpio: enet2-gpiogrp { 122*44b96e7aSAntonin Godard fsl,pins = < 123*44b96e7aSAntonin Godard MX6UL_PAD_SNVS_TAMPER5__GPIO5_IO05 0x1b0b0 /* fec2 reset */ 124*44b96e7aSAntonin Godard >; 125*44b96e7aSAntonin Godard }; 126*44b96e7aSAntonin Godard 127*44b96e7aSAntonin Godard pinctrl_enet2_mdio: enet2-mdiogrp { 128*44b96e7aSAntonin Godard fsl,pins = < 129*44b96e7aSAntonin Godard MX6UL_PAD_GPIO1_IO06__ENET2_MDIO 0x1b0b0 130*44b96e7aSAntonin Godard MX6UL_PAD_GPIO1_IO07__ENET2_MDC 0x1b0b0 131*44b96e7aSAntonin Godard >; 132*44b96e7aSAntonin Godard }; 133*44b96e7aSAntonin Godard 134*44b96e7aSAntonin Godard pinctrl_flexcan1: flexcan1grp { 135*44b96e7aSAntonin Godard fsl,pins = < 136*44b96e7aSAntonin Godard MX6UL_PAD_UART3_RTS_B__FLEXCAN1_RX 0x1b020 137*44b96e7aSAntonin Godard MX6UL_PAD_UART3_CTS_B__FLEXCAN1_TX 0x1b020 138*44b96e7aSAntonin Godard >; 139*44b96e7aSAntonin Godard }; 140*44b96e7aSAntonin Godard 141*44b96e7aSAntonin Godard pinctrl_gpio_key_back: gpio-key-backgrp { 142*44b96e7aSAntonin Godard fsl,pins = < 143*44b96e7aSAntonin Godard MX6UL_PAD_NAND_CE1_B__GPIO4_IO14 0x17059 144*44b96e7aSAntonin Godard >; 145*44b96e7aSAntonin Godard }; 146*44b96e7aSAntonin Godard 147*44b96e7aSAntonin Godard pinctrl_gpio_leds: gpio-ledsgrp { 148*44b96e7aSAntonin Godard fsl,pins = < 149*44b96e7aSAntonin Godard MX6UL_PAD_UART3_RX_DATA__GPIO1_IO25 0x1b0b0 /* GPLED2 */ 150*44b96e7aSAntonin Godard >; 151*44b96e7aSAntonin Godard }; 152*44b96e7aSAntonin Godard 153*44b96e7aSAntonin Godard pinctrl_gpio_key_wakeup: gpio-keys-wakeupgrp { 154*44b96e7aSAntonin Godard fsl,pins = < 155*44b96e7aSAntonin Godard MX6UL_PAD_SNVS_TAMPER8__GPIO5_IO08 0x17059 156*44b96e7aSAntonin Godard >; 157*44b96e7aSAntonin Godard }; 158*44b96e7aSAntonin Godard 159*44b96e7aSAntonin Godard pinctrl_i2c1: i2c1grp { 160*44b96e7aSAntonin Godard fsl,pins = < 161*44b96e7aSAntonin Godard MX6UL_PAD_CSI_PIXCLK__I2C1_SCL 0x4001b8b0 162*44b96e7aSAntonin Godard MX6UL_PAD_CSI_MCLK__I2C1_SDA 0x4001b8b0 163*44b96e7aSAntonin Godard >; 164*44b96e7aSAntonin Godard }; 165*44b96e7aSAntonin Godard 166*44b96e7aSAntonin Godard pinctrl_pwm4: pwm4grp { 167*44b96e7aSAntonin Godard fsl,pins = < 168*44b96e7aSAntonin Godard MX6UL_PAD_GPIO1_IO05__PWM4_OUT 0x110b0 169*44b96e7aSAntonin Godard >; 170*44b96e7aSAntonin Godard }; 171*44b96e7aSAntonin Godard 172*44b96e7aSAntonin Godard pinctrl_rtc: rtcgrp { 173*44b96e7aSAntonin Godard fsl,pins = < 174*44b96e7aSAntonin Godard MX6UL_PAD_JTAG_MOD__GPIO1_IO10 0x1b0b0 /* RTC alarm IRQ */ 175*44b96e7aSAntonin Godard >; 176*44b96e7aSAntonin Godard }; 177*44b96e7aSAntonin Godard 178*44b96e7aSAntonin Godard pinctrl_uart1: uart1grp { 179*44b96e7aSAntonin Godard fsl,pins = < 180*44b96e7aSAntonin Godard MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1 181*44b96e7aSAntonin Godard MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1 182*44b96e7aSAntonin Godard >; 183*44b96e7aSAntonin Godard }; 184*44b96e7aSAntonin Godard 185*44b96e7aSAntonin Godard pinctrl_uart5: uart5grp { 186*44b96e7aSAntonin Godard fsl,pins = < 187*44b96e7aSAntonin Godard MX6UL_PAD_CSI_DATA00__UART5_DCE_TX 0x1b0b1 188*44b96e7aSAntonin Godard MX6UL_PAD_CSI_DATA01__UART5_DCE_RX 0x1b0b1 189*44b96e7aSAntonin Godard MX6UL_PAD_GPIO1_IO09__UART5_DCE_CTS 0x1b0b1 190*44b96e7aSAntonin Godard MX6UL_PAD_GPIO1_IO08__UART5_DCE_RTS 0x1b0b1 191*44b96e7aSAntonin Godard >; 192*44b96e7aSAntonin Godard }; 193*44b96e7aSAntonin Godard 194*44b96e7aSAntonin Godard pinctrl_usb_otg1_id: usbotg1idgrp { 195*44b96e7aSAntonin Godard fsl,pins = < 196*44b96e7aSAntonin Godard MX6UL_PAD_UART3_TX_DATA__ANATOP_OTG1_ID 0x17059 197*44b96e7aSAntonin Godard >; 198*44b96e7aSAntonin Godard }; 199*44b96e7aSAntonin Godard 200*44b96e7aSAntonin Godard pinctrl_usdhc1: usdhc1grp { 201*44b96e7aSAntonin Godard fsl,pins = < 202*44b96e7aSAntonin Godard MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059 203*44b96e7aSAntonin Godard MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x17059 204*44b96e7aSAntonin Godard MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x17059 205*44b96e7aSAntonin Godard MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x17059 206*44b96e7aSAntonin Godard MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x17059 207*44b96e7aSAntonin Godard MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x17059 208*44b96e7aSAntonin Godard >; 209*44b96e7aSAntonin Godard }; 210*44b96e7aSAntonin Godard 211*44b96e7aSAntonin Godard pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp { 212*44b96e7aSAntonin Godard fsl,pins = < 213*44b96e7aSAntonin Godard MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170b9 214*44b96e7aSAntonin Godard MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100b9 215*44b96e7aSAntonin Godard MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170b9 216*44b96e7aSAntonin Godard MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170b9 217*44b96e7aSAntonin Godard MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170b9 218*44b96e7aSAntonin Godard MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170b9 219*44b96e7aSAntonin Godard >; 220*44b96e7aSAntonin Godard }; 221*44b96e7aSAntonin Godard 222*44b96e7aSAntonin Godard pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp { 223*44b96e7aSAntonin Godard fsl,pins = < 224*44b96e7aSAntonin Godard MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170f9 225*44b96e7aSAntonin Godard MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100f9 226*44b96e7aSAntonin Godard MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170f9 227*44b96e7aSAntonin Godard MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170f9 228*44b96e7aSAntonin Godard MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170f9 229*44b96e7aSAntonin Godard MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170f9 230*44b96e7aSAntonin Godard >; 231*44b96e7aSAntonin Godard }; 232*44b96e7aSAntonin Godard 233*44b96e7aSAntonin Godard pinctrl_usdhc1_gpio: usdhc1-gpiogrp { 234*44b96e7aSAntonin Godard fsl,pins = < 235*44b96e7aSAntonin Godard MX6UL_PAD_GPIO1_IO00__GPIO1_IO00 0x1b0b1 /* CD */ 236*44b96e7aSAntonin Godard >; 237*44b96e7aSAntonin Godard }; 238*44b96e7aSAntonin Godard 239*44b96e7aSAntonin Godard pinctrl_wdog: wdoggrp { 240*44b96e7aSAntonin Godard fsl,pins = < 241*44b96e7aSAntonin Godard MX6UL_PAD_GPIO1_IO01__WDOG1_WDOG_B 0x78b0 242*44b96e7aSAntonin Godard >; 243*44b96e7aSAntonin Godard }; 244*44b96e7aSAntonin Godard}; 245*44b96e7aSAntonin Godard 246*44b96e7aSAntonin Godard&pwm4 { 247*44b96e7aSAntonin Godard pinctrl-names = "default"; 248*44b96e7aSAntonin Godard pinctrl-0 = <&pinctrl_pwm4>; 249*44b96e7aSAntonin Godard status = "okay"; 250*44b96e7aSAntonin Godard}; 251*44b96e7aSAntonin Godard 252*44b96e7aSAntonin Godard&snvs_pwrkey { 253*44b96e7aSAntonin Godard status = "disabled"; 254*44b96e7aSAntonin Godard}; 255*44b96e7aSAntonin Godard 256*44b96e7aSAntonin Godard&snvs_rtc { 257*44b96e7aSAntonin Godard status = "disabled"; 258*44b96e7aSAntonin Godard}; 259*44b96e7aSAntonin Godard 260*44b96e7aSAntonin Godard&tsc { 261*44b96e7aSAntonin Godard /* 262*44b96e7aSAntonin Godard * Conflics with wdog1 ext-reset-output & SD CD pins, 263*44b96e7aSAntonin Godard * so we keep it disabled by default. 264*44b96e7aSAntonin Godard */ 265*44b96e7aSAntonin Godard status = "disabled"; 266*44b96e7aSAntonin Godard}; 267*44b96e7aSAntonin Godard 268*44b96e7aSAntonin Godard/* Console UART */ 269*44b96e7aSAntonin Godard&uart1 { 270*44b96e7aSAntonin Godard pinctrl-names = "default"; 271*44b96e7aSAntonin Godard pinctrl-0 = <&pinctrl_uart1>; 272*44b96e7aSAntonin Godard status = "okay"; 273*44b96e7aSAntonin Godard}; 274*44b96e7aSAntonin Godard 275*44b96e7aSAntonin Godard/* ttymxc4 UART */ 276*44b96e7aSAntonin Godard&uart5 { 277*44b96e7aSAntonin Godard pinctrl-names = "default"; 278*44b96e7aSAntonin Godard pinctrl-0 = <&pinctrl_uart5>; 279*44b96e7aSAntonin Godard uart-has-rtscts; 280*44b96e7aSAntonin Godard status = "okay"; 281*44b96e7aSAntonin Godard}; 282*44b96e7aSAntonin Godard 283*44b96e7aSAntonin Godard&usbotg1 { 284*44b96e7aSAntonin Godard pinctrl-names = "default"; 285*44b96e7aSAntonin Godard pinctrl-0 = <&pinctrl_usb_otg1_id>; 286*44b96e7aSAntonin Godard dr_mode = "otg"; 287*44b96e7aSAntonin Godard disable-over-current; 288*44b96e7aSAntonin Godard srp-disable; 289*44b96e7aSAntonin Godard hnp-disable; 290*44b96e7aSAntonin Godard adp-disable; 291*44b96e7aSAntonin Godard status = "okay"; 292*44b96e7aSAntonin Godard}; 293*44b96e7aSAntonin Godard 294*44b96e7aSAntonin Godard&usbotg2 { 295*44b96e7aSAntonin Godard dr_mode = "host"; 296*44b96e7aSAntonin Godard disable-over-current; 297*44b96e7aSAntonin Godard status = "okay"; 298*44b96e7aSAntonin Godard}; 299*44b96e7aSAntonin Godard 300*44b96e7aSAntonin Godard&usdhc1 { 301*44b96e7aSAntonin Godard pinctrl-names = "default", "state_100mhz", "state_200mhz"; 302*44b96e7aSAntonin Godard pinctrl-0 = <&pinctrl_usdhc1>, <&pinctrl_usdhc1_gpio>; 303*44b96e7aSAntonin Godard pinctrl-1 = <&pinctrl_usdhc1_100mhz>, <&pinctrl_usdhc1_gpio>; 304*44b96e7aSAntonin Godard pinctrl-2 = <&pinctrl_usdhc1_200mhz>, <&pinctrl_usdhc1_gpio>; 305*44b96e7aSAntonin Godard cd-gpios = <&gpio1 0 GPIO_ACTIVE_LOW>; 306*44b96e7aSAntonin Godard no-1-8-v; 307*44b96e7aSAntonin Godard keep-power-in-suspend; 308*44b96e7aSAntonin Godard wakeup-source; 309*44b96e7aSAntonin Godard status = "okay"; 310*44b96e7aSAntonin Godard}; 311*44b96e7aSAntonin Godard 312*44b96e7aSAntonin Godard&wdog1 { 313*44b96e7aSAntonin Godard pinctrl-names = "default"; 314*44b96e7aSAntonin Godard pinctrl-0 = <&pinctrl_wdog>; 315*44b96e7aSAntonin Godard /* 316*44b96e7aSAntonin Godard * To actually use ext-reset-output 317*44b96e7aSAntonin Godard * connect pins J17.3 & J17.8 on the Concerto-Board 318*44b96e7aSAntonin Godard */ 319*44b96e7aSAntonin Godard fsl,ext-reset-output; 320*44b96e7aSAntonin Godard}; 321