1*724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0 OR MIT 2*724ba675SRob Herring// 3*724ba675SRob Herring// Copyright 2017 Armadeus Systems <support@armadeus.com> 4*724ba675SRob Herring 5*724ba675SRob Herring/dts-v1/; 6*724ba675SRob Herring#include "imx6ul-opos6ul.dtsi" 7*724ba675SRob Herring#include "imx6ul-imx6ull-opos6uldev.dtsi" 8*724ba675SRob Herring 9*724ba675SRob Herring/ { 10*724ba675SRob Herring model = "Armadeus Systems OPOS6UL SoM (i.MX6UL) on OPOS6ULDev board"; 11*724ba675SRob Herring compatible = "armadeus,imx6ul-opos6uldev", "armadeus,imx6ul-opos6ul", "fsl,imx6ul"; 12*724ba675SRob Herring}; 13*724ba675SRob Herring 14*724ba675SRob Herring&iomuxc { 15*724ba675SRob Herring pinctrl-0 = <&pinctrl_gpios>, <&pinctrl_tamper_gpios>; 16*724ba675SRob Herring 17*724ba675SRob Herring pinctrl_tamper_gpios: tampergpiosgrp { 18*724ba675SRob Herring fsl,pins = < 19*724ba675SRob Herring MX6UL_PAD_SNVS_TAMPER0__GPIO5_IO00 0x0b0b0 20*724ba675SRob Herring MX6UL_PAD_SNVS_TAMPER2__GPIO5_IO02 0x0b0b0 21*724ba675SRob Herring MX6UL_PAD_SNVS_TAMPER3__GPIO5_IO03 0x0b0b0 22*724ba675SRob Herring MX6UL_PAD_SNVS_TAMPER4__GPIO5_IO04 0x0b0b0 23*724ba675SRob Herring MX6UL_PAD_SNVS_TAMPER5__GPIO5_IO05 0x0b0b0 24*724ba675SRob Herring MX6UL_PAD_SNVS_TAMPER6__GPIO5_IO06 0x0b0b0 25*724ba675SRob Herring MX6UL_PAD_SNVS_TAMPER7__GPIO5_IO07 0x0b0b0 26*724ba675SRob Herring MX6UL_PAD_SNVS_TAMPER8__GPIO5_IO08 0x0b0b0 27*724ba675SRob Herring >; 28*724ba675SRob Herring }; 29*724ba675SRob Herring 30*724ba675SRob Herring pinctrl_usbotg2_vbus: usbotg2vbusgrp { 31*724ba675SRob Herring fsl,pins = < 32*724ba675SRob Herring MX6UL_PAD_SNVS_TAMPER9__GPIO5_IO09 0x1b0b0 33*724ba675SRob Herring >; 34*724ba675SRob Herring }; 35*724ba675SRob Herring 36*724ba675SRob Herring pinctrl_w1: w1grp { 37*724ba675SRob Herring fsl,pins = < 38*724ba675SRob Herring MX6UL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x0b0b0 39*724ba675SRob Herring >; 40*724ba675SRob Herring }; 41*724ba675SRob Herring}; 42