1// SPDX-License-Identifier: (GPL-2.0 OR MIT) 2/* 3 * Copyright 2016 Freescale Semiconductor, Inc. 4 * Copyright 2017-2018 NXP. 5 * 6 */ 7 8/dts-v1/; 9 10#include <dt-bindings/gpio/gpio.h> 11#include <dt-bindings/input/input.h> 12#include "imx6sll.dtsi" 13 14/ { 15 model = "Freescale i.MX6SLL EVK Board"; 16 compatible = "fsl,imx6sll-evk", "fsl,imx6sll"; 17 18 chosen { 19 stdout-path = &uart1; 20 }; 21 22 memory@80000000 { 23 device_type = "memory"; 24 reg = <0x80000000 0x80000000>; 25 }; 26 27 backlight_display: backlight-display { 28 compatible = "pwm-backlight"; 29 pwms = <&pwm1 0 5000000 0>; 30 brightness-levels = <0 4 8 16 32 64 128 255>; 31 default-brightness-level = <6>; 32 status = "okay"; 33 }; 34 35 leds { 36 compatible = "gpio-leds"; 37 pinctrl-names = "default"; 38 pinctrl-0 = <&pinctrl_led>; 39 40 led-user { 41 label = "debug"; 42 gpios = <&gpio2 4 GPIO_ACTIVE_HIGH>; 43 linux,default-trigger = "heartbeat"; 44 }; 45 }; 46 47 reg_usb_otg1_vbus: regulator-otg1-vbus { 48 compatible = "regulator-fixed"; 49 pinctrl-names = "default"; 50 pinctrl-0 = <&pinctrl_usb_otg1_vbus>; 51 regulator-name = "usb_otg1_vbus"; 52 regulator-min-microvolt = <5000000>; 53 regulator-max-microvolt = <5000000>; 54 gpio = <&gpio4 0 GPIO_ACTIVE_HIGH>; 55 enable-active-high; 56 }; 57 58 reg_usb_otg2_vbus: regulator-otg2-vbus { 59 compatible = "regulator-fixed"; 60 pinctrl-names = "default"; 61 pinctrl-0 = <&pinctrl_usb_otg2_vbus>; 62 regulator-name = "usb_otg2_vbus"; 63 regulator-min-microvolt = <5000000>; 64 regulator-max-microvolt = <5000000>; 65 gpio = <&gpio4 2 GPIO_ACTIVE_HIGH>; 66 enable-active-high; 67 }; 68 69 reg_aud3v: regulator-aud3v { 70 compatible = "regulator-fixed"; 71 regulator-name = "wm8962-supply-3v15"; 72 regulator-min-microvolt = <3150000>; 73 regulator-max-microvolt = <3150000>; 74 regulator-boot-on; 75 }; 76 77 reg_aud4v: regulator-aud4v { 78 compatible = "regulator-fixed"; 79 regulator-name = "wm8962-supply-4v2"; 80 regulator-min-microvolt = <4325000>; 81 regulator-max-microvolt = <4325000>; 82 regulator-boot-on; 83 }; 84 85 reg_lcd_3v3: regulator-lcd-3v3 { 86 compatible = "regulator-fixed"; 87 pinctrl-names = "default"; 88 pinctrl-0 = <&pinctrl_reg_lcd_3v3>; 89 regulator-name = "lcd-3v3"; 90 gpio = <&gpio4 3 GPIO_ACTIVE_HIGH>; 91 enable-active-high; 92 }; 93 94 reg_lcd_5v: regulator-lcd-5v { 95 compatible = "regulator-fixed"; 96 regulator-name = "lcd-5v0"; 97 regulator-min-microvolt = <5000000>; 98 regulator-max-microvolt = <5000000>; 99 }; 100 101 reg_sd1_vmmc: regulator-sd1-vmmc { 102 compatible = "regulator-fixed"; 103 pinctrl-names = "default"; 104 pinctrl-0 = <&pinctrl_reg_sd1_vmmc>; 105 regulator-name = "SD1_SPWR"; 106 regulator-min-microvolt = <3000000>; 107 regulator-max-microvolt = <3000000>; 108 gpio = <&gpio3 30 GPIO_ACTIVE_HIGH>; 109 enable-active-high; 110 }; 111 112 reg_sd2_vmmc: regulator-sd2-vmmc { 113 compatible = "regulator-fixed"; 114 regulator-name = "eMMC-VCCQ"; 115 regulator-min-microvolt = <1800000>; 116 regulator-max-microvolt = <1800000>; 117 regulator-boot-on; 118 }; 119 120 reg_sd3_vmmc: regulator-sd3-vmmc { 121 compatible = "regulator-fixed"; 122 pinctrl-names = "default"; 123 pinctrl-0 = <&pinctrl_reg_sd3_vmmc>; 124 regulator-name = "SD3_WIFI"; 125 regulator-min-microvolt = <3000000>; 126 regulator-max-microvolt = <3000000>; 127 gpio = <&gpio4 4 GPIO_ACTIVE_HIGH>; 128 enable-active-high; 129 }; 130 131 panel { 132 compatible = "sii,43wvf1g"; 133 backlight = <&backlight_display>; 134 dvdd-supply = <®_lcd_3v3>; 135 avdd-supply = <®_lcd_5v>; 136 137 port { 138 panel_in: endpoint { 139 remote-endpoint = <&display_out>; 140 }; 141 }; 142 }; 143 144 sound { 145 compatible = "fsl,imx6sl-evk-wm8962", "fsl,imx-audio-wm8962"; 146 pinctrl-names = "default"; 147 pinctrl-0 = <&pinctrl_hp>; 148 model = "wm8962-audio"; 149 audio-cpu = <&ssi2>; 150 audio-codec = <&wm8962>; 151 audio-routing = 152 "Headphone Jack", "HPOUTL", 153 "Headphone Jack", "HPOUTR", 154 "Ext Spk", "SPKOUTL", 155 "Ext Spk", "SPKOUTR", 156 "AMIC", "MICBIAS", 157 "IN3R", "AMIC"; 158 mux-int-port = <2>; 159 mux-ext-port = <3>; 160 hp-det-gpio = <&gpio4 24 GPIO_ACTIVE_LOW>; 161 }; 162}; 163 164&audmux { 165 pinctrl-names = "default"; 166 pinctrl-0 = <&pinctrl_audmux3>; 167 status = "okay"; 168}; 169 170&cpu0 { 171 arm-supply = <&sw1a_reg>; 172 soc-supply = <&sw1c_reg>; 173}; 174 175&i2c1 { 176 clock-frequency = <100000>; 177 pinctrl-names = "default"; 178 pinctrl-0 = <&pinctrl_i2c1>; 179 status = "okay"; 180 181 pfuze100: pmic@8 { 182 compatible = "fsl,pfuze100"; 183 reg = <0x08>; 184 185 regulators { 186 sw1a_reg: sw1ab { 187 regulator-min-microvolt = <300000>; 188 regulator-max-microvolt = <1875000>; 189 regulator-boot-on; 190 regulator-always-on; 191 regulator-ramp-delay = <6250>; 192 }; 193 194 sw1c_reg: sw1c { 195 regulator-min-microvolt = <300000>; 196 regulator-max-microvolt = <1875000>; 197 regulator-boot-on; 198 regulator-always-on; 199 regulator-ramp-delay = <6250>; 200 }; 201 202 sw2_reg: sw2 { 203 regulator-min-microvolt = <800000>; 204 regulator-max-microvolt = <3300000>; 205 regulator-boot-on; 206 regulator-always-on; 207 }; 208 209 sw3a_reg: sw3a { 210 regulator-min-microvolt = <400000>; 211 regulator-max-microvolt = <1975000>; 212 regulator-boot-on; 213 regulator-always-on; 214 }; 215 216 sw3b_reg: sw3b { 217 regulator-min-microvolt = <400000>; 218 regulator-max-microvolt = <1975000>; 219 regulator-boot-on; 220 regulator-always-on; 221 }; 222 223 sw4_reg: sw4 { 224 regulator-min-microvolt = <800000>; 225 regulator-max-microvolt = <3300000>; 226 regulator-always-on; 227 }; 228 229 swbst_reg: swbst { 230 regulator-min-microvolt = <5000000>; 231 regulator-max-microvolt = <5150000>; 232 }; 233 234 snvs_reg: vsnvs { 235 regulator-min-microvolt = <1000000>; 236 regulator-max-microvolt = <3000000>; 237 regulator-boot-on; 238 regulator-always-on; 239 }; 240 241 vref_reg: vrefddr { 242 regulator-boot-on; 243 regulator-always-on; 244 }; 245 246 vgen1_reg: vgen1 { 247 regulator-min-microvolt = <800000>; 248 regulator-max-microvolt = <1550000>; 249 regulator-always-on; 250 }; 251 252 vgen2_reg: vgen2 { 253 regulator-min-microvolt = <800000>; 254 regulator-max-microvolt = <1550000>; 255 }; 256 257 vgen3_reg: vgen3 { 258 regulator-min-microvolt = <1800000>; 259 regulator-max-microvolt = <3300000>; 260 }; 261 262 vgen4_reg: vgen4 { 263 regulator-min-microvolt = <1800000>; 264 regulator-max-microvolt = <3300000>; 265 regulator-always-on; 266 }; 267 268 vgen5_reg: vgen5 { 269 regulator-min-microvolt = <1800000>; 270 regulator-max-microvolt = <3300000>; 271 regulator-always-on; 272 }; 273 274 vgen6_reg: vgen6 { 275 regulator-min-microvolt = <1800000>; 276 regulator-max-microvolt = <3300000>; 277 regulator-always-on; 278 }; 279 }; 280 }; 281}; 282 283&i2c3 { 284 clock-frequency = <100000>; 285 pinctrl-names = "default"; 286 pinctrl-0 = <&pinctrl_i2c3>; 287 status = "okay"; 288 289 wm8962: audio-codec@1a { 290 compatible = "wlf,wm8962"; 291 reg = <0x1a>; 292 clocks = <&clks IMX6SLL_CLK_EXTERN_AUDIO>; 293 DCVDD-supply = <&vgen3_reg>; 294 DBVDD-supply = <®_aud3v>; 295 AVDD-supply = <&vgen3_reg>; 296 CPVDD-supply = <&vgen3_reg>; 297 MICVDD-supply = <®_aud3v>; 298 PLLVDD-supply = <&vgen3_reg>; 299 SPKVDD1-supply = <®_aud4v>; 300 SPKVDD2-supply = <®_aud4v>; 301 }; 302}; 303 304&lcdif { 305 pinctrl-names = "default"; 306 pinctrl-0 = <&pinctrl_lcd>; 307 status = "okay"; 308 309 port { 310 display_out: endpoint { 311 remote-endpoint = <&panel_in>; 312 }; 313 }; 314}; 315 316&pwm1 { 317 pinctrl-names = "default"; 318 pinctrl-0 = <&pinctrl_pwm1>; 319}; 320 321&snvs_poweroff { 322 status = "okay"; 323}; 324 325&snvs_pwrkey { 326 status = "okay"; 327}; 328 329&ssi2 { 330 status = "okay"; 331}; 332 333&uart1 { 334 pinctrl-names = "default"; 335 pinctrl-0 = <&pinctrl_uart1>; 336 status = "okay"; 337}; 338 339&usdhc1 { 340 pinctrl-names = "default", "state_100mhz", "state_200mhz"; 341 pinctrl-0 = <&pinctrl_usdhc1>; 342 pinctrl-1 = <&pinctrl_usdhc1_100mhz>; 343 pinctrl-2 = <&pinctrl_usdhc1_200mhz>; 344 cd-gpios = <&gpio4 7 GPIO_ACTIVE_LOW>; 345 wp-gpios = <&gpio4 22 GPIO_ACTIVE_HIGH>; 346 keep-power-in-suspend; 347 wakeup-source; 348 vmmc-supply = <®_sd1_vmmc>; 349 status = "okay"; 350}; 351 352&usdhc2 { 353 pinctrl-names = "default", "state_100mhz", "state_200mhz"; 354 pinctrl-0 = <&pinctrl_usdhc2>; 355 pinctrl-1 = <&pinctrl_usdhc2_100mhz>; 356 pinctrl-2 = <&pinctrl_usdhc2_200mhz>; 357 bus-width = <8>; 358 non-removable; 359 vqmmc-supply = <®_sd2_vmmc>; 360 status = "okay"; 361}; 362 363&usbotg1 { 364 vbus-supply = <®_usb_otg1_vbus>; 365 pinctrl-names = "default"; 366 pinctrl-0 = <&pinctrl_usbotg1>; 367 disable-over-current; 368 srp-disable; 369 hnp-disable; 370 adp-disable; 371 status = "okay"; 372}; 373 374&usbotg2 { 375 vbus-supply = <®_usb_otg2_vbus>; 376 dr_mode = "host"; 377 disable-over-current; 378 status = "okay"; 379}; 380 381&usdhc3 { 382 pinctrl-names = "default", "state_100mhz", "state_200mhz"; 383 pinctrl-0 = <&pinctrl_usdhc3>; 384 pinctrl-1 = <&pinctrl_usdhc3_100mhz>; 385 pinctrl-2 = <&pinctrl_usdhc3_200mhz>; 386 cd-gpios = <&gpio3 22 GPIO_ACTIVE_LOW>; 387 keep-power-in-suspend; 388 wakeup-source; 389 vmmc-supply = <®_sd3_vmmc>; 390 status = "okay"; 391}; 392 393&wdog1 { 394 pinctrl-names = "default"; 395 pinctrl-0 = <&pinctrl_wdog1>; 396 fsl,ext-reset-output; 397}; 398 399&iomuxc { 400 pinctrl_audmux3: audmux3grp { 401 fsl,pins = < 402 MX6SLL_PAD_AUD_TXC__AUD3_TXC 0x4130b0 403 MX6SLL_PAD_AUD_TXFS__AUD3_TXFS 0x4130b0 404 MX6SLL_PAD_AUD_TXD__AUD3_TXD 0x4110b0 405 MX6SLL_PAD_AUD_RXD__AUD3_RXD 0x4130b0 406 MX6SLL_PAD_AUD_MCLK__AUDIO_CLK_OUT 0x4130b0 407 >; 408 }; 409 410 pinctrl_hp: hpgrp { 411 fsl,pins = < 412 MX6SLL_PAD_GPIO4_IO24__GPIO4_IO24 0x17059 /* HP DETECT */ 413 >; 414 }; 415 416 pinctrl_reg_sd3_vmmc: sd3vmmcgrp { 417 fsl,pins = < 418 MX6SLL_PAD_KEY_COL6__GPIO4_IO04 0x17059 419 >; 420 }; 421 422 pinctrl_usb_otg1_vbus: vbus1grp { 423 fsl,pins = < 424 MX6SLL_PAD_KEY_COL4__GPIO4_IO00 0x17059 425 >; 426 }; 427 428 pinctrl_usb_otg2_vbus: vbus2grp { 429 fsl,pins = < 430 MX6SLL_PAD_KEY_COL5__GPIO4_IO02 0x17059 431 >; 432 }; 433 434 pinctrl_reg_lcd_3v3: reglcd3v3grp { 435 fsl,pins = < 436 MX6SLL_PAD_KEY_ROW5__GPIO4_IO03 0x17059 437 >; 438 }; 439 440 pinctrl_reg_sd1_vmmc: sd1vmmcgrp { 441 fsl,pins = < 442 MX6SLL_PAD_KEY_COL3__GPIO3_IO30 0x17059 443 >; 444 }; 445 446 pinctrl_uart1: uart1grp { 447 fsl,pins = < 448 MX6SLL_PAD_UART1_TXD__UART1_DCE_TX 0x1b0b1 449 MX6SLL_PAD_UART1_RXD__UART1_DCE_RX 0x1b0b1 450 >; 451 }; 452 453 pinctrl_usdhc1: usdhc1grp { 454 fsl,pins = < 455 MX6SLL_PAD_SD1_CMD__SD1_CMD 0x17059 456 MX6SLL_PAD_SD1_CLK__SD1_CLK 0x13059 457 MX6SLL_PAD_SD1_DATA0__SD1_DATA0 0x17059 458 MX6SLL_PAD_SD1_DATA1__SD1_DATA1 0x17059 459 MX6SLL_PAD_SD1_DATA2__SD1_DATA2 0x17059 460 MX6SLL_PAD_SD1_DATA3__SD1_DATA3 0x17059 461 >; 462 }; 463 464 pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp { 465 fsl,pins = < 466 MX6SLL_PAD_SD1_CMD__SD1_CMD 0x170b9 467 MX6SLL_PAD_SD1_CLK__SD1_CLK 0x130b9 468 MX6SLL_PAD_SD1_DATA0__SD1_DATA0 0x170b9 469 MX6SLL_PAD_SD1_DATA1__SD1_DATA1 0x170b9 470 MX6SLL_PAD_SD1_DATA2__SD1_DATA2 0x170b9 471 MX6SLL_PAD_SD1_DATA3__SD1_DATA3 0x170b9 472 >; 473 }; 474 475 pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp { 476 fsl,pins = < 477 MX6SLL_PAD_SD1_CMD__SD1_CMD 0x170f9 478 MX6SLL_PAD_SD1_CLK__SD1_CLK 0x130f9 479 MX6SLL_PAD_SD1_DATA0__SD1_DATA0 0x170f9 480 MX6SLL_PAD_SD1_DATA1__SD1_DATA1 0x170f9 481 MX6SLL_PAD_SD1_DATA2__SD1_DATA2 0x170f9 482 MX6SLL_PAD_SD1_DATA3__SD1_DATA3 0x170f9 483 >; 484 }; 485 486 pinctrl_usdhc2: usdhc2grp { 487 fsl,pins = < 488 MX6SLL_PAD_SD2_CMD__SD2_CMD 0x17059 489 MX6SLL_PAD_SD2_CLK__SD2_CLK 0x13059 490 MX6SLL_PAD_SD2_DATA0__SD2_DATA0 0x17059 491 MX6SLL_PAD_SD2_DATA1__SD2_DATA1 0x17059 492 MX6SLL_PAD_SD2_DATA2__SD2_DATA2 0x17059 493 MX6SLL_PAD_SD2_DATA3__SD2_DATA3 0x17059 494 MX6SLL_PAD_SD2_DATA4__SD2_DATA4 0x17059 495 MX6SLL_PAD_SD2_DATA5__SD2_DATA5 0x17059 496 MX6SLL_PAD_SD2_DATA6__SD2_DATA6 0x17059 497 MX6SLL_PAD_SD2_DATA7__SD2_DATA7 0x17059 498 MX6SLL_PAD_GPIO4_IO21__SD2_STROBE 0x13059 499 >; 500 }; 501 502 pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp { 503 fsl,pins = < 504 MX6SLL_PAD_SD2_CMD__SD2_CMD 0x170b9 505 MX6SLL_PAD_SD2_CLK__SD2_CLK 0x130b9 506 MX6SLL_PAD_SD2_DATA0__SD2_DATA0 0x170b9 507 MX6SLL_PAD_SD2_DATA1__SD2_DATA1 0x170b9 508 MX6SLL_PAD_SD2_DATA2__SD2_DATA2 0x170b9 509 MX6SLL_PAD_SD2_DATA3__SD2_DATA3 0x170b9 510 MX6SLL_PAD_SD2_DATA4__SD2_DATA4 0x170b9 511 MX6SLL_PAD_SD2_DATA5__SD2_DATA5 0x170b9 512 MX6SLL_PAD_SD2_DATA6__SD2_DATA6 0x170b9 513 MX6SLL_PAD_SD2_DATA7__SD2_DATA7 0x170b9 514 MX6SLL_PAD_GPIO4_IO21__SD2_STROBE 0x130b9 515 >; 516 }; 517 518 pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp { 519 fsl,pins = < 520 MX6SLL_PAD_SD2_CMD__SD2_CMD 0x170f9 521 MX6SLL_PAD_SD2_CLK__SD2_CLK 0x130f9 522 MX6SLL_PAD_SD2_DATA0__SD2_DATA0 0x170f9 523 MX6SLL_PAD_SD2_DATA1__SD2_DATA1 0x170f9 524 MX6SLL_PAD_SD2_DATA2__SD2_DATA2 0x170f9 525 MX6SLL_PAD_SD2_DATA3__SD2_DATA3 0x170f9 526 MX6SLL_PAD_SD2_DATA4__SD2_DATA4 0x170f9 527 MX6SLL_PAD_SD2_DATA5__SD2_DATA5 0x170f9 528 MX6SLL_PAD_SD2_DATA6__SD2_DATA6 0x170f9 529 MX6SLL_PAD_SD2_DATA7__SD2_DATA7 0x170f9 530 MX6SLL_PAD_GPIO4_IO21__SD2_STROBE 0x130f9 531 >; 532 }; 533 534 pinctrl_usbotg1: usbotg1grp { 535 fsl,pins = < 536 MX6SLL_PAD_EPDC_PWR_COM__USB_OTG1_ID 0x17059 537 >; 538 }; 539 540 pinctrl_usdhc3: usdhc3grp { 541 fsl,pins = < 542 MX6SLL_PAD_SD3_CMD__SD3_CMD 0x17061 543 MX6SLL_PAD_SD3_CLK__SD3_CLK 0x13061 544 MX6SLL_PAD_SD3_DATA0__SD3_DATA0 0x17061 545 MX6SLL_PAD_SD3_DATA1__SD3_DATA1 0x17061 546 MX6SLL_PAD_SD3_DATA2__SD3_DATA2 0x17061 547 MX6SLL_PAD_SD3_DATA3__SD3_DATA3 0x17061 548 MX6SLL_PAD_REF_CLK_32K__GPIO3_IO22 0x17059 549 >; 550 }; 551 552 pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp { 553 fsl,pins = < 554 MX6SLL_PAD_SD3_CMD__SD3_CMD 0x170a1 555 MX6SLL_PAD_SD3_CLK__SD3_CLK 0x130a1 556 MX6SLL_PAD_SD3_DATA0__SD3_DATA0 0x170a1 557 MX6SLL_PAD_SD3_DATA1__SD3_DATA1 0x170a1 558 MX6SLL_PAD_SD3_DATA2__SD3_DATA2 0x170a1 559 MX6SLL_PAD_SD3_DATA3__SD3_DATA3 0x170a1 560 MX6SLL_PAD_REF_CLK_32K__GPIO3_IO22 0x17059 561 >; 562 }; 563 564 pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp { 565 fsl,pins = < 566 MX6SLL_PAD_SD3_CMD__SD3_CMD 0x170e9 567 MX6SLL_PAD_SD3_CLK__SD3_CLK 0x130f9 568 MX6SLL_PAD_SD3_DATA0__SD3_DATA0 0x170e9 569 MX6SLL_PAD_SD3_DATA1__SD3_DATA1 0x170e9 570 MX6SLL_PAD_SD3_DATA2__SD3_DATA2 0x170e9 571 MX6SLL_PAD_SD3_DATA3__SD3_DATA3 0x170e9 572 MX6SLL_PAD_REF_CLK_32K__GPIO3_IO22 0x17059 573 >; 574 }; 575 576 pinctrl_i2c1: i2c1grp { 577 fsl,pins = < 578 MX6SLL_PAD_I2C1_SCL__I2C1_SCL 0x4001b8b1 579 MX6SLL_PAD_I2C1_SDA__I2C1_SDA 0x4001b8b1 580 >; 581 }; 582 583 pinctrl_i2c3: i2c3grp { 584 fsl,pins = < 585 MX6SLL_PAD_AUD_RXFS__I2C3_SCL 0x4041b8b1 586 MX6SLL_PAD_AUD_RXC__I2C3_SDA 0x4041b8b1 587 >; 588 }; 589 590 pinctrl_lcd: lcdgrp { 591 fsl,pins = < 592 MX6SLL_PAD_LCD_DATA00__LCD_DATA00 0x79 593 MX6SLL_PAD_LCD_DATA01__LCD_DATA01 0x79 594 MX6SLL_PAD_LCD_DATA02__LCD_DATA02 0x79 595 MX6SLL_PAD_LCD_DATA03__LCD_DATA03 0x79 596 MX6SLL_PAD_LCD_DATA04__LCD_DATA04 0x79 597 MX6SLL_PAD_LCD_DATA05__LCD_DATA05 0x79 598 MX6SLL_PAD_LCD_DATA06__LCD_DATA06 0x79 599 MX6SLL_PAD_LCD_DATA07__LCD_DATA07 0x79 600 MX6SLL_PAD_LCD_DATA08__LCD_DATA08 0x79 601 MX6SLL_PAD_LCD_DATA09__LCD_DATA09 0x79 602 MX6SLL_PAD_LCD_DATA10__LCD_DATA10 0x79 603 MX6SLL_PAD_LCD_DATA11__LCD_DATA11 0x79 604 MX6SLL_PAD_LCD_DATA12__LCD_DATA12 0x79 605 MX6SLL_PAD_LCD_DATA13__LCD_DATA13 0x79 606 MX6SLL_PAD_LCD_DATA14__LCD_DATA14 0x79 607 MX6SLL_PAD_LCD_DATA15__LCD_DATA15 0x79 608 MX6SLL_PAD_LCD_DATA16__LCD_DATA16 0x79 609 MX6SLL_PAD_LCD_DATA17__LCD_DATA17 0x79 610 MX6SLL_PAD_LCD_DATA18__LCD_DATA18 0x79 611 MX6SLL_PAD_LCD_DATA19__LCD_DATA19 0x79 612 MX6SLL_PAD_LCD_DATA20__LCD_DATA20 0x79 613 MX6SLL_PAD_LCD_DATA21__LCD_DATA21 0x79 614 MX6SLL_PAD_LCD_DATA22__LCD_DATA22 0x79 615 MX6SLL_PAD_LCD_DATA23__LCD_DATA23 0x79 616 MX6SLL_PAD_LCD_CLK__LCD_CLK 0x79 617 MX6SLL_PAD_LCD_ENABLE__LCD_ENABLE 0x79 618 MX6SLL_PAD_LCD_HSYNC__LCD_HSYNC 0x79 619 MX6SLL_PAD_LCD_VSYNC__LCD_VSYNC 0x79 620 MX6SLL_PAD_LCD_RESET__LCD_RESET 0x79 621 >; 622 }; 623 624 pinctrl_led: ledgrp { 625 fsl,pins = < 626 MX6SLL_PAD_EPDC_VCOM1__GPIO2_IO04 0x17059 627 >; 628 }; 629 630 pinctrl_pwm1: pmw1grp { 631 fsl,pins = < 632 MX6SLL_PAD_PWM1__PWM1_OUT 0x110b0 633 >; 634 }; 635 636 pinctrl_wdog1: wdog1grp { 637 fsl,pins = < 638 MX6SLL_PAD_WDOG_B__WDOG1_B 0x170b0 639 >; 640 }; 641}; 642