1*724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0-or-later OR MIT 2*724ba675SRob Herring/* 3*724ba675SRob Herring * Copyright (c) 2021 Protonic Holland 4*724ba675SRob Herring */ 5*724ba675SRob Herring 6*724ba675SRob Herring/ { 7*724ba675SRob Herring gpio-keys { 8*724ba675SRob Herring compatible = "gpio-keys"; 9*724ba675SRob Herring pinctrl-names = "default"; 10*724ba675SRob Herring pinctrl-0 = <&pinctrl_gpiokeys>; 11*724ba675SRob Herring autorepeat; 12*724ba675SRob Herring 13*724ba675SRob Herring power-button { 14*724ba675SRob Herring label = "Power Button"; 15*724ba675SRob Herring gpios = <&gpio2 23 GPIO_ACTIVE_LOW>; 16*724ba675SRob Herring linux,code = <KEY_POWER>; 17*724ba675SRob Herring wakeup-source; 18*724ba675SRob Herring }; 19*724ba675SRob Herring }; 20*724ba675SRob Herring 21*724ba675SRob Herring panel { 22*724ba675SRob Herring compatible = "kyo,tcg121xglp"; 23*724ba675SRob Herring backlight = <&backlight_lcd>; 24*724ba675SRob Herring power-supply = <®_3v3>; 25*724ba675SRob Herring 26*724ba675SRob Herring port { 27*724ba675SRob Herring panel_in: endpoint { 28*724ba675SRob Herring remote-endpoint = <&lvds0_out>; 29*724ba675SRob Herring }; 30*724ba675SRob Herring }; 31*724ba675SRob Herring }; 32*724ba675SRob Herring}; 33*724ba675SRob Herring 34*724ba675SRob Herring&fec { 35*724ba675SRob Herring pinctrl-names = "default"; 36*724ba675SRob Herring pinctrl-0 = <&pinctrl_enet>; 37*724ba675SRob Herring phy-mode = "rgmii-id"; 38*724ba675SRob Herring phy-handle = <&rgmii_phy>; 39*724ba675SRob Herring status = "okay"; 40*724ba675SRob Herring 41*724ba675SRob Herring mdio { 42*724ba675SRob Herring #address-cells = <1>; 43*724ba675SRob Herring #size-cells = <0>; 44*724ba675SRob Herring 45*724ba675SRob Herring /* Microchip KSZ9031RNX PHY */ 46*724ba675SRob Herring rgmii_phy: ethernet-phy@0 { 47*724ba675SRob Herring reg = <0>; 48*724ba675SRob Herring interrupts-extended = <&gpio1 28 IRQ_TYPE_LEVEL_LOW>; 49*724ba675SRob Herring reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>; 50*724ba675SRob Herring reset-assert-us = <10000>; 51*724ba675SRob Herring reset-deassert-us = <300>; 52*724ba675SRob Herring }; 53*724ba675SRob Herring }; 54*724ba675SRob Herring}; 55*724ba675SRob Herring 56*724ba675SRob Herring&gpio1 { 57*724ba675SRob Herring gpio-line-names = 58*724ba675SRob Herring "CAN1_TERM", "SD1_CD", "ITU656_RESET", "CAM1_MIRROR", 59*724ba675SRob Herring "CAM2_MIRROR", "", "", "SMBALERT", 60*724ba675SRob Herring "DEBUG_0", "DEBUG_1", "", "", "", "", "", "", 61*724ba675SRob Herring "SD1_DATA0", "SD1_DATA1", "SD1_CMD", "SD1_DATA2", "SD1_CLK", 62*724ba675SRob Herring "SD1_DATA3", "ETH_MDIO", "", 63*724ba675SRob Herring "", "ETH_RESET", "", "", "ETH_INT", "", "", "ETH_MDC"; 64*724ba675SRob Herring}; 65*724ba675SRob Herring 66*724ba675SRob Herring&gpio4 { 67*724ba675SRob Herring gpio-line-names = 68*724ba675SRob Herring "", "", "", "", "", "", "UART4_TXD", "UART4_RXD", 69*724ba675SRob Herring "UART5_TXD", "UART5_RXD", "CAN1_TX", "CAN1_RX", "CAN1_SR", 70*724ba675SRob Herring "CAN2_SR", "CAN2_TX", "CAN2_RX", 71*724ba675SRob Herring "", "", "DIP1_FB", "", "VCAM_EN", "ON1_CTRL", "ON2_CTRL", 72*724ba675SRob Herring "HITCH_IN_OUT", 73*724ba675SRob Herring "LIGHT_ON", "", "", "CONTACT_IN", "BL_EN", "BL_PWM", "", 74*724ba675SRob Herring "ISB_LED"; 75*724ba675SRob Herring}; 76*724ba675SRob Herring 77*724ba675SRob Herring&gpio5 { 78*724ba675SRob Herring gpio-line-names = 79*724ba675SRob Herring "", "", "", "", "", "", "", "", 80*724ba675SRob Herring "", "", "", "", "", "", "", "", 81*724ba675SRob Herring "", "", "ITU656_CLK", "I2S_MCLK", "ITU656_PDN", "AUDIO_RESET", 82*724ba675SRob Herring "I2S_BITCLK", "I2S_DOUT", 83*724ba675SRob Herring "I2S_LRCLK", "I2S_DIN", "I2C1_SDA", "I2C1_SCL", "YACO_AUX_RX", 84*724ba675SRob Herring "YACO_AUX_TX", "ITU656_D0", "ITU656_D1"; 85*724ba675SRob Herring}; 86*724ba675SRob Herring 87*724ba675SRob Herring&gpio6 { 88*724ba675SRob Herring gpio-line-names = 89*724ba675SRob Herring "ITU656_D2", "ITU656_D3", "ITU656_D4", "ITU656_D5", 90*724ba675SRob Herring "ITU656_D6", "ITU656_D7", "", "", 91*724ba675SRob Herring "", "", "", "", "", "", "", "", 92*724ba675SRob Herring "", "", "", "RGMII_TXC", "RGMII_TD0", "RGMII_TD1", "RGMII_TD2", 93*724ba675SRob Herring "RGMII_TD3", 94*724ba675SRob Herring "RGMII_RX_CTL", "RGMII_RD0", "RGMII_TX_CTL", "RGMII_RD1", 95*724ba675SRob Herring "RGMII_RD2", "RGMII_RD3", "", ""; 96*724ba675SRob Herring}; 97*724ba675SRob Herring 98*724ba675SRob Herring&iomuxc { 99*724ba675SRob Herring pinctrl_enet: enetgrp { 100*724ba675SRob Herring fsl,pins = < 101*724ba675SRob Herring MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 102*724ba675SRob Herring MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030 103*724ba675SRob Herring MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030 104*724ba675SRob Herring MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 105*724ba675SRob Herring MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 106*724ba675SRob Herring MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030 107*724ba675SRob Herring MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x10030 108*724ba675SRob Herring MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x10030 109*724ba675SRob Herring MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x10030 110*724ba675SRob Herring MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x10030 111*724ba675SRob Herring MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x10030 112*724ba675SRob Herring MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x10030 113*724ba675SRob Herring MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x10030 114*724ba675SRob Herring MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x10030 115*724ba675SRob Herring MX6QDL_PAD_ENET_MDC__ENET_MDC 0x10030 116*724ba675SRob Herring /* Phy reset */ 117*724ba675SRob Herring MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x1b0b0 118*724ba675SRob Herring MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x1b0b1 119*724ba675SRob Herring >; 120*724ba675SRob Herring }; 121*724ba675SRob Herring 122*724ba675SRob Herring pinctrl_gpiokeys: gpiokeygrp { 123*724ba675SRob Herring fsl,pins = < 124*724ba675SRob Herring /* nON_SWITCH */ 125*724ba675SRob Herring MX6QDL_PAD_EIM_CS0__GPIO2_IO23 0x1b0b0 126*724ba675SRob Herring >; 127*724ba675SRob Herring }; 128*724ba675SRob Herring}; 129