xref: /linux/arch/arm/boot/dts/nxp/imx/imx6qdl-var-som.dtsi (revision 3a39d672e7f48b8d6b91a09afa4b55352773b4b5)
1e5c81084SJames Hilliard// SPDX-License-Identifier: GPL-2.0+
2e5c81084SJames Hilliard/*
3e5c81084SJames Hilliard * Support for Variscite VAR-SOM-MX6 Module
4e5c81084SJames Hilliard *
5e5c81084SJames Hilliard * Copyright 2011 Linaro Ltd.
6e5c81084SJames Hilliard * Copyright 2012 Freescale Semiconductor, Inc.
7e5c81084SJames Hilliard * Copyright (C) 2014-2016 Variscite, Ltd.
8e5c81084SJames Hilliard * Author: Donio Ron <ron.d@variscite.com>
9e5c81084SJames Hilliard * Copyright 2022 Bootlin
10e5c81084SJames Hilliard */
11e5c81084SJames Hilliard
12e5c81084SJames Hilliard/dts-v1/;
13e5c81084SJames Hilliard
14e5c81084SJames Hilliard#include "imx6q.dtsi"
15e5c81084SJames Hilliard#include <dt-bindings/clock/imx6qdl-clock.h>
16e5c81084SJames Hilliard#include <dt-bindings/gpio/gpio.h>
17e5c81084SJames Hilliard#include <dt-bindings/sound/fsl-imx-audmux.h>
18e5c81084SJames Hilliard
19e5c81084SJames Hilliard/ {
20e5c81084SJames Hilliard	model = "Variscite VAR-SOM-MX6 module";
21e5c81084SJames Hilliard	compatible = "variscite,var-som-imx6q", "fsl,imx6q";
22e5c81084SJames Hilliard
23e5c81084SJames Hilliard	chosen {
24e5c81084SJames Hilliard		stdout-path = &uart1;
25e5c81084SJames Hilliard	};
26e5c81084SJames Hilliard
27e5c81084SJames Hilliard	memory@10000000 {
28e5c81084SJames Hilliard		device_type = "memory";
29e5c81084SJames Hilliard		reg = <0x10000000 0x40000000>;
30e5c81084SJames Hilliard	};
31e5c81084SJames Hilliard
32e5c81084SJames Hilliard	reg_usb_otg_vbus: regulator-usb-otg-vbus {
33e5c81084SJames Hilliard		compatible = "regulator-fixed";
34e5c81084SJames Hilliard		regulator-name = "usb_otg_vbus";
35e5c81084SJames Hilliard		regulator-min-microvolt = <5000000>;
36e5c81084SJames Hilliard		regulator-max-microvolt = <5000000>;
37e5c81084SJames Hilliard	};
38e5c81084SJames Hilliard
39e5c81084SJames Hilliard	reg_usb_h1_vbus: regulator-usb-h1-vbud {
40e5c81084SJames Hilliard		compatible = "regulator-fixed";
41e5c81084SJames Hilliard		regulator-name = "usb_h1_vbus";
42e5c81084SJames Hilliard		regulator-min-microvolt = <5000000>;
43e5c81084SJames Hilliard		regulator-max-microvolt = <5000000>;
44e5c81084SJames Hilliard	};
45e5c81084SJames Hilliard
46e5c81084SJames Hilliard	reg_1p8v: regulator-1p8v {
47e5c81084SJames Hilliard		compatible = "regulator-fixed";
48e5c81084SJames Hilliard		regulator-name = "1P8V";
49e5c81084SJames Hilliard		regulator-min-microvolt = <1800000>;
50e5c81084SJames Hilliard		regulator-max-microvolt = <1800000>;
51e5c81084SJames Hilliard		regulator-always-on;
52e5c81084SJames Hilliard	};
53e5c81084SJames Hilliard
54e5c81084SJames Hilliard	reg_3p3v: regulator-3p3v {
55e5c81084SJames Hilliard		compatible = "regulator-fixed";
56e5c81084SJames Hilliard		regulator-name = "3P3V";
57e5c81084SJames Hilliard		regulator-min-microvolt = <3300000>;
58e5c81084SJames Hilliard		regulator-max-microvolt = <3300000>;
59e5c81084SJames Hilliard		regulator-always-on;
60e5c81084SJames Hilliard	};
61e5c81084SJames Hilliard
62e5c81084SJames Hilliard	reg_wl18xx_vmmc: regulator-wl18xx {
63e5c81084SJames Hilliard		compatible = "regulator-fixed";
64e5c81084SJames Hilliard		regulator-name = "vwl1807";
65e5c81084SJames Hilliard		regulator-min-microvolt = <1800000>;
66e5c81084SJames Hilliard		regulator-max-microvolt = <1800000>;
67e5c81084SJames Hilliard		gpio = <&gpio7 8 GPIO_ACTIVE_HIGH>;
68e5c81084SJames Hilliard		enable-active-high;
69e5c81084SJames Hilliard		startup-delay-us = <70000>;
70e5c81084SJames Hilliard	};
71e5c81084SJames Hilliard
72e5c81084SJames Hilliard	sound: sound {
73e5c81084SJames Hilliard		compatible = "simple-audio-card";
74e5c81084SJames Hilliard		simple-audio-card,name = "var-som-audio";
75e5c81084SJames Hilliard		simple-audio-card,format = "i2s";
76e5c81084SJames Hilliard		simple-audio-card,bitclock-master = <&sound_codec>;
77e5c81084SJames Hilliard		simple-audio-card,frame-master = <&sound_codec>;
78e5c81084SJames Hilliard		simple-audio-card,widgets = "Headphone", "Headphone Jack",
79e5c81084SJames Hilliard					    "Line", "Line In", "Microphone", "Mic Jack";
80e5c81084SJames Hilliard		simple-audio-card,routing = "Headphone Jack", "HPLOUT",
81e5c81084SJames Hilliard					    "Headphone Jack", "HPROUT",
82e5c81084SJames Hilliard					    "LINE1L", "Line In",
83e5c81084SJames Hilliard					    "LINE1R", "Line In";
84e5c81084SJames Hilliard
85e5c81084SJames Hilliard		sound_cpu: simple-audio-card,cpu {
86e5c81084SJames Hilliard			sound-dai = <&ssi2>;
87e5c81084SJames Hilliard		};
88e5c81084SJames Hilliard
89e5c81084SJames Hilliard		sound_codec: simple-audio-card,codec {
90e5c81084SJames Hilliard			sound-dai = <&tlv320aic3106>;
91e5c81084SJames Hilliard			clocks = <&clks IMX6QDL_CLK_CKO>;
92e5c81084SJames Hilliard		};
93e5c81084SJames Hilliard	};
94e5c81084SJames Hilliard
95e5c81084SJames Hilliard	rfkill {
96e5c81084SJames Hilliard		compatible = "rfkill-gpio";
97e5c81084SJames Hilliard		name = "rfkill";
98e5c81084SJames Hilliard		radio-type = "bluetooth";
99e5c81084SJames Hilliard		shutdown-gpios = <&gpio6 18 GPIO_ACTIVE_HIGH>;
100e5c81084SJames Hilliard	};
101e5c81084SJames Hilliard};
102e5c81084SJames Hilliard
103e5c81084SJames Hilliard&audmux {
104e5c81084SJames Hilliard	pinctrl-names = "default";
105e5c81084SJames Hilliard	pinctrl-0 = <&pinctrl_audmux>;
106e5c81084SJames Hilliard	status = "okay";
107e5c81084SJames Hilliard
108e5c81084SJames Hilliard	mux-ssi2 {
109e5c81084SJames Hilliard		fsl,audmux-port = <1>;
110e5c81084SJames Hilliard		fsl,port-config = <
111e5c81084SJames Hilliard			(IMX_AUDMUX_V2_PTCR_SYN |
112e5c81084SJames Hilliard			IMX_AUDMUX_V2_PTCR_TFSDIR |
113e5c81084SJames Hilliard			IMX_AUDMUX_V2_PTCR_TFSEL(2) |
114e5c81084SJames Hilliard			IMX_AUDMUX_V2_PTCR_TCLKDIR |
115e5c81084SJames Hilliard			IMX_AUDMUX_V2_PTCR_TCSEL(2))
116e5c81084SJames Hilliard			IMX_AUDMUX_V2_PDCR_RXDSEL(2)
117e5c81084SJames Hilliard		>;
118e5c81084SJames Hilliard	};
119e5c81084SJames Hilliard
120e5c81084SJames Hilliard	mux-aud3 {
121e5c81084SJames Hilliard		fsl,audmux-port = <2>;
122e5c81084SJames Hilliard		fsl,port-config = <
123e5c81084SJames Hilliard			IMX_AUDMUX_V2_PTCR_SYN
124e5c81084SJames Hilliard			IMX_AUDMUX_V2_PDCR_RXDSEL(1)
125e5c81084SJames Hilliard		>;
126e5c81084SJames Hilliard	};
127e5c81084SJames Hilliard};
128e5c81084SJames Hilliard
129e5c81084SJames Hilliard&ecspi3 {
130e5c81084SJames Hilliard	pinctrl-names = "default";
131e5c81084SJames Hilliard	pinctrl-0 = <&pinctrl_ecspi3>;
132e5c81084SJames Hilliard	cs-gpios = <&gpio4 24 GPIO_ACTIVE_LOW>;
133e5c81084SJames Hilliard	status = "okay";
134e5c81084SJames Hilliard};
135e5c81084SJames Hilliard
136e5c81084SJames Hilliard&fec {
137e5c81084SJames Hilliard	pinctrl-names = "default";
138e5c81084SJames Hilliard	pinctrl-0 = <&pinctrl_enet>;
139e5c81084SJames Hilliard	phy-mode = "rgmii";
140e5c81084SJames Hilliard	phy-handle = <&rgmii_phy>;
141e5c81084SJames Hilliard	status = "okay";
142e5c81084SJames Hilliard
143e5c81084SJames Hilliard	mdio {
144e5c81084SJames Hilliard		#address-cells = <1>;
145e5c81084SJames Hilliard		#size-cells = <0>;
146e5c81084SJames Hilliard
147e5c81084SJames Hilliard		rgmii_phy: ethernet-phy@7 {
148e5c81084SJames Hilliard			reg = <7>;
149e5c81084SJames Hilliard			reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
150e5c81084SJames Hilliard			reset-assert-us = <10000>;
151e5c81084SJames Hilliard		};
152e5c81084SJames Hilliard	};
153e5c81084SJames Hilliard};
154e5c81084SJames Hilliard
155e5c81084SJames Hilliard&gpmi {
156e5c81084SJames Hilliard	pinctrl-names = "default";
157e5c81084SJames Hilliard	pinctrl-0 = <&pinctrl_gpmi_nand>;
158e5c81084SJames Hilliard	status = "okay";
159e5c81084SJames Hilliard};
160e5c81084SJames Hilliard
161e5c81084SJames Hilliard&i2c2 {
162e5c81084SJames Hilliard	clock-frequency = <100000>;
163e5c81084SJames Hilliard	pinctrl-names = "default";
164e5c81084SJames Hilliard	pinctrl-0 = <&pinctrl_i2c2>;
165e5c81084SJames Hilliard	status = "okay";
166e5c81084SJames Hilliard
167e5c81084SJames Hilliard	pmic@8 {
168e5c81084SJames Hilliard		compatible = "fsl,pfuze100";
169e5c81084SJames Hilliard		reg = <0x08>;
170e5c81084SJames Hilliard		pinctrl-names = "default";
171e5c81084SJames Hilliard		pinctrl-0 = <&pinctrl_pmic>;
172e5c81084SJames Hilliard
173e5c81084SJames Hilliard		regulators {
174e5c81084SJames Hilliard			sw1a_reg: sw1ab {
175e5c81084SJames Hilliard				regulator-min-microvolt = <300000>;
176e5c81084SJames Hilliard				regulator-max-microvolt = <1875000>;
177e5c81084SJames Hilliard				regulator-boot-on;
178e5c81084SJames Hilliard				regulator-always-on;
179e5c81084SJames Hilliard				regulator-ramp-delay = <6250>;
180e5c81084SJames Hilliard			};
181e5c81084SJames Hilliard
182e5c81084SJames Hilliard			sw1c_reg: sw1c {
183e5c81084SJames Hilliard				regulator-min-microvolt = <300000>;
184e5c81084SJames Hilliard				regulator-max-microvolt = <1875000>;
185e5c81084SJames Hilliard				regulator-boot-on;
186e5c81084SJames Hilliard				regulator-always-on;
187e5c81084SJames Hilliard				regulator-ramp-delay = <6250>;
188e5c81084SJames Hilliard			};
189e5c81084SJames Hilliard
190e5c81084SJames Hilliard			sw2_reg: sw2 {
191e5c81084SJames Hilliard				regulator-min-microvolt = <800000>;
192e5c81084SJames Hilliard				regulator-max-microvolt = <3300000>;
193e5c81084SJames Hilliard				regulator-boot-on;
194e5c81084SJames Hilliard				regulator-always-on;
195e5c81084SJames Hilliard			};
196e5c81084SJames Hilliard
197e5c81084SJames Hilliard			sw3a_reg: sw3a {
198e5c81084SJames Hilliard				regulator-min-microvolt = <800000>;
199e5c81084SJames Hilliard				regulator-max-microvolt = <3950000>;
200e5c81084SJames Hilliard				regulator-boot-on;
201e5c81084SJames Hilliard				regulator-always-on;
202e5c81084SJames Hilliard			};
203e5c81084SJames Hilliard
204e5c81084SJames Hilliard			sw3b_reg: sw3b {
205e5c81084SJames Hilliard				regulator-min-microvolt = <800000>;
206e5c81084SJames Hilliard				regulator-max-microvolt = <3950000>;
207e5c81084SJames Hilliard				regulator-boot-on;
208e5c81084SJames Hilliard				regulator-always-on;
209e5c81084SJames Hilliard			};
210e5c81084SJames Hilliard
211e5c81084SJames Hilliard			sw4_reg: sw4 {
212e5c81084SJames Hilliard				regulator-min-microvolt = <800000>;
213e5c81084SJames Hilliard				regulator-max-microvolt = <3950000>;
214e5c81084SJames Hilliard			};
215e5c81084SJames Hilliard
216e5c81084SJames Hilliard			snvs_reg: vsnvs {
217e5c81084SJames Hilliard				regulator-min-microvolt = <1200000>;
218e5c81084SJames Hilliard				regulator-max-microvolt = <3000000>;
219e5c81084SJames Hilliard				regulator-boot-on;
220e5c81084SJames Hilliard				regulator-always-on;
221e5c81084SJames Hilliard			};
222e5c81084SJames Hilliard
223e5c81084SJames Hilliard			vref_reg: vrefddr {
224e5c81084SJames Hilliard				regulator-boot-on;
225e5c81084SJames Hilliard				regulator-always-on;
226e5c81084SJames Hilliard			};
227e5c81084SJames Hilliard
228e5c81084SJames Hilliard			vgen1_reg: vgen1 {
229e5c81084SJames Hilliard				regulator-min-microvolt = <800000>;
230e5c81084SJames Hilliard				regulator-max-microvolt = <1550000>;
231e5c81084SJames Hilliard			};
232e5c81084SJames Hilliard
233e5c81084SJames Hilliard			vgen2_reg: vgen2 {
234e5c81084SJames Hilliard				regulator-min-microvolt = <800000>;
235e5c81084SJames Hilliard				regulator-max-microvolt = <1550000>;
236e5c81084SJames Hilliard			};
237e5c81084SJames Hilliard
238e5c81084SJames Hilliard			vgen3_reg: vgen3 {
239e5c81084SJames Hilliard				regulator-min-microvolt = <1800000>;
240e5c81084SJames Hilliard				regulator-max-microvolt = <3300000>;
241e5c81084SJames Hilliard				regulator-always-on;
242e5c81084SJames Hilliard				regulator-boot-on;
243e5c81084SJames Hilliard			};
244e5c81084SJames Hilliard
245e5c81084SJames Hilliard			vgen4_reg: vgen4 {
246e5c81084SJames Hilliard				regulator-min-microvolt = <1800000>;
247e5c81084SJames Hilliard				regulator-max-microvolt = <3300000>;
248e5c81084SJames Hilliard				regulator-always-on;
249e5c81084SJames Hilliard				regulator-boot-on;
250e5c81084SJames Hilliard			};
251e5c81084SJames Hilliard
252e5c81084SJames Hilliard			vgen5_reg: vgen5 {
253e5c81084SJames Hilliard				regulator-min-microvolt = <1800000>;
254e5c81084SJames Hilliard				regulator-max-microvolt = <3300000>;
255e5c81084SJames Hilliard				regulator-always-on;
256e5c81084SJames Hilliard				regulator-boot-on;
257e5c81084SJames Hilliard			};
258e5c81084SJames Hilliard
259e5c81084SJames Hilliard			vgen6_reg: vgen6 {
260e5c81084SJames Hilliard				regulator-min-microvolt = <2800000>;
261e5c81084SJames Hilliard				regulator-max-microvolt = <2800000>;
262e5c81084SJames Hilliard				regulator-always-on;
263e5c81084SJames Hilliard				regulator-boot-on;
264e5c81084SJames Hilliard			};
265e5c81084SJames Hilliard		};
266e5c81084SJames Hilliard	};
267e5c81084SJames Hilliard
268e5c81084SJames Hilliard	tlv320aic3106: audio-codec@1b {
269e5c81084SJames Hilliard		compatible = "ti,tlv320aic3106";
270e5c81084SJames Hilliard		reg = <0x1b>;
271e5c81084SJames Hilliard		#sound-dai-cells = <0>;
272e5c81084SJames Hilliard		DRVDD-supply = <&reg_3p3v>;
273e5c81084SJames Hilliard		AVDD-supply = <&reg_3p3v>;
274e5c81084SJames Hilliard		IOVDD-supply = <&reg_3p3v>;
275e5c81084SJames Hilliard		DVDD-supply = <&reg_1p8v>;
276e5c81084SJames Hilliard		ai3x-ocmv = <0>;
277e5c81084SJames Hilliard		reset-gpios = <&gpio4 5 GPIO_ACTIVE_LOW>;
278e5c81084SJames Hilliard		ai3x-gpio-func = <
279e5c81084SJames Hilliard			0 /* AIC3X_GPIO1_FUNC_DISABLED */
280e5c81084SJames Hilliard			5 /* AIC3X_GPIO2_FUNC_DIGITAL_MIC_INPUT */
281e5c81084SJames Hilliard		>;
282e5c81084SJames Hilliard	};
283e5c81084SJames Hilliard};
284e5c81084SJames Hilliard
285e5c81084SJames Hilliard&iomuxc {
286e5c81084SJames Hilliard	pinctrl-names = "default";
287e5c81084SJames Hilliard	pinctrl-0 = <&pinctrl_hog>;
288e5c81084SJames Hilliard
289e5c81084SJames Hilliard	pinctrl_audmux: audmuxgrp {
290e5c81084SJames Hilliard		fsl,pins = <
291e5c81084SJames Hilliard			MX6QDL_PAD_CSI0_DAT7__AUD3_RXD		0x130b0
292e5c81084SJames Hilliard			MX6QDL_PAD_CSI0_DAT4__AUD3_TXC		0x130b0
293e5c81084SJames Hilliard			MX6QDL_PAD_CSI0_DAT5__AUD3_TXD		0x110b0
294e5c81084SJames Hilliard			MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS		0x130b0
295e5c81084SJames Hilliard			/* Audio Clock */
296e5c81084SJames Hilliard			MX6QDL_PAD_GPIO_0__CCM_CLKO1		0x130b0
297e5c81084SJames Hilliard		>;
298e5c81084SJames Hilliard	};
299e5c81084SJames Hilliard
300e5c81084SJames Hilliard	pinctrl_bt: btgrp {
301e5c81084SJames Hilliard		fsl,pins = <
302e5c81084SJames Hilliard			/* Bluetooth/wifi enable */
303e5c81084SJames Hilliard			MX6QDL_PAD_SD3_DAT6__GPIO6_IO18		0x1b0b1
304e5c81084SJames Hilliard			/* Wifi Slow Clock */
305e5c81084SJames Hilliard			MX6QDL_PAD_ENET_RXD0__OSC32K_32K_OUT	0x000b0
306e5c81084SJames Hilliard		>;
307e5c81084SJames Hilliard	};
308e5c81084SJames Hilliard
309e5c81084SJames Hilliard	pinctrl_ecspi3: ecspi3grp {
310e5c81084SJames Hilliard		fsl,pins = <
311e5c81084SJames Hilliard			MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO	0x100b1
312e5c81084SJames Hilliard			MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI	0x100b1
313e5c81084SJames Hilliard			MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK	0x100b1
314e5c81084SJames Hilliard		>;
315e5c81084SJames Hilliard	};
316e5c81084SJames Hilliard
317e5c81084SJames Hilliard	pinctrl_enet: enetgrp {
318e5c81084SJames Hilliard		fsl,pins = <
319e5c81084SJames Hilliard			MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b0b0
320e5c81084SJames Hilliard			MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0
321e5c81084SJames Hilliard			MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x1b0b0
322e5c81084SJames Hilliard			MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x1b0b0
323e5c81084SJames Hilliard			MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x1b0b0
324e5c81084SJames Hilliard			MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x1b0b0
325e5c81084SJames Hilliard			MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x1b0b0
326e5c81084SJames Hilliard			MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x1b0b0
327e5c81084SJames Hilliard			MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x1b0b0
328e5c81084SJames Hilliard			MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b0b0
329e5c81084SJames Hilliard			MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x1b0b0
330e5c81084SJames Hilliard			MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x1b0b0
331e5c81084SJames Hilliard			MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b0b0
332e5c81084SJames Hilliard			MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b0b0
333e5c81084SJames Hilliard			MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x1b0b0
334e5c81084SJames Hilliard		>;
335e5c81084SJames Hilliard	};
336e5c81084SJames Hilliard
337e5c81084SJames Hilliard	pinctrl_enet_irq: enetirqgrp {
338e5c81084SJames Hilliard		fsl,pins = <
339e5c81084SJames Hilliard			MX6QDL_PAD_GPIO_6__ENET_IRQ	0x000b1
340e5c81084SJames Hilliard		>;
341e5c81084SJames Hilliard	};
342e5c81084SJames Hilliard
343e5c81084SJames Hilliard	pinctrl_gpmi_nand: gpminandgrp {
344e5c81084SJames Hilliard		fsl,pins = <
345e5c81084SJames Hilliard			MX6QDL_PAD_NANDF_CLE__NAND_CLE		0xb0b1
346e5c81084SJames Hilliard			MX6QDL_PAD_NANDF_ALE__NAND_ALE		0xb0b1
347e5c81084SJames Hilliard			MX6QDL_PAD_NANDF_CS0__NAND_CE0_B	0xb0b1
348e5c81084SJames Hilliard			MX6QDL_PAD_NANDF_CS1__NAND_CE1_B	0xb0b1
349e5c81084SJames Hilliard			MX6QDL_PAD_NANDF_RB0__NAND_READY_B	0xb0b1
350e5c81084SJames Hilliard			MX6QDL_PAD_NANDF_D0__NAND_DATA00	0xb0b1
351e5c81084SJames Hilliard			MX6QDL_PAD_NANDF_D1__NAND_DATA01	0xb0b1
352e5c81084SJames Hilliard			MX6QDL_PAD_NANDF_D2__NAND_DATA02	0xb0b1
353e5c81084SJames Hilliard			MX6QDL_PAD_NANDF_D3__NAND_DATA03	0xb0b1
354e5c81084SJames Hilliard			MX6QDL_PAD_NANDF_D4__NAND_DATA04	0xb0b1
355e5c81084SJames Hilliard			MX6QDL_PAD_NANDF_D5__NAND_DATA05	0xb0b1
356e5c81084SJames Hilliard			MX6QDL_PAD_NANDF_D6__NAND_DATA06	0xb0b1
357e5c81084SJames Hilliard			MX6QDL_PAD_NANDF_D7__NAND_DATA07	0xb0b1
358e5c81084SJames Hilliard			MX6QDL_PAD_SD4_CMD__NAND_RE_B		0xb0b1
359e5c81084SJames Hilliard			MX6QDL_PAD_SD4_CLK__NAND_WE_B		0xb0b1
360e5c81084SJames Hilliard			MX6QDL_PAD_NANDF_WP_B__NAND_WP_B	0xb0b1
361e5c81084SJames Hilliard		>;
362e5c81084SJames Hilliard	};
363e5c81084SJames Hilliard
364e5c81084SJames Hilliard	pinctrl_hog: hoggrp {
365e5c81084SJames Hilliard		fsl,pins = <
366e5c81084SJames Hilliard			/* CTW6120 IRQ */
367e5c81084SJames Hilliard			MX6QDL_PAD_EIM_DA7__GPIO3_IO07		0xb0b1
368e5c81084SJames Hilliard			/* SDMMC2 CD/WP */
369e5c81084SJames Hilliard			MX6QDL_PAD_KEY_COL4__GPIO4_IO14		0x1b0b0
370e5c81084SJames Hilliard			MX6QDL_PAD_KEY_ROW4__GPIO4_IO15		0x1b0b0
371e5c81084SJames Hilliard		>;
372e5c81084SJames Hilliard	};
373e5c81084SJames Hilliard
374e5c81084SJames Hilliard	pinctrl_i2c1: i2c1grp {
375e5c81084SJames Hilliard		fsl,pins = <
376e5c81084SJames Hilliard			MX6QDL_PAD_CSI0_DAT8__I2C1_SDA	0x4001b8b1
377e5c81084SJames Hilliard			MX6QDL_PAD_CSI0_DAT9__I2C1_SCL	0x4001b8b1
378e5c81084SJames Hilliard		>;
379e5c81084SJames Hilliard	};
380e5c81084SJames Hilliard
381e5c81084SJames Hilliard	pinctrl_i2c2: i2c2grp {
382e5c81084SJames Hilliard		fsl,pins = <
383e5c81084SJames Hilliard			MX6QDL_PAD_KEY_COL3__I2C2_SCL	0x4001b8b1
384e5c81084SJames Hilliard			MX6QDL_PAD_KEY_ROW3__I2C2_SDA	0x4001b8b1
385e5c81084SJames Hilliard		>;
386e5c81084SJames Hilliard	};
387e5c81084SJames Hilliard
388e5c81084SJames Hilliard	pinctrl_i2c3: i2c3grp {
389e5c81084SJames Hilliard		fsl,pins = <
390e5c81084SJames Hilliard			MX6QDL_PAD_GPIO_5__I2C3_SCL	0x4001b8b1
391e5c81084SJames Hilliard			MX6QDL_PAD_GPIO_16__I2C3_SDA	0x4001b8b1
392e5c81084SJames Hilliard		>;
393e5c81084SJames Hilliard	};
394e5c81084SJames Hilliard
395e5c81084SJames Hilliard	pinctrl_pmic: pmicgrp {
396e5c81084SJames Hilliard		fsl,pins = <
397e5c81084SJames Hilliard			/* PMIC INT */
398e5c81084SJames Hilliard			MX6QDL_PAD_GPIO_17__GPIO7_IO12	0x1b0b0
399e5c81084SJames Hilliard		>;
400e5c81084SJames Hilliard	};
401e5c81084SJames Hilliard
402e5c81084SJames Hilliard	pinctrl_pwm2: pwm2grp {
403e5c81084SJames Hilliard		fsl,pins = <
404e5c81084SJames Hilliard			MX6QDL_PAD_DISP0_DAT9__PWM2_OUT	0x1b0b1
405e5c81084SJames Hilliard		>;
406e5c81084SJames Hilliard	};
407e5c81084SJames Hilliard
408e5c81084SJames Hilliard	pinctrl_uart1: uart1grp {
409e5c81084SJames Hilliard		fsl,pins = <
410e5c81084SJames Hilliard			MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
411e5c81084SJames Hilliard			MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
412e5c81084SJames Hilliard		>;
413e5c81084SJames Hilliard	};
414e5c81084SJames Hilliard
415e5c81084SJames Hilliard	pinctrl_uart2: uart2grp {
416e5c81084SJames Hilliard		fsl,pins = <
417e5c81084SJames Hilliard			MX6QDL_PAD_SD3_DAT4__UART2_RX_DATA	0x1b0b1
418e5c81084SJames Hilliard			MX6QDL_PAD_SD3_DAT5__UART2_TX_DATA	0x1b0b1
419e5c81084SJames Hilliard			MX6QDL_PAD_EIM_D28__UART2_CTS_B		0x1b0b1
420e5c81084SJames Hilliard			MX6QDL_PAD_EIM_D29__UART2_RTS_B		0x1b0b1
421e5c81084SJames Hilliard		>;
422e5c81084SJames Hilliard	};
423e5c81084SJames Hilliard
424e5c81084SJames Hilliard	pinctrl_usdhc3: usdhc3grp {
425e5c81084SJames Hilliard		fsl,pins = <
426e5c81084SJames Hilliard			MX6QDL_PAD_SD3_CMD__SD3_CMD	0x17069
427e5c81084SJames Hilliard			MX6QDL_PAD_SD3_CLK__SD3_CLK	0x10069
428e5c81084SJames Hilliard			MX6QDL_PAD_SD3_DAT0__SD3_DATA0	0x17069
429e5c81084SJames Hilliard			MX6QDL_PAD_SD3_DAT1__SD3_DATA1	0x17069
430e5c81084SJames Hilliard			MX6QDL_PAD_SD3_DAT2__SD3_DATA2	0x17069
431e5c81084SJames Hilliard			MX6QDL_PAD_SD3_DAT3__SD3_DATA3	0x17069
432e5c81084SJames Hilliard			/* WL_EN */
433e5c81084SJames Hilliard			MX6QDL_PAD_SD3_DAT7__GPIO6_IO17 0x13059
434e5c81084SJames Hilliard			/* WL_IRQ */
435e5c81084SJames Hilliard			MX6QDL_PAD_SD3_RST__GPIO7_IO08  0x13059
436e5c81084SJames Hilliard		>;
437e5c81084SJames Hilliard	};
438e5c81084SJames Hilliard
439*79691288SKrzysztof Kozlowski	pinctrl_usdhc3_100mhz: usdhc3-100mhz-grp {
440e5c81084SJames Hilliard		fsl,pins = <
441e5c81084SJames Hilliard			MX6QDL_PAD_SD3_CMD__SD3_CMD	0x170B9
442e5c81084SJames Hilliard			MX6QDL_PAD_SD3_CLK__SD3_CLK	0x100B9
443e5c81084SJames Hilliard			MX6QDL_PAD_SD3_DAT0__SD3_DATA0	0x170B9
444e5c81084SJames Hilliard			MX6QDL_PAD_SD3_DAT1__SD3_DATA1	0x170B9
445e5c81084SJames Hilliard			MX6QDL_PAD_SD3_DAT3__SD3_DATA3	0x170B9
446e5c81084SJames Hilliard			MX6QDL_PAD_SD3_DAT3__SD3_DATA3	0x170B9
447e5c81084SJames Hilliard			/* WL_EN */
448e5c81084SJames Hilliard			MX6QDL_PAD_SD3_DAT7__GPIO6_IO17 0x130B9
449e5c81084SJames Hilliard			/* WL_IRQ */
450e5c81084SJames Hilliard			MX6QDL_PAD_SD3_RST__GPIO7_IO08  0x130B9
451e5c81084SJames Hilliard		>;
452e5c81084SJames Hilliard	};
453e5c81084SJames Hilliard
454*79691288SKrzysztof Kozlowski	pinctrl_usdhc3_200mhz: usdhc3-200mhz-grp {
455e5c81084SJames Hilliard		fsl,pins = <
456e5c81084SJames Hilliard			MX6QDL_PAD_SD3_CMD__SD3_CMD	0x170F9
457e5c81084SJames Hilliard			MX6QDL_PAD_SD3_CLK__SD3_CLK	0x100F9
458e5c81084SJames Hilliard			MX6QDL_PAD_SD3_DAT0__SD3_DATA0	0x170F9
459e5c81084SJames Hilliard			MX6QDL_PAD_SD3_DAT1__SD3_DATA1	0x170F9
460e5c81084SJames Hilliard			MX6QDL_PAD_SD3_DAT2__SD3_DATA2	0x170F9
461e5c81084SJames Hilliard			MX6QDL_PAD_SD3_DAT3__SD3_DATA3	0x170F9
462e5c81084SJames Hilliard			/* WL_EN */
463e5c81084SJames Hilliard			MX6QDL_PAD_SD3_DAT7__GPIO6_IO17 0x130F9
464e5c81084SJames Hilliard			/* WL_IRQ */
465e5c81084SJames Hilliard			MX6QDL_PAD_SD3_RST__GPIO7_IO08  0x130F9
466e5c81084SJames Hilliard		>;
467e5c81084SJames Hilliard	};
468e5c81084SJames Hilliard};
469e5c81084SJames Hilliard
470e5c81084SJames Hilliard&pwm2 {
471e5c81084SJames Hilliard	pinctrl-names = "default";
472e5c81084SJames Hilliard	pinctrl-0 = <&pinctrl_pwm2>;
473e5c81084SJames Hilliard	status = "okay";
474e5c81084SJames Hilliard};
475e5c81084SJames Hilliard
476e5c81084SJames Hilliard&reg_arm {
477e5c81084SJames Hilliard	vin-supply = <&sw1a_reg>;
478e5c81084SJames Hilliard};
479e5c81084SJames Hilliard
480e5c81084SJames Hilliard&reg_pu {
481e5c81084SJames Hilliard	vin-supply = <&sw1c_reg>;
482e5c81084SJames Hilliard};
483e5c81084SJames Hilliard
484e5c81084SJames Hilliard&reg_soc {
485e5c81084SJames Hilliard	vin-supply = <&sw1c_reg>;
486e5c81084SJames Hilliard};
487e5c81084SJames Hilliard
488e5c81084SJames Hilliard&reg_vdd1p1 {
489e5c81084SJames Hilliard	vin-supply = <&vgen5_reg>;
490e5c81084SJames Hilliard};
491e5c81084SJames Hilliard
492e5c81084SJames Hilliard&reg_vdd2p5 {
493e5c81084SJames Hilliard	vin-supply = <&vgen5_reg>;
494e5c81084SJames Hilliard};
495e5c81084SJames Hilliard
496e5c81084SJames Hilliard&snvs_poweroff {
497e5c81084SJames Hilliard	status = "okay";
498e5c81084SJames Hilliard};
499e5c81084SJames Hilliard
500e5c81084SJames Hilliard&ssi2 {
501e5c81084SJames Hilliard	status = "okay";
502e5c81084SJames Hilliard};
503e5c81084SJames Hilliard
504e5c81084SJames Hilliard&uart1 {
505e5c81084SJames Hilliard	pinctrl-names = "default";
506e5c81084SJames Hilliard	pinctrl-0 = <&pinctrl_uart1>;
507e5c81084SJames Hilliard	status = "okay";
508e5c81084SJames Hilliard};
509e5c81084SJames Hilliard
510e5c81084SJames Hilliard&uart2 {
511e5c81084SJames Hilliard	pinctrl-names = "default";
512e5c81084SJames Hilliard	pinctrl-0 = <&pinctrl_uart2 &pinctrl_bt>;
513e5c81084SJames Hilliard	uart-has-rtscts;
514e5c81084SJames Hilliard	status = "okay";
515e5c81084SJames Hilliard};
516e5c81084SJames Hilliard
517e5c81084SJames Hilliard&usbh1 {
518e5c81084SJames Hilliard	vbus-supply = <&reg_usb_h1_vbus>;
519e5c81084SJames Hilliard	status = "okay";
520e5c81084SJames Hilliard};
521e5c81084SJames Hilliard
522e5c81084SJames Hilliard&usbotg {
523e5c81084SJames Hilliard	vbus-supply = <&reg_usb_otg_vbus>;
524e5c81084SJames Hilliard	pinctrl-names = "default";
525e5c81084SJames Hilliard	pinctrl-0 = <&pinctrl_usbotg_var>;
526e5c81084SJames Hilliard	disable-over-current;
527e5c81084SJames Hilliard	dr_mode = "host";
528e5c81084SJames Hilliard	status = "okay";
529e5c81084SJames Hilliard};
530e5c81084SJames Hilliard
531e5c81084SJames Hilliard&usbphy1 {
532e5c81084SJames Hilliard	fsl,tx-d-cal = <0x5>;
533e5c81084SJames Hilliard};
534e5c81084SJames Hilliard
535e5c81084SJames Hilliard&usbphy2 {
536e5c81084SJames Hilliard	fsl,tx-d-cal = <0x5>;
537e5c81084SJames Hilliard};
538e5c81084SJames Hilliard
539e5c81084SJames Hilliard&usdhc1 {
540e5c81084SJames Hilliard	pinctrl-names = "default";
541e5c81084SJames Hilliard	pinctrl-0 = <&pinctrl_usdhc1>;
542e5c81084SJames Hilliard	non-removable;
543e5c81084SJames Hilliard	keep-power-in-suspend;
544e5c81084SJames Hilliard	status = "okay";
545e5c81084SJames Hilliard};
546e5c81084SJames Hilliard
547e5c81084SJames Hilliard&usdhc3 {
548e5c81084SJames Hilliard	pinctrl-names = "default", "state_100mhz", "state_200mhz";
549e5c81084SJames Hilliard	pinctrl-0 = <&pinctrl_usdhc3>;
550e5c81084SJames Hilliard	pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
551e5c81084SJames Hilliard	pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
552e5c81084SJames Hilliard	bus-width = <4>;
553e5c81084SJames Hilliard	vmmc-supply = <&reg_wl18xx_vmmc>;
554e5c81084SJames Hilliard	non-removable;
555e5c81084SJames Hilliard	wakeup-source;
556e5c81084SJames Hilliard	keep-power-in-suspend;
557e5c81084SJames Hilliard	cap-power-off-card;
558e5c81084SJames Hilliard	#address-cells = <1>;
559e5c81084SJames Hilliard	#size-cells = <0>;
560e5c81084SJames Hilliard	status = "okay";
561e5c81084SJames Hilliard
562e5c81084SJames Hilliard	wifi: wifi@2 {
563e5c81084SJames Hilliard		compatible = "ti,wl1835";
564e5c81084SJames Hilliard		reg = <2>;
565e5c81084SJames Hilliard		interrupt-parent = <&gpio6>;
566e5c81084SJames Hilliard		interrupts = <17 IRQ_TYPE_EDGE_RISING>;
567e5c81084SJames Hilliard		ref-clock-frequency = <38400000>;
568e5c81084SJames Hilliard	};
569e5c81084SJames Hilliard};
570