1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Copyright 2013 Freescale Semiconductor, Inc. 4 * 5 * Author: Fabio Estevam <fabio.estevam@freescale.com> 6 */ 7 8#include <dt-bindings/gpio/gpio.h> 9 10/ { 11 aliases { 12 backlight = &backlight; 13 panelchan = &panelchan; 14 panel7 = &panel7; 15 touchscreenp7 = &touchscreenp7; 16 }; 17 18 chosen { 19 stdout-path = &uart2; 20 }; 21 22 backlight: backlight { 23 compatible = "gpio-backlight"; 24 gpios = <&gpio1 4 0>; 25 default-on; 26 status = "disabled"; 27 }; 28 29 gpio-poweroff { 30 compatible = "gpio-poweroff"; 31 gpios = <&gpio2 4 0>; 32 pinctrl-0 = <&pinctrl_power_off>; 33 pinctrl-names = "default"; 34 }; 35 36 memory@10000000 { 37 device_type = "memory"; 38 reg = <0x10000000 0x40000000>; 39 }; 40 41 panel7: panel7 { 42 /* 43 * in reality it is a -20t (parallel) model, 44 * but with LVDS bridge chip attached, 45 * so it is equivalent to -19t model in drive 46 * characteristics 47 */ 48 compatible = "urt,umsh-8596md-19t"; 49 pinctrl-names = "default"; 50 pinctrl-0 = <&pinctrl_panel>; 51 power-supply = <®_panel>; 52 backlight = <&backlight>; 53 status = "disabled"; 54 55 port { 56 panel_in: endpoint { 57 remote-endpoint = <&lvds0_out>; 58 }; 59 }; 60 }; 61 62 reg_panel: regulator-panel { 63 compatible = "regulator-fixed"; 64 regulator-name = "lcd_panel"; 65 enable-active-high; 66 gpio = <&gpio1 2 0>; 67 }; 68 69 sound { 70 compatible = "fsl,imx6q-udoo-ac97", 71 "fsl,imx-audio-ac97"; 72 model = "fsl,imx6q-udoo-ac97"; 73 audio-cpu = <&ssi1>; 74 audio-routing = 75 "RX", "Mic Jack", 76 "Headphone Jack", "TX"; 77 mux-int-port = <1>; 78 mux-ext-port = <6>; 79 }; 80}; 81 82&fec { 83 pinctrl-names = "default"; 84 pinctrl-0 = <&pinctrl_enet>; 85 phy-mode = "rgmii-id"; 86 status = "okay"; 87}; 88 89&hdmi { 90 ddc-i2c-bus = <&i2c2>; 91 status = "okay"; 92}; 93 94&i2c2 { 95 clock-frequency = <100000>; 96 pinctrl-names = "default"; 97 pinctrl-0 = <&pinctrl_i2c2>; 98 status = "okay"; 99}; 100 101&i2c3 { 102 clock-frequency = <100000>; 103 pinctrl-names = "default"; 104 pinctrl-0 = <&pinctrl_i2c3>; 105 status = "okay"; 106 107 touchscreenp7: touchscreenp7@55 { 108 compatible = "sitronix,st1232"; 109 pinctrl-names = "default"; 110 pinctrl-0 = <&pinctrl_touchscreenp7>; 111 reg = <0x55>; 112 interrupt-parent = <&gpio1>; 113 interrupts = <13 8>; 114 gpios = <&gpio1 15 0>; 115 status = "disabled"; 116 }; 117}; 118 119&iomuxc { 120 pinctrl_enet: enetgrp { 121 fsl,pins = < 122 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 123 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030 124 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030 125 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 126 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 127 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030 128 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030 129 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030 130 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030 131 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030 132 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030 133 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030 134 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 135 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 136 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 137 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 138 >; 139 }; 140 141 pinctrl_i2c2: i2c2grp { 142 fsl,pins = < 143 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 144 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 145 >; 146 }; 147 148 pinctrl_i2c3: i2c3grp { 149 fsl,pins = < 150 MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001f8b1 151 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001f8b1 152 >; 153 }; 154 155 pinctrl_panel: panelgrp { 156 fsl,pins = < 157 MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x70 158 MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x70 159 >; 160 }; 161 162 pinctrl_power_off: poweroffgrp { 163 fsl,pins = < 164 MX6QDL_PAD_NANDF_D4__GPIO2_IO04 0x30 165 >; 166 }; 167 168 pinctrl_touchscreenp7: touchscreenp7grp { 169 fsl,pins = < 170 MX6QDL_PAD_SD2_DAT0__GPIO1_IO15 0x70 171 MX6QDL_PAD_SD2_DAT2__GPIO1_IO13 0x1b0b0 172 >; 173 }; 174 175 pinctrl_uart2: uart2grp { 176 fsl,pins = < 177 MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1 178 MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1 179 >; 180 }; 181 182 pinctrl_uart4: uart4grp { 183 fsl,pins = < 184 MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1 185 MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1 186 >; 187 }; 188 189 pinctrl_usbh: usbhgrp { 190 fsl,pins = < 191 MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x80000000 192 MX6QDL_PAD_NANDF_CS2__CCM_CLKO2 0x130b0 193 >; 194 }; 195 196 pinctrl_usbotg: usbotggrp { 197 fsl,pins = < 198 MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059 199 MX6QDL_PAD_EIM_D22__USB_OTG_PWR 0x17059 200 MX6QDL_PAD_EIM_D21__USB_OTG_OC 0x17059 201 >; 202 }; 203 204 pinctrl_usdhc3: usdhc3grp { 205 fsl,pins = < 206 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 207 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 208 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 209 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 210 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 211 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 212 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b0b0 213 >; 214 }; 215 216 pinctrl_ac97_running: ac97runninggrp { 217 fsl,pins = < 218 MX6QDL_PAD_DI0_PIN2__AUD6_TXD 0x1b0b0 219 MX6QDL_PAD_DI0_PIN3__AUD6_TXFS 0x1b0b0 220 MX6QDL_PAD_DI0_PIN4__AUD6_RXD 0x13080 221 MX6QDL_PAD_DI0_PIN15__AUD6_TXC 0x13080 222 MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x1b0b0 223 >; 224 }; 225 226 pinctrl_ac97_warm_reset: ac97warmresetgrp { 227 fsl,pins = < 228 MX6QDL_PAD_DI0_PIN2__AUD6_TXD 0x1b0b0 229 MX6QDL_PAD_DI0_PIN3__GPIO4_IO19 0x1b0b0 230 MX6QDL_PAD_DI0_PIN4__AUD6_RXD 0x13080 231 MX6QDL_PAD_DI0_PIN15__AUD6_TXC 0x13080 232 MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x1b0b0 233 >; 234 }; 235 236 pinctrl_ac97_reset: ac97resetgrp { 237 fsl,pins = < 238 MX6QDL_PAD_DI0_PIN2__GPIO4_IO18 0x1b0b0 239 MX6QDL_PAD_DI0_PIN3__GPIO4_IO19 0x1b0b0 240 MX6QDL_PAD_DI0_PIN4__AUD6_RXD 0x13080 241 MX6QDL_PAD_DI0_PIN15__AUD6_TXC 0x13080 242 MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x1b0b0 243 >; 244 }; 245}; 246 247&ldb { 248 status = "okay"; 249 250 panelchan: lvds-channel@0 { 251 port@4 { 252 reg = <4>; 253 254 lvds0_out: endpoint { 255 remote-endpoint = <&panel_in>; 256 }; 257 }; 258 }; 259}; 260 261&uart2 { 262 pinctrl-names = "default"; 263 pinctrl-0 = <&pinctrl_uart2>; 264 status = "okay"; 265}; 266 267&uart4 { 268 pinctrl-names = "default"; 269 pinctrl-0 = <&pinctrl_uart4>; 270 status = "okay"; 271}; 272 273&usbh1 { 274 pinctrl-names = "default"; 275 pinctrl-0 = <&pinctrl_usbh>; 276 #address-cells = <1>; 277 #size-cells = <0>; 278 status = "okay"; 279 280 usb-port@1 { 281 compatible = "usb424,2514"; 282 reg = <1>; 283 #address-cells = <1>; 284 #size-cells = <0>; 285 clocks = <&clks IMX6QDL_CLK_CKO>; 286 reset-gpios = <&gpio7 12 GPIO_ACTIVE_LOW>; 287 }; 288}; 289 290&usbotg { 291 pinctrl-names = "default"; 292 pinctrl-0 = <&pinctrl_usbotg>; 293 status = "okay"; 294}; 295 296&usdhc3 { 297 pinctrl-names = "default"; 298 pinctrl-0 = <&pinctrl_usdhc3>; 299 cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>; 300 status = "okay"; 301}; 302 303&audmux { 304 status = "okay"; 305}; 306 307&ssi1 { 308 cell-index = <0>; 309 fsl,mode = "ac97-slave"; 310 pinctrl-names = "ac97-running", "ac97-reset", "ac97-warm-reset"; 311 pinctrl-0 = <&pinctrl_ac97_running>; 312 pinctrl-1 = <&pinctrl_ac97_reset>; 313 pinctrl-2 = <&pinctrl_ac97_warm_reset>; 314 ac97-gpios = <&gpio4 19 0 &gpio4 18 0 &gpio2 30 0>; 315 status = "okay"; 316}; 317