xref: /linux/arch/arm/boot/dts/nxp/imx/imx6qdl-udoo.dtsi (revision 6e7fd890f1d6ac83805409e9c346240de2705584) 
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright 2013 Freescale Semiconductor, Inc.
4 *
5 * Author: Fabio Estevam <fabio.estevam@freescale.com>
6 */
7
8#include <dt-bindings/gpio/gpio.h>
9
10/ {
11	aliases {
12		backlight = &backlight;
13		panelchan = &panelchan;
14		panel7 = &panel7;
15		touchscreenp7 = &touchscreenp7;
16	};
17
18	chosen {
19		stdout-path = &uart2;
20	};
21
22	backlight: backlight {
23		compatible = "gpio-backlight";
24		gpios = <&gpio1 4 0>;
25		default-on;
26		status = "disabled";
27	};
28
29	gpio-poweroff {
30		compatible = "gpio-poweroff";
31		gpios = <&gpio2 4 0>;
32		pinctrl-0 = <&pinctrl_power_off>;
33		pinctrl-names = "default";
34	};
35
36	memory@10000000 {
37		device_type = "memory";
38		reg = <0x10000000 0x40000000>;
39	};
40
41	panel7: panel7 {
42		/*
43		 * in reality it is a -20t (parallel) model,
44		 * but with LVDS bridge chip attached,
45		 * so it is equivalent to -19t model in drive
46		 * characteristics
47		 */
48		compatible = "urt,umsh-8596md-19t";
49		pinctrl-names = "default";
50		pinctrl-0 = <&pinctrl_panel>;
51		power-supply = <&reg_panel>;
52		backlight = <&backlight>;
53		status = "disabled";
54
55		port {
56			panel_in: endpoint {
57				remote-endpoint = <&lvds0_out>;
58			};
59		};
60	};
61
62	reg_panel: regulator-panel {
63		compatible = "regulator-fixed";
64		regulator-name = "lcd_panel";
65		enable-active-high;
66		gpio = <&gpio1 2 0>;
67	};
68
69	sound {
70		compatible = "fsl,imx6q-udoo-ac97",
71			     "fsl,imx-audio-ac97";
72		model = "fsl,imx6q-udoo-ac97";
73		audio-cpu = <&ssi1>;
74		audio-routing =
75			"RX", "Mic Jack",
76			"Headphone Jack", "TX";
77		mux-int-port = <1>;
78		mux-ext-port = <6>;
79	};
80};
81
82&fec {
83	pinctrl-names = "default";
84	pinctrl-0 = <&pinctrl_enet>;
85	phy-mode = "rgmii-id";
86	status = "okay";
87};
88
89&hdmi {
90	ddc-i2c-bus = <&i2c2>;
91	status = "okay";
92};
93
94&i2c2 {
95	clock-frequency = <100000>;
96	pinctrl-names = "default";
97	pinctrl-0 = <&pinctrl_i2c2>;
98	status = "okay";
99};
100
101&i2c3 {
102	clock-frequency = <100000>;
103	pinctrl-names = "default";
104	pinctrl-0 = <&pinctrl_i2c3>;
105	status = "okay";
106
107	touchscreenp7: touchscreenp7@55 {
108		compatible = "sitronix,st1232";
109		pinctrl-names = "default";
110		pinctrl-0 = <&pinctrl_touchscreenp7>;
111		reg = <0x55>;
112		interrupt-parent = <&gpio1>;
113		interrupts = <13 8>;
114		gpios = <&gpio1 15 0>;
115		status = "disabled";
116	};
117};
118
119&iomuxc {
120	imx6q-udoo {
121		pinctrl_enet: enetgrp {
122			fsl,pins = <
123				MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b030
124				MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x1b030
125				MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x1b030
126				MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b030
127				MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b030
128				MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x1b030
129				MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x1b030
130				MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x1b030
131				MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x1b030
132				MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x1b030
133				MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x1b030
134				MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x1b030
135				MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x1b0b0
136				MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b0b0
137				MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0
138				MX6QDL_PAD_GPIO_16__ENET_REF_CLK	0x4001b0a8
139			>;
140		};
141
142		pinctrl_i2c2: i2c2grp {
143			fsl,pins = <
144				MX6QDL_PAD_KEY_COL3__I2C2_SCL		0x4001b8b1
145				MX6QDL_PAD_KEY_ROW3__I2C2_SDA		0x4001b8b1
146			>;
147		};
148
149		pinctrl_i2c3: i2c3grp {
150			fsl,pins = <
151				MX6QDL_PAD_GPIO_5__I2C3_SCL		0x4001f8b1
152				MX6QDL_PAD_GPIO_6__I2C3_SDA		0x4001f8b1
153			>;
154		};
155
156		pinctrl_panel: panelgrp {
157			fsl,pins = <
158				MX6QDL_PAD_GPIO_2__GPIO1_IO02		0x70
159				MX6QDL_PAD_GPIO_4__GPIO1_IO04		0x70
160			>;
161		};
162
163		pinctrl_power_off: poweroffgrp {
164			fsl,pins = <
165				MX6QDL_PAD_NANDF_D4__GPIO2_IO04		0x30
166			>;
167		};
168
169		pinctrl_touchscreenp7: touchscreenp7grp {
170			fsl,pins = <
171				MX6QDL_PAD_SD2_DAT0__GPIO1_IO15		0x70
172				MX6QDL_PAD_SD2_DAT2__GPIO1_IO13		0x1b0b0
173			>;
174		};
175
176		pinctrl_uart2: uart2grp {
177			fsl,pins = <
178				MX6QDL_PAD_EIM_D26__UART2_TX_DATA	0x1b0b1
179				MX6QDL_PAD_EIM_D27__UART2_RX_DATA	0x1b0b1
180			>;
181		};
182
183		pinctrl_uart4: uart4grp {
184			fsl,pins = <
185				MX6QDL_PAD_KEY_COL0__UART4_TX_DATA	0x1b0b1
186				MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA	0x1b0b1
187			>;
188		};
189
190		pinctrl_usbh: usbhgrp {
191			fsl,pins = <
192				MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x80000000
193				MX6QDL_PAD_NANDF_CS2__CCM_CLKO2 0x130b0
194			>;
195		};
196
197		pinctrl_usbotg: usbotg {
198			fsl,pins = <
199				MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
200				MX6QDL_PAD_EIM_D22__USB_OTG_PWR 0x17059
201				MX6QDL_PAD_EIM_D21__USB_OTG_OC 0x17059
202			>;
203		};
204
205		pinctrl_usdhc3: usdhc3grp {
206			fsl,pins = <
207				MX6QDL_PAD_SD3_CMD__SD3_CMD		0x17059
208				MX6QDL_PAD_SD3_CLK__SD3_CLK		0x10059
209				MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x17059
210				MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x17059
211				MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x17059
212				MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x17059
213				MX6QDL_PAD_SD3_DAT5__GPIO7_IO00		0x1b0b0
214			>;
215		};
216
217		pinctrl_ac97_running: ac97running {
218			fsl,pins = <
219				MX6QDL_PAD_DI0_PIN2__AUD6_TXD		0x1b0b0
220				MX6QDL_PAD_DI0_PIN3__AUD6_TXFS		0x1b0b0
221				MX6QDL_PAD_DI0_PIN4__AUD6_RXD		0x13080
222				MX6QDL_PAD_DI0_PIN15__AUD6_TXC		0x13080
223				MX6QDL_PAD_EIM_EB2__GPIO2_IO30		0x1b0b0
224			>;
225		};
226
227		pinctrl_ac97_warm_reset: ac97warmreset {
228			fsl,pins = <
229				MX6QDL_PAD_DI0_PIN2__AUD6_TXD		0x1b0b0
230				MX6QDL_PAD_DI0_PIN3__GPIO4_IO19		0x1b0b0
231				MX6QDL_PAD_DI0_PIN4__AUD6_RXD		0x13080
232				MX6QDL_PAD_DI0_PIN15__AUD6_TXC		0x13080
233				MX6QDL_PAD_EIM_EB2__GPIO2_IO30		0x1b0b0
234			>;
235		};
236
237		pinctrl_ac97_reset: ac97reset {
238			fsl,pins = <
239				MX6QDL_PAD_DI0_PIN2__GPIO4_IO18		0x1b0b0
240				MX6QDL_PAD_DI0_PIN3__GPIO4_IO19		0x1b0b0
241				MX6QDL_PAD_DI0_PIN4__AUD6_RXD		0x13080
242				MX6QDL_PAD_DI0_PIN15__AUD6_TXC		0x13080
243				MX6QDL_PAD_EIM_EB2__GPIO2_IO30		0x1b0b0
244			>;
245		};
246	};
247};
248
249&ldb {
250	status = "okay";
251
252	panelchan: lvds-channel@0 {
253		port@4 {
254			reg = <4>;
255
256			lvds0_out: endpoint {
257				remote-endpoint = <&panel_in>;
258			};
259		};
260	};
261};
262
263&uart2 {
264	pinctrl-names = "default";
265	pinctrl-0 = <&pinctrl_uart2>;
266	status = "okay";
267};
268
269&uart4 {
270	pinctrl-names = "default";
271	pinctrl-0 = <&pinctrl_uart4>;
272	status = "okay";
273};
274
275&usbh1 {
276	pinctrl-names = "default";
277	pinctrl-0 = <&pinctrl_usbh>;
278	#address-cells = <1>;
279	#size-cells = <0>;
280	status = "okay";
281
282	usb-port@1 {
283		compatible = "usb424,2514";
284		reg = <1>;
285		#address-cells = <1>;
286		#size-cells = <0>;
287		clocks = <&clks IMX6QDL_CLK_CKO>;
288		reset-gpios = <&gpio7 12 GPIO_ACTIVE_LOW>;
289	};
290};
291
292&usbotg {
293	pinctrl-names = "default";
294	pinctrl-0 = <&pinctrl_usbotg>;
295	status = "okay";
296};
297
298&usdhc3 {
299	pinctrl-names = "default";
300	pinctrl-0 = <&pinctrl_usdhc3>;
301	cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
302	status = "okay";
303};
304
305&audmux {
306	status = "okay";
307};
308
309&ssi1 {
310	cell-index = <0>;
311	fsl,mode = "ac97-slave";
312	pinctrl-names = "ac97-running", "ac97-reset", "ac97-warm-reset";
313	pinctrl-0 = <&pinctrl_ac97_running>;
314	pinctrl-1 = <&pinctrl_ac97_reset>;
315	pinctrl-2 = <&pinctrl_ac97_warm_reset>;
316	ac97-gpios = <&gpio4 19 0 &gpio4 18 0 &gpio2 30 0>;
317	status = "okay";
318};
319