xref: /linux/arch/arm/boot/dts/nxp/imx/imx6qdl-sr-som-brcm.dtsi (revision 724ba6751532055db75992fc6ae21c3e322e94a7)
1*724ba675SRob Herring/*
2*724ba675SRob Herring * Copyright (C) 2013,2014 Russell King
3*724ba675SRob Herring *
4*724ba675SRob Herring * This file is dual-licensed: you can use it either under the terms
5*724ba675SRob Herring * of the GPL or the X11 license, at your option. Note that this dual
6*724ba675SRob Herring * licensing only applies to this file, and not this project as a
7*724ba675SRob Herring * whole.
8*724ba675SRob Herring *
9*724ba675SRob Herring *  a) This file is free software; you can redistribute it and/or
10*724ba675SRob Herring *     modify it under the terms of the GNU General Public License
11*724ba675SRob Herring *     version 2 as published by the Free Software Foundation.
12*724ba675SRob Herring *
13*724ba675SRob Herring *     This file is distributed in the hope that it will be useful,
14*724ba675SRob Herring *     but WITHOUT ANY WARRANTY; without even the implied warranty of
15*724ba675SRob Herring *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16*724ba675SRob Herring *     GNU General Public License for more details.
17*724ba675SRob Herring *
18*724ba675SRob Herring * Or, alternatively,
19*724ba675SRob Herring *
20*724ba675SRob Herring *  b) Permission is hereby granted, free of charge, to any person
21*724ba675SRob Herring *     obtaining a copy of this software and associated documentation
22*724ba675SRob Herring *     files (the "Software"), to deal in the Software without
23*724ba675SRob Herring *     restriction, including without limitation the rights to use,
24*724ba675SRob Herring *     copy, modify, merge, publish, distribute, sublicense, and/or
25*724ba675SRob Herring *     sell copies of the Software, and to permit persons to whom the
26*724ba675SRob Herring *     Software is furnished to do so, subject to the following
27*724ba675SRob Herring *     conditions:
28*724ba675SRob Herring *
29*724ba675SRob Herring *     The above copyright notice and this permission notice shall be
30*724ba675SRob Herring *     included in all copies or substantial portions of the Software.
31*724ba675SRob Herring *
32*724ba675SRob Herring *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
33*724ba675SRob Herring *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
34*724ba675SRob Herring *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
35*724ba675SRob Herring *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
36*724ba675SRob Herring *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
37*724ba675SRob Herring *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
38*724ba675SRob Herring *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
39*724ba675SRob Herring *     OTHER DEALINGS IN THE SOFTWARE.
40*724ba675SRob Herring */
41*724ba675SRob Herring#include <dt-bindings/gpio/gpio.h>
42*724ba675SRob Herring/ {
43*724ba675SRob Herring	clk_brcm: brcm-clock {
44*724ba675SRob Herring		compatible = "gpio-gate-clock";
45*724ba675SRob Herring		#clock-cells = <0>;
46*724ba675SRob Herring		pinctrl-names = "default";
47*724ba675SRob Herring		pinctrl-0 = <&pinctrl_microsom_brcm_osc>;
48*724ba675SRob Herring		enable-gpios = <&gpio5 5 GPIO_ACTIVE_HIGH>;
49*724ba675SRob Herring	};
50*724ba675SRob Herring
51*724ba675SRob Herring	reg_brcm: brcm-reg {
52*724ba675SRob Herring		compatible = "regulator-fixed";
53*724ba675SRob Herring		enable-active-high;
54*724ba675SRob Herring		gpio = <&gpio3 19 0>;
55*724ba675SRob Herring		pinctrl-names = "default";
56*724ba675SRob Herring		pinctrl-0 = <&pinctrl_microsom_brcm_reg>;
57*724ba675SRob Herring		regulator-name = "brcm_reg";
58*724ba675SRob Herring		regulator-min-microvolt = <3300000>;
59*724ba675SRob Herring		regulator-max-microvolt = <3300000>;
60*724ba675SRob Herring		startup-delay-us = <200000>;
61*724ba675SRob Herring	};
62*724ba675SRob Herring
63*724ba675SRob Herring	usdhc1_pwrseq: usdhc1_pwrseq {
64*724ba675SRob Herring		compatible = "mmc-pwrseq-simple";
65*724ba675SRob Herring		reset-gpios = <&gpio5 26 GPIO_ACTIVE_LOW>,
66*724ba675SRob Herring			      <&gpio6 0 GPIO_ACTIVE_LOW>;
67*724ba675SRob Herring		clocks = <&clk_brcm>;
68*724ba675SRob Herring		clock-names = "ext_clock";
69*724ba675SRob Herring	};
70*724ba675SRob Herring};
71*724ba675SRob Herring
72*724ba675SRob Herring&iomuxc {
73*724ba675SRob Herring	microsom {
74*724ba675SRob Herring		pinctrl_microsom_brcm_bt: microsom-brcm-bt {
75*724ba675SRob Herring			fsl,pins = <
76*724ba675SRob Herring				MX6QDL_PAD_CSI0_DAT14__GPIO6_IO00	0x40013070
77*724ba675SRob Herring				MX6QDL_PAD_CSI0_DAT15__GPIO6_IO01	0x40013070
78*724ba675SRob Herring				MX6QDL_PAD_CSI0_DAT18__GPIO6_IO04	0x40013070
79*724ba675SRob Herring			>;
80*724ba675SRob Herring		};
81*724ba675SRob Herring
82*724ba675SRob Herring		pinctrl_microsom_brcm_osc: microsom-brcm-osc {
83*724ba675SRob Herring			fsl,pins = <
84*724ba675SRob Herring				MX6QDL_PAD_DISP0_DAT11__GPIO5_IO05	0x40013070
85*724ba675SRob Herring			>;
86*724ba675SRob Herring		};
87*724ba675SRob Herring
88*724ba675SRob Herring		pinctrl_microsom_brcm_reg: microsom-brcm-reg {
89*724ba675SRob Herring			fsl,pins = <
90*724ba675SRob Herring				MX6QDL_PAD_EIM_D19__GPIO3_IO19		0x40013070
91*724ba675SRob Herring			>;
92*724ba675SRob Herring		};
93*724ba675SRob Herring
94*724ba675SRob Herring		pinctrl_microsom_brcm_wifi: microsom-brcm-wifi {
95*724ba675SRob Herring			fsl,pins = <
96*724ba675SRob Herring				MX6QDL_PAD_GPIO_8__XTALOSC_REF_CLK_32K	0x1b0b0
97*724ba675SRob Herring				MX6QDL_PAD_CSI0_DATA_EN__GPIO5_IO20	0x40013070
98*724ba675SRob Herring				MX6QDL_PAD_CSI0_DAT8__GPIO5_IO26	0x40013070
99*724ba675SRob Herring				MX6QDL_PAD_CSI0_DAT9__GPIO5_IO27	0x40013070
100*724ba675SRob Herring			>;
101*724ba675SRob Herring		};
102*724ba675SRob Herring
103*724ba675SRob Herring		pinctrl_microsom_uart4: microsom-uart4 {
104*724ba675SRob Herring			fsl,pins = <
105*724ba675SRob Herring				MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA 0x1b0b1
106*724ba675SRob Herring				MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA 0x1b0b1
107*724ba675SRob Herring				MX6QDL_PAD_CSI0_DAT16__UART4_RTS_B 0x1b0b1
108*724ba675SRob Herring				MX6QDL_PAD_CSI0_DAT17__UART4_CTS_B 0x1b0b1
109*724ba675SRob Herring			>;
110*724ba675SRob Herring		};
111*724ba675SRob Herring
112*724ba675SRob Herring		pinctrl_microsom_usdhc1: microsom-usdhc1 {
113*724ba675SRob Herring			fsl,pins = <
114*724ba675SRob Herring				MX6QDL_PAD_SD1_CMD__SD1_CMD    0x17059
115*724ba675SRob Herring				MX6QDL_PAD_SD1_CLK__SD1_CLK    0x10059
116*724ba675SRob Herring				MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17059
117*724ba675SRob Herring				MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17059
118*724ba675SRob Herring				MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17059
119*724ba675SRob Herring				MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17059
120*724ba675SRob Herring			>;
121*724ba675SRob Herring		};
122*724ba675SRob Herring	};
123*724ba675SRob Herring};
124*724ba675SRob Herring
125*724ba675SRob Herring/* UART4 - Connected to optional BRCM Wifi/BT/FM */
126*724ba675SRob Herring&uart4 {
127*724ba675SRob Herring	pinctrl-names = "default";
128*724ba675SRob Herring	pinctrl-0 = <&pinctrl_microsom_brcm_bt &pinctrl_microsom_uart4>;
129*724ba675SRob Herring	uart-has-rtscts;
130*724ba675SRob Herring	status = "okay";
131*724ba675SRob Herring};
132*724ba675SRob Herring
133*724ba675SRob Herring/* USDHC1 - Connected to optional BRCM Wifi/BT/FM */
134*724ba675SRob Herring&usdhc1 {
135*724ba675SRob Herring	pinctrl-names = "default";
136*724ba675SRob Herring	pinctrl-0 = <&pinctrl_microsom_brcm_wifi &pinctrl_microsom_usdhc1>;
137*724ba675SRob Herring	bus-width = <4>;
138*724ba675SRob Herring	mmc-pwrseq = <&usdhc1_pwrseq>;
139*724ba675SRob Herring	keep-power-in-suspend;
140*724ba675SRob Herring	no-1-8-v;
141*724ba675SRob Herring	non-removable;
142*724ba675SRob Herring	vmmc-supply = <&reg_brcm>;
143*724ba675SRob Herring	status = "okay";
144*724ba675SRob Herring};
145