xref: /linux/arch/arm/boot/dts/nxp/imx/imx6qdl-gw560x.dtsi (revision 724ba6751532055db75992fc6ae21c3e322e94a7)
1*724ba675SRob Herring/*
2*724ba675SRob Herring * Copyright 2017 Gateworks Corporation
3*724ba675SRob Herring *
4*724ba675SRob Herring * This file is dual-licensed: you can use it either under the terms
5*724ba675SRob Herring * of the GPL or the X11 license, at your option. Note that this dual
6*724ba675SRob Herring * licensing only applies to this file, and not this project as a
7*724ba675SRob Herring * whole.
8*724ba675SRob Herring *
9*724ba675SRob Herring *  a) This file is free software; you can redistribute it and/or
10*724ba675SRob Herring *     modify it under the terms of the GNU General Public License as
11*724ba675SRob Herring *     published by the Free Software Foundation; either version 2 of
12*724ba675SRob Herring *     the License, or (at your option) any later version.
13*724ba675SRob Herring *
14*724ba675SRob Herring *     This file is distributed in the hope that it will be useful,
15*724ba675SRob Herring *     but WITHOUT ANY WARRANTY; without even the implied warranty of
16*724ba675SRob Herring *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17*724ba675SRob Herring *     GNU General Public License for more details.
18*724ba675SRob Herring *
19*724ba675SRob Herring *     You should have received a copy of the GNU General Public
20*724ba675SRob Herring *     License along with this file; if not, write to the Free
21*724ba675SRob Herring *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
22*724ba675SRob Herring *     MA 02110-1301 USA
23*724ba675SRob Herring *
24*724ba675SRob Herring * Or, alternatively,
25*724ba675SRob Herring *
26*724ba675SRob Herring *  b) Permission is hereby granted, free of charge, to any person
27*724ba675SRob Herring *     obtaining a copy of this software and associated documentation
28*724ba675SRob Herring *     files (the "Software"), to deal in the Software without
29*724ba675SRob Herring *     restriction, including without limitation the rights to use,
30*724ba675SRob Herring *     copy, modify, merge, publish, distribute, sublicense, and/or
31*724ba675SRob Herring *     sell copies of the Software, and to permit persons to whom the
32*724ba675SRob Herring *     Software is furnished to do so, subject to the following
33*724ba675SRob Herring *     conditions:
34*724ba675SRob Herring *
35*724ba675SRob Herring *     The above copyright notice and this permission notice shall be
36*724ba675SRob Herring *     included in all copies or substantial portions of the Software.
37*724ba675SRob Herring *
38*724ba675SRob Herring *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
39*724ba675SRob Herring *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
40*724ba675SRob Herring *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
41*724ba675SRob Herring *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
42*724ba675SRob Herring *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
43*724ba675SRob Herring *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
44*724ba675SRob Herring *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
45*724ba675SRob Herring *     OTHER DEALINGS IN THE SOFTWARE.
46*724ba675SRob Herring */
47*724ba675SRob Herring
48*724ba675SRob Herring#include <dt-bindings/gpio/gpio.h>
49*724ba675SRob Herring#include <dt-bindings/input/input.h>
50*724ba675SRob Herring#include <dt-bindings/interrupt-controller/irq.h>
51*724ba675SRob Herring
52*724ba675SRob Herring/ {
53*724ba675SRob Herring	/* these are used by bootloader for disabling nodes */
54*724ba675SRob Herring	aliases {
55*724ba675SRob Herring		led0 = &led0;
56*724ba675SRob Herring		led1 = &led1;
57*724ba675SRob Herring		led2 = &led2;
58*724ba675SRob Herring		ssi0 = &ssi1;
59*724ba675SRob Herring		usb0 = &usbh1;
60*724ba675SRob Herring		usb1 = &usbotg;
61*724ba675SRob Herring	};
62*724ba675SRob Herring
63*724ba675SRob Herring	chosen {
64*724ba675SRob Herring		stdout-path = &uart2;
65*724ba675SRob Herring	};
66*724ba675SRob Herring
67*724ba675SRob Herring	backlight-display {
68*724ba675SRob Herring		compatible = "pwm-backlight";
69*724ba675SRob Herring		pwms = <&pwm4 0 5000000>;
70*724ba675SRob Herring		brightness-levels = <
71*724ba675SRob Herring			0  1  2  3  4  5  6  7  8  9
72*724ba675SRob Herring			10 11 12 13 14 15 16 17 18 19
73*724ba675SRob Herring			20 21 22 23 24 25 26 27 28 29
74*724ba675SRob Herring			30 31 32 33 34 35 36 37 38 39
75*724ba675SRob Herring			40 41 42 43 44 45 46 47 48 49
76*724ba675SRob Herring			50 51 52 53 54 55 56 57 58 59
77*724ba675SRob Herring			60 61 62 63 64 65 66 67 68 69
78*724ba675SRob Herring			70 71 72 73 74 75 76 77 78 79
79*724ba675SRob Herring			80 81 82 83 84 85 86 87 88 89
80*724ba675SRob Herring			90 91 92 93 94 95 96 97 98 99
81*724ba675SRob Herring			100
82*724ba675SRob Herring			>;
83*724ba675SRob Herring		default-brightness-level = <100>;
84*724ba675SRob Herring	};
85*724ba675SRob Herring
86*724ba675SRob Herring	backlight-keypad {
87*724ba675SRob Herring		compatible = "gpio-backlight";
88*724ba675SRob Herring		gpios = <&gpio4 30 GPIO_ACTIVE_HIGH>;
89*724ba675SRob Herring		default-on;
90*724ba675SRob Herring	};
91*724ba675SRob Herring
92*724ba675SRob Herring	gpio-keys {
93*724ba675SRob Herring		compatible = "gpio-keys";
94*724ba675SRob Herring
95*724ba675SRob Herring		user-pb {
96*724ba675SRob Herring			label = "user_pb";
97*724ba675SRob Herring			gpios = <&gsc_gpio 0 GPIO_ACTIVE_LOW>;
98*724ba675SRob Herring			linux,code = <BTN_0>;
99*724ba675SRob Herring		};
100*724ba675SRob Herring
101*724ba675SRob Herring		user-pb1x {
102*724ba675SRob Herring			label = "user_pb1x";
103*724ba675SRob Herring			linux,code = <BTN_1>;
104*724ba675SRob Herring			interrupt-parent = <&gsc>;
105*724ba675SRob Herring			interrupts = <0>;
106*724ba675SRob Herring		};
107*724ba675SRob Herring
108*724ba675SRob Herring		key-erased {
109*724ba675SRob Herring			label = "key-erased";
110*724ba675SRob Herring			linux,code = <BTN_2>;
111*724ba675SRob Herring			interrupt-parent = <&gsc>;
112*724ba675SRob Herring			interrupts = <1>;
113*724ba675SRob Herring		};
114*724ba675SRob Herring
115*724ba675SRob Herring		eeprom-wp {
116*724ba675SRob Herring			label = "eeprom_wp";
117*724ba675SRob Herring			linux,code = <BTN_3>;
118*724ba675SRob Herring			interrupt-parent = <&gsc>;
119*724ba675SRob Herring			interrupts = <2>;
120*724ba675SRob Herring		};
121*724ba675SRob Herring
122*724ba675SRob Herring		tamper {
123*724ba675SRob Herring			label = "tamper";
124*724ba675SRob Herring			linux,code = <BTN_4>;
125*724ba675SRob Herring			interrupt-parent = <&gsc>;
126*724ba675SRob Herring			interrupts = <5>;
127*724ba675SRob Herring		};
128*724ba675SRob Herring
129*724ba675SRob Herring		switch-hold {
130*724ba675SRob Herring			label = "switch_hold";
131*724ba675SRob Herring			linux,code = <BTN_5>;
132*724ba675SRob Herring			interrupt-parent = <&gsc>;
133*724ba675SRob Herring			interrupts = <7>;
134*724ba675SRob Herring		};
135*724ba675SRob Herring	};
136*724ba675SRob Herring
137*724ba675SRob Herring	leds {
138*724ba675SRob Herring		compatible = "gpio-leds";
139*724ba675SRob Herring		pinctrl-names = "default";
140*724ba675SRob Herring		pinctrl-0 = <&pinctrl_gpio_leds>;
141*724ba675SRob Herring
142*724ba675SRob Herring		led0: led-user1 {
143*724ba675SRob Herring			label = "user1";
144*724ba675SRob Herring			gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
145*724ba675SRob Herring			default-state = "on";
146*724ba675SRob Herring			linux,default-trigger = "heartbeat";
147*724ba675SRob Herring		};
148*724ba675SRob Herring
149*724ba675SRob Herring		led1: led-user2 {
150*724ba675SRob Herring			label = "user2";
151*724ba675SRob Herring			gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
152*724ba675SRob Herring			default-state = "off";
153*724ba675SRob Herring		};
154*724ba675SRob Herring
155*724ba675SRob Herring		led2: led-user3 {
156*724ba675SRob Herring			label = "user3";
157*724ba675SRob Herring			gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */
158*724ba675SRob Herring			default-state = "off";
159*724ba675SRob Herring		};
160*724ba675SRob Herring	};
161*724ba675SRob Herring
162*724ba675SRob Herring	memory@10000000 {
163*724ba675SRob Herring		device_type = "memory";
164*724ba675SRob Herring		reg = <0x10000000 0x40000000>;
165*724ba675SRob Herring	};
166*724ba675SRob Herring
167*724ba675SRob Herring	pps {
168*724ba675SRob Herring		compatible = "pps-gpio";
169*724ba675SRob Herring		pinctrl-names = "default";
170*724ba675SRob Herring		pinctrl-0 = <&pinctrl_pps>;
171*724ba675SRob Herring		gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
172*724ba675SRob Herring	};
173*724ba675SRob Herring
174*724ba675SRob Herring	reg_2p5v: regulator-2p5v {
175*724ba675SRob Herring		compatible = "regulator-fixed";
176*724ba675SRob Herring		regulator-name = "2P5V";
177*724ba675SRob Herring		regulator-min-microvolt = <2500000>;
178*724ba675SRob Herring		regulator-max-microvolt = <2500000>;
179*724ba675SRob Herring		regulator-always-on;
180*724ba675SRob Herring	};
181*724ba675SRob Herring
182*724ba675SRob Herring	reg_3p3v: regulator-3p3v {
183*724ba675SRob Herring		compatible = "regulator-fixed";
184*724ba675SRob Herring		regulator-name = "3P3V";
185*724ba675SRob Herring		regulator-min-microvolt = <3300000>;
186*724ba675SRob Herring		regulator-max-microvolt = <3300000>;
187*724ba675SRob Herring		regulator-always-on;
188*724ba675SRob Herring	};
189*724ba675SRob Herring
190*724ba675SRob Herring	reg_5p0v: regulator-5p0v {
191*724ba675SRob Herring		compatible = "regulator-fixed";
192*724ba675SRob Herring		regulator-name = "5P0V";
193*724ba675SRob Herring		regulator-min-microvolt = <5000000>;
194*724ba675SRob Herring		regulator-max-microvolt = <5000000>;
195*724ba675SRob Herring		regulator-always-on;
196*724ba675SRob Herring	};
197*724ba675SRob Herring
198*724ba675SRob Herring	reg_12p0v: regulator-12p0v {
199*724ba675SRob Herring		compatible = "regulator-fixed";
200*724ba675SRob Herring		regulator-name = "12P0V";
201*724ba675SRob Herring		regulator-min-microvolt = <12000000>;
202*724ba675SRob Herring		regulator-max-microvolt = <12000000>;
203*724ba675SRob Herring		gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
204*724ba675SRob Herring		enable-active-high;
205*724ba675SRob Herring	};
206*724ba675SRob Herring
207*724ba675SRob Herring	reg_1p4v: regulator-vddsoc {
208*724ba675SRob Herring		compatible = "regulator-fixed";
209*724ba675SRob Herring		regulator-name = "vdd_soc";
210*724ba675SRob Herring		regulator-min-microvolt = <1400000>;
211*724ba675SRob Herring		regulator-max-microvolt = <1400000>;
212*724ba675SRob Herring		regulator-always-on;
213*724ba675SRob Herring	};
214*724ba675SRob Herring
215*724ba675SRob Herring	reg_usb_h1_vbus: regulator-usb-h1-vbus {
216*724ba675SRob Herring		compatible = "regulator-fixed";
217*724ba675SRob Herring		regulator-name = "usb_h1_vbus";
218*724ba675SRob Herring		regulator-min-microvolt = <5000000>;
219*724ba675SRob Herring		regulator-max-microvolt = <5000000>;
220*724ba675SRob Herring		regulator-always-on;
221*724ba675SRob Herring	};
222*724ba675SRob Herring
223*724ba675SRob Herring	reg_usb_otg_vbus: regulator-usb-otg-vbus {
224*724ba675SRob Herring		compatible = "regulator-fixed";
225*724ba675SRob Herring		regulator-name = "usb_otg_vbus";
226*724ba675SRob Herring		regulator-min-microvolt = <5000000>;
227*724ba675SRob Herring		regulator-max-microvolt = <5000000>;
228*724ba675SRob Herring		gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
229*724ba675SRob Herring		enable-active-high;
230*724ba675SRob Herring	};
231*724ba675SRob Herring
232*724ba675SRob Herring	sound {
233*724ba675SRob Herring		compatible = "fsl,imx6q-ventana-sgtl5000",
234*724ba675SRob Herring			     "fsl,imx-audio-sgtl5000";
235*724ba675SRob Herring		model = "sgtl5000-audio";
236*724ba675SRob Herring		ssi-controller = <&ssi1>;
237*724ba675SRob Herring		audio-codec = <&sgtl5000>;
238*724ba675SRob Herring		audio-routing =
239*724ba675SRob Herring			"MIC_IN", "Mic Jack",
240*724ba675SRob Herring			"Mic Jack", "Mic Bias",
241*724ba675SRob Herring			"Headphone Jack", "HP_OUT";
242*724ba675SRob Herring		mux-int-port = <1>;
243*724ba675SRob Herring		mux-ext-port = <4>;
244*724ba675SRob Herring	};
245*724ba675SRob Herring};
246*724ba675SRob Herring
247*724ba675SRob Herring&audmux {
248*724ba675SRob Herring	pinctrl-names = "default";
249*724ba675SRob Herring	pinctrl-0 = <&pinctrl_audmux>;
250*724ba675SRob Herring	status = "okay";
251*724ba675SRob Herring};
252*724ba675SRob Herring
253*724ba675SRob Herring&ecspi3 {
254*724ba675SRob Herring	cs-gpios = <&gpio4 24 GPIO_ACTIVE_LOW>;
255*724ba675SRob Herring	pinctrl-names = "default";
256*724ba675SRob Herring	pinctrl-0 = <&pinctrl_ecspi3>;
257*724ba675SRob Herring	status = "okay";
258*724ba675SRob Herring};
259*724ba675SRob Herring
260*724ba675SRob Herring&can1 {
261*724ba675SRob Herring	pinctrl-names = "default";
262*724ba675SRob Herring	pinctrl-0 = <&pinctrl_flexcan>;
263*724ba675SRob Herring	status = "okay";
264*724ba675SRob Herring};
265*724ba675SRob Herring
266*724ba675SRob Herring&clks {
267*724ba675SRob Herring	assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
268*724ba675SRob Herring			  <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
269*724ba675SRob Herring	assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
270*724ba675SRob Herring				 <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
271*724ba675SRob Herring};
272*724ba675SRob Herring
273*724ba675SRob Herring&fec {
274*724ba675SRob Herring	pinctrl-names = "default";
275*724ba675SRob Herring	pinctrl-0 = <&pinctrl_enet>;
276*724ba675SRob Herring	phy-mode = "rgmii-id";
277*724ba675SRob Herring	phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
278*724ba675SRob Herring	status = "okay";
279*724ba675SRob Herring};
280*724ba675SRob Herring
281*724ba675SRob Herring&hdmi {
282*724ba675SRob Herring	ddc-i2c-bus = <&i2c3>;
283*724ba675SRob Herring	status = "okay";
284*724ba675SRob Herring};
285*724ba675SRob Herring
286*724ba675SRob Herring&i2c1 {
287*724ba675SRob Herring	clock-frequency = <100000>;
288*724ba675SRob Herring	pinctrl-names = "default";
289*724ba675SRob Herring	pinctrl-0 = <&pinctrl_i2c1>;
290*724ba675SRob Herring	status = "okay";
291*724ba675SRob Herring
292*724ba675SRob Herring	gsc: gsc@20 {
293*724ba675SRob Herring		compatible = "gw,gsc";
294*724ba675SRob Herring		reg = <0x20>;
295*724ba675SRob Herring		interrupt-parent = <&gpio1>;
296*724ba675SRob Herring		interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
297*724ba675SRob Herring		interrupt-controller;
298*724ba675SRob Herring		#interrupt-cells = <1>;
299*724ba675SRob Herring		#size-cells = <0>;
300*724ba675SRob Herring
301*724ba675SRob Herring		adc {
302*724ba675SRob Herring			compatible = "gw,gsc-adc";
303*724ba675SRob Herring			#address-cells = <1>;
304*724ba675SRob Herring			#size-cells = <0>;
305*724ba675SRob Herring
306*724ba675SRob Herring			channel@0 {
307*724ba675SRob Herring				gw,mode = <0>;
308*724ba675SRob Herring				reg = <0x00>;
309*724ba675SRob Herring				label = "temp";
310*724ba675SRob Herring			};
311*724ba675SRob Herring
312*724ba675SRob Herring			channel@2 {
313*724ba675SRob Herring				gw,mode = <1>;
314*724ba675SRob Herring				reg = <0x02>;
315*724ba675SRob Herring				label = "vdd_vin";
316*724ba675SRob Herring			};
317*724ba675SRob Herring
318*724ba675SRob Herring			channel@5 {
319*724ba675SRob Herring				gw,mode = <1>;
320*724ba675SRob Herring				reg = <0x05>;
321*724ba675SRob Herring				label = "vdd_3p3";
322*724ba675SRob Herring			};
323*724ba675SRob Herring
324*724ba675SRob Herring			channel@8 {
325*724ba675SRob Herring				gw,mode = <1>;
326*724ba675SRob Herring				reg = <0x08>;
327*724ba675SRob Herring				label = "vdd_bat";
328*724ba675SRob Herring			};
329*724ba675SRob Herring
330*724ba675SRob Herring			channel@b {
331*724ba675SRob Herring				gw,mode = <1>;
332*724ba675SRob Herring				reg = <0x0b>;
333*724ba675SRob Herring				label = "vdd_5p0";
334*724ba675SRob Herring			};
335*724ba675SRob Herring
336*724ba675SRob Herring			channel@e {
337*724ba675SRob Herring				gw,mode = <1>;
338*724ba675SRob Herring				reg = <0xe>;
339*724ba675SRob Herring				label = "vdd_arm";
340*724ba675SRob Herring			};
341*724ba675SRob Herring
342*724ba675SRob Herring			channel@11 {
343*724ba675SRob Herring				gw,mode = <1>;
344*724ba675SRob Herring				reg = <0x11>;
345*724ba675SRob Herring				label = "vdd_soc";
346*724ba675SRob Herring			};
347*724ba675SRob Herring
348*724ba675SRob Herring			channel@14 {
349*724ba675SRob Herring				gw,mode = <1>;
350*724ba675SRob Herring				reg = <0x14>;
351*724ba675SRob Herring				label = "vdd_3p0";
352*724ba675SRob Herring			};
353*724ba675SRob Herring
354*724ba675SRob Herring			channel@17 {
355*724ba675SRob Herring				gw,mode = <1>;
356*724ba675SRob Herring				reg = <0x17>;
357*724ba675SRob Herring				label = "vdd_1p5";
358*724ba675SRob Herring			};
359*724ba675SRob Herring
360*724ba675SRob Herring			channel@1d {
361*724ba675SRob Herring				gw,mode = <1>;
362*724ba675SRob Herring				reg = <0x1d>;
363*724ba675SRob Herring				label = "vdd_1p8";
364*724ba675SRob Herring			};
365*724ba675SRob Herring
366*724ba675SRob Herring			channel@20 {
367*724ba675SRob Herring				gw,mode = <1>;
368*724ba675SRob Herring				reg = <0x20>;
369*724ba675SRob Herring				label = "vdd_an1";
370*724ba675SRob Herring			};
371*724ba675SRob Herring
372*724ba675SRob Herring			channel@23 {
373*724ba675SRob Herring				gw,mode = <1>;
374*724ba675SRob Herring				reg = <0x23>;
375*724ba675SRob Herring				label = "vdd_2p5";
376*724ba675SRob Herring			};
377*724ba675SRob Herring
378*724ba675SRob Herring			channel@26 {
379*724ba675SRob Herring				gw,mode = <1>;
380*724ba675SRob Herring				reg = <0x26>;
381*724ba675SRob Herring				label = "vdd_gps";
382*724ba675SRob Herring			};
383*724ba675SRob Herring
384*724ba675SRob Herring			channel@29 {
385*724ba675SRob Herring				gw,mode = <1>;
386*724ba675SRob Herring				reg = <0x29>;
387*724ba675SRob Herring				label = "vdd_an2";
388*724ba675SRob Herring			};
389*724ba675SRob Herring		};
390*724ba675SRob Herring	};
391*724ba675SRob Herring
392*724ba675SRob Herring	gsc_gpio: gpio@23 {
393*724ba675SRob Herring		compatible = "nxp,pca9555";
394*724ba675SRob Herring		reg = <0x23>;
395*724ba675SRob Herring		gpio-controller;
396*724ba675SRob Herring		#gpio-cells = <2>;
397*724ba675SRob Herring		interrupt-parent = <&gsc>;
398*724ba675SRob Herring		interrupts = <4>;
399*724ba675SRob Herring	};
400*724ba675SRob Herring
401*724ba675SRob Herring	eeprom1: eeprom@50 {
402*724ba675SRob Herring		compatible = "atmel,24c02";
403*724ba675SRob Herring		reg = <0x50>;
404*724ba675SRob Herring		pagesize = <16>;
405*724ba675SRob Herring	};
406*724ba675SRob Herring
407*724ba675SRob Herring	eeprom2: eeprom@51 {
408*724ba675SRob Herring		compatible = "atmel,24c02";
409*724ba675SRob Herring		reg = <0x51>;
410*724ba675SRob Herring		pagesize = <16>;
411*724ba675SRob Herring	};
412*724ba675SRob Herring
413*724ba675SRob Herring	eeprom3: eeprom@52 {
414*724ba675SRob Herring		compatible = "atmel,24c02";
415*724ba675SRob Herring		reg = <0x52>;
416*724ba675SRob Herring		pagesize = <16>;
417*724ba675SRob Herring	};
418*724ba675SRob Herring
419*724ba675SRob Herring	eeprom4: eeprom@53 {
420*724ba675SRob Herring		compatible = "atmel,24c02";
421*724ba675SRob Herring		reg = <0x53>;
422*724ba675SRob Herring		pagesize = <16>;
423*724ba675SRob Herring	};
424*724ba675SRob Herring
425*724ba675SRob Herring	ds1672: rtc@68 {
426*724ba675SRob Herring		compatible = "dallas,ds1672";
427*724ba675SRob Herring		reg = <0x68>;
428*724ba675SRob Herring	};
429*724ba675SRob Herring};
430*724ba675SRob Herring
431*724ba675SRob Herring&i2c2 {
432*724ba675SRob Herring	clock-frequency = <100000>;
433*724ba675SRob Herring	pinctrl-names = "default";
434*724ba675SRob Herring	pinctrl-0 = <&pinctrl_i2c2>;
435*724ba675SRob Herring	status = "okay";
436*724ba675SRob Herring
437*724ba675SRob Herring	sgtl5000: codec@a {
438*724ba675SRob Herring		compatible = "fsl,sgtl5000";
439*724ba675SRob Herring		reg = <0x0a>;
440*724ba675SRob Herring		#sound-dai-cells = <0>;
441*724ba675SRob Herring		clocks = <&clks IMX6QDL_CLK_CKO>;
442*724ba675SRob Herring		VDDA-supply = <&reg_1p8v>;
443*724ba675SRob Herring		VDDIO-supply = <&reg_3p3v>;
444*724ba675SRob Herring	};
445*724ba675SRob Herring
446*724ba675SRob Herring	magn@1c {
447*724ba675SRob Herring		compatible = "st,lsm9ds1-magn";
448*724ba675SRob Herring		reg = <0x1c>;
449*724ba675SRob Herring		pinctrl-names = "default";
450*724ba675SRob Herring		pinctrl-0 = <&pinctrl_mag>;
451*724ba675SRob Herring		interrupt-parent = <&gpio5>;
452*724ba675SRob Herring		interrupts = <9 IRQ_TYPE_EDGE_RISING>;
453*724ba675SRob Herring	};
454*724ba675SRob Herring
455*724ba675SRob Herring	tca8418: keypad@34 {
456*724ba675SRob Herring		compatible = "ti,tca8418";
457*724ba675SRob Herring		pinctrl-names = "default";
458*724ba675SRob Herring		pinctrl-0 = <&pinctrl_keypad>;
459*724ba675SRob Herring		reg = <0x34>;
460*724ba675SRob Herring		interrupt-parent = <&gpio5>;
461*724ba675SRob Herring		interrupts = <11 IRQ_TYPE_EDGE_FALLING>;
462*724ba675SRob Herring		linux,keymap = < MATRIX_KEY(0x00, 0x01, BTN_0)
463*724ba675SRob Herring			         MATRIX_KEY(0x00, 0x00, BTN_1)
464*724ba675SRob Herring			         MATRIX_KEY(0x01, 0x01, BTN_2)
465*724ba675SRob Herring			         MATRIX_KEY(0x01, 0x00, BTN_3)
466*724ba675SRob Herring			         MATRIX_KEY(0x02, 0x00, BTN_4)
467*724ba675SRob Herring			         MATRIX_KEY(0x00, 0x03, BTN_5)
468*724ba675SRob Herring			         MATRIX_KEY(0x00, 0x02, BTN_6)
469*724ba675SRob Herring			         MATRIX_KEY(0x01, 0x03, BTN_7)
470*724ba675SRob Herring			         MATRIX_KEY(0x01, 0x02, BTN_8)
471*724ba675SRob Herring			         MATRIX_KEY(0x02, 0x02, BTN_9)
472*724ba675SRob Herring		>;
473*724ba675SRob Herring		keypad,num-rows = <4>;
474*724ba675SRob Herring		keypad,num-columns = <4>;
475*724ba675SRob Herring	};
476*724ba675SRob Herring
477*724ba675SRob Herring	ltc3676: pmic@3c {
478*724ba675SRob Herring		compatible = "lltc,ltc3676";
479*724ba675SRob Herring		pinctrl-names = "default";
480*724ba675SRob Herring		pinctrl-0 = <&pinctrl_pmic>;
481*724ba675SRob Herring		reg = <0x3c>;
482*724ba675SRob Herring		interrupt-parent = <&gpio1>;
483*724ba675SRob Herring		interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
484*724ba675SRob Herring
485*724ba675SRob Herring		regulators {
486*724ba675SRob Herring			/* VDD_DDR (1+R1/R2 = 2.105) */
487*724ba675SRob Herring			reg_vdd_ddr: sw2 {
488*724ba675SRob Herring				regulator-name = "vddddr";
489*724ba675SRob Herring				regulator-min-microvolt = <868310>;
490*724ba675SRob Herring				regulator-max-microvolt = <1684000>;
491*724ba675SRob Herring				lltc,fb-voltage-divider = <221000 200000>;
492*724ba675SRob Herring				regulator-ramp-delay = <7000>;
493*724ba675SRob Herring				regulator-boot-on;
494*724ba675SRob Herring				regulator-always-on;
495*724ba675SRob Herring			};
496*724ba675SRob Herring
497*724ba675SRob Herring			/* VDD_ARM (1+R1/R2 = 1.931) */
498*724ba675SRob Herring			reg_vdd_arm: sw3 {
499*724ba675SRob Herring				regulator-name = "vddarm";
500*724ba675SRob Herring				regulator-min-microvolt = <796551>;
501*724ba675SRob Herring				regulator-max-microvolt = <1544827>;
502*724ba675SRob Herring				lltc,fb-voltage-divider = <243000 261000>;
503*724ba675SRob Herring				regulator-ramp-delay = <7000>;
504*724ba675SRob Herring				regulator-boot-on;
505*724ba675SRob Herring				regulator-always-on;
506*724ba675SRob Herring				linux,phandle = <&reg_vdd_arm>;
507*724ba675SRob Herring			};
508*724ba675SRob Herring
509*724ba675SRob Herring			/* VDD_1P8 (1+R1/R2 = 2.505): GPS/VideoIn/ENET-PHY */
510*724ba675SRob Herring			reg_1p8v: sw4 {
511*724ba675SRob Herring				regulator-name = "vdd1p8";
512*724ba675SRob Herring				regulator-min-microvolt = <1033310>;
513*724ba675SRob Herring				regulator-max-microvolt = <2004000>;
514*724ba675SRob Herring				lltc,fb-voltage-divider = <301000 200000>;
515*724ba675SRob Herring				regulator-ramp-delay = <7000>;
516*724ba675SRob Herring				regulator-boot-on;
517*724ba675SRob Herring				regulator-always-on;
518*724ba675SRob Herring			};
519*724ba675SRob Herring
520*724ba675SRob Herring			/* VDD_1P0 (1+R1/R2 = 1.39): PCIe/ENET-PHY */
521*724ba675SRob Herring			reg_1p0v: ldo2 {
522*724ba675SRob Herring				regulator-name = "vdd1p0";
523*724ba675SRob Herring				regulator-min-microvolt = <950000>;
524*724ba675SRob Herring				regulator-max-microvolt = <1050000>;
525*724ba675SRob Herring				lltc,fb-voltage-divider = <78700 200000>;
526*724ba675SRob Herring				regulator-boot-on;
527*724ba675SRob Herring				regulator-always-on;
528*724ba675SRob Herring			};
529*724ba675SRob Herring
530*724ba675SRob Herring			/* VDD_AUD_1P8: Audio codec */
531*724ba675SRob Herring			reg_aud_1p8v: ldo3 {
532*724ba675SRob Herring				regulator-name = "vdd1p8a";
533*724ba675SRob Herring				regulator-min-microvolt = <1800000>;
534*724ba675SRob Herring				regulator-max-microvolt = <1800000>;
535*724ba675SRob Herring				regulator-boot-on;
536*724ba675SRob Herring			};
537*724ba675SRob Herring
538*724ba675SRob Herring			/* VDD_HIGH (1+R1/R2 = 4.17) */
539*724ba675SRob Herring			reg_3p0v: ldo4 {
540*724ba675SRob Herring				regulator-name = "vdd3p0";
541*724ba675SRob Herring				regulator-min-microvolt = <3023250>;
542*724ba675SRob Herring				regulator-max-microvolt = <3023250>;
543*724ba675SRob Herring				lltc,fb-voltage-divider = <634000 200000>;
544*724ba675SRob Herring				regulator-boot-on;
545*724ba675SRob Herring				regulator-always-on;
546*724ba675SRob Herring			};
547*724ba675SRob Herring		};
548*724ba675SRob Herring	};
549*724ba675SRob Herring
550*724ba675SRob Herring	imu@6a {
551*724ba675SRob Herring		compatible = "st,lsm9ds1-imu";
552*724ba675SRob Herring		reg = <0x6a>;
553*724ba675SRob Herring		st,drdy-int-pin = <1>;
554*724ba675SRob Herring		pinctrl-names = "default";
555*724ba675SRob Herring		pinctrl-0 = <&pinctrl_imu>;
556*724ba675SRob Herring		interrupt-parent = <&gpio5>;
557*724ba675SRob Herring		interrupts = <6 IRQ_TYPE_LEVEL_HIGH>;
558*724ba675SRob Herring	};
559*724ba675SRob Herring};
560*724ba675SRob Herring
561*724ba675SRob Herring&i2c3 {
562*724ba675SRob Herring	clock-frequency = <100000>;
563*724ba675SRob Herring	pinctrl-names = "default";
564*724ba675SRob Herring	pinctrl-0 = <&pinctrl_i2c3>;
565*724ba675SRob Herring	status = "okay";
566*724ba675SRob Herring
567*724ba675SRob Herring	egalax_ts: touchscreen@4 {
568*724ba675SRob Herring		compatible = "eeti,egalax_ts";
569*724ba675SRob Herring		reg = <0x04>;
570*724ba675SRob Herring		interrupt-parent = <&gpio5>;
571*724ba675SRob Herring		interrupts = <12 IRQ_TYPE_EDGE_FALLING>;
572*724ba675SRob Herring		wakeup-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
573*724ba675SRob Herring	};
574*724ba675SRob Herring};
575*724ba675SRob Herring
576*724ba675SRob Herring&ldb {
577*724ba675SRob Herring	fsl,dual-channel;
578*724ba675SRob Herring	status = "okay";
579*724ba675SRob Herring
580*724ba675SRob Herring	lvds-channel@0 {
581*724ba675SRob Herring		fsl,data-mapping = "spwg";
582*724ba675SRob Herring		fsl,data-width = <18>;
583*724ba675SRob Herring		status = "okay";
584*724ba675SRob Herring
585*724ba675SRob Herring		display-timings {
586*724ba675SRob Herring			native-mode = <&timing0>;
587*724ba675SRob Herring			timing0: hsd100pxn1 {
588*724ba675SRob Herring				clock-frequency = <65000000>;
589*724ba675SRob Herring				hactive = <1024>;
590*724ba675SRob Herring				vactive = <768>;
591*724ba675SRob Herring				hback-porch = <220>;
592*724ba675SRob Herring				hfront-porch = <40>;
593*724ba675SRob Herring				vback-porch = <21>;
594*724ba675SRob Herring				vfront-porch = <7>;
595*724ba675SRob Herring				hsync-len = <60>;
596*724ba675SRob Herring				vsync-len = <10>;
597*724ba675SRob Herring			};
598*724ba675SRob Herring		};
599*724ba675SRob Herring	};
600*724ba675SRob Herring};
601*724ba675SRob Herring
602*724ba675SRob Herring&pcie {
603*724ba675SRob Herring	pinctrl-names = "default";
604*724ba675SRob Herring	pinctrl-0 = <&pinctrl_pcie>;
605*724ba675SRob Herring	reset-gpio = <&gpio4 31 GPIO_ACTIVE_LOW>;
606*724ba675SRob Herring	status = "okay";
607*724ba675SRob Herring};
608*724ba675SRob Herring
609*724ba675SRob Herring&pwm2 {
610*724ba675SRob Herring	pinctrl-names = "default";
611*724ba675SRob Herring	pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
612*724ba675SRob Herring	status = "disabled";
613*724ba675SRob Herring};
614*724ba675SRob Herring
615*724ba675SRob Herring&pwm3 {
616*724ba675SRob Herring	pinctrl-names = "default";
617*724ba675SRob Herring	pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
618*724ba675SRob Herring	status = "disabled";
619*724ba675SRob Herring};
620*724ba675SRob Herring
621*724ba675SRob Herring&pwm4 {
622*724ba675SRob Herring	#pwm-cells = <2>;
623*724ba675SRob Herring	pinctrl-names = "default";
624*724ba675SRob Herring	pinctrl-0 = <&pinctrl_pwm4>;
625*724ba675SRob Herring	status = "okay";
626*724ba675SRob Herring};
627*724ba675SRob Herring
628*724ba675SRob Herring&ssi1 {
629*724ba675SRob Herring	status = "okay";
630*724ba675SRob Herring};
631*724ba675SRob Herring
632*724ba675SRob Herring&uart1 {
633*724ba675SRob Herring	pinctrl-names = "default";
634*724ba675SRob Herring	pinctrl-0 = <&pinctrl_uart1>;
635*724ba675SRob Herring	rts-gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>;
636*724ba675SRob Herring	status = "okay";
637*724ba675SRob Herring};
638*724ba675SRob Herring
639*724ba675SRob Herring&uart2 {
640*724ba675SRob Herring	pinctrl-names = "default";
641*724ba675SRob Herring	pinctrl-0 = <&pinctrl_uart2>;
642*724ba675SRob Herring	status = "okay";
643*724ba675SRob Herring};
644*724ba675SRob Herring
645*724ba675SRob Herring&uart5 {
646*724ba675SRob Herring	pinctrl-names = "default";
647*724ba675SRob Herring	pinctrl-0 = <&pinctrl_uart5>;
648*724ba675SRob Herring	status = "okay";
649*724ba675SRob Herring};
650*724ba675SRob Herring
651*724ba675SRob Herring&usbotg {
652*724ba675SRob Herring	vbus-supply = <&reg_usb_otg_vbus>;
653*724ba675SRob Herring	pinctrl-names = "default";
654*724ba675SRob Herring	pinctrl-0 = <&pinctrl_usbotg>;
655*724ba675SRob Herring	disable-over-current;
656*724ba675SRob Herring	status = "okay";
657*724ba675SRob Herring};
658*724ba675SRob Herring
659*724ba675SRob Herring&usbh1 {
660*724ba675SRob Herring	vbus-supply = <&reg_usb_h1_vbus>;
661*724ba675SRob Herring	pinctrl-names = "default";
662*724ba675SRob Herring	pinctrl-0 = <&pinctrl_usbh1>;
663*724ba675SRob Herring	status = "okay";
664*724ba675SRob Herring};
665*724ba675SRob Herring
666*724ba675SRob Herring&usdhc2 {
667*724ba675SRob Herring	pinctrl-names = "default";
668*724ba675SRob Herring	pinctrl-0 = <&pinctrl_usdhc2>;
669*724ba675SRob Herring	bus-width = <8>;
670*724ba675SRob Herring	vmmc-supply = <&reg_3p3v>;
671*724ba675SRob Herring	non-removable;
672*724ba675SRob Herring	status = "okay";
673*724ba675SRob Herring};
674*724ba675SRob Herring
675*724ba675SRob Herring&usdhc3 {
676*724ba675SRob Herring	pinctrl-names = "default", "state_100mhz", "state_200mhz";
677*724ba675SRob Herring	pinctrl-0 = <&pinctrl_usdhc3>;
678*724ba675SRob Herring	pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
679*724ba675SRob Herring	pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
680*724ba675SRob Herring	cd-gpios = <&gpio7 0 GPIO_ACTIVE_HIGH>;
681*724ba675SRob Herring	vmmc-supply = <&reg_3p3v>;
682*724ba675SRob Herring	status = "okay";
683*724ba675SRob Herring};
684*724ba675SRob Herring
685*724ba675SRob Herring&wdog1 {
686*724ba675SRob Herring	pinctrl-names = "default";
687*724ba675SRob Herring	pinctrl-0 = <&pinctrl_wdog>;
688*724ba675SRob Herring	fsl,ext-reset-output;
689*724ba675SRob Herring};
690*724ba675SRob Herring
691*724ba675SRob Herring&iomuxc {
692*724ba675SRob Herring	pinctrl_audmux: audmuxgrp {
693*724ba675SRob Herring		fsl,pins = <
694*724ba675SRob Herring			/* AUD4 */
695*724ba675SRob Herring			MX6QDL_PAD_DISP0_DAT20__AUD4_TXC	0x130b0
696*724ba675SRob Herring			MX6QDL_PAD_DISP0_DAT21__AUD4_TXD	0x110b0
697*724ba675SRob Herring			MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS	0x130b0
698*724ba675SRob Herring			MX6QDL_PAD_DISP0_DAT23__AUD4_RXD	0x130b0
699*724ba675SRob Herring			MX6QDL_PAD_GPIO_0__CCM_CLKO1		0x130b0 /* AUD4_MCK */
700*724ba675SRob Herring			/* AUD6 */
701*724ba675SRob Herring			MX6QDL_PAD_DI0_PIN2__AUD6_TXD		0x130b0
702*724ba675SRob Herring			MX6QDL_PAD_DI0_PIN3__AUD6_TXFS		0x130b0
703*724ba675SRob Herring			MX6QDL_PAD_DI0_PIN4__AUD6_RXD		0x130b0
704*724ba675SRob Herring			MX6QDL_PAD_DI0_PIN15__AUD6_TXC		0x130b0
705*724ba675SRob Herring		>;
706*724ba675SRob Herring	};
707*724ba675SRob Herring
708*724ba675SRob Herring	pinctrl_ecspi3: escpi3grp {
709*724ba675SRob Herring		fsl,pins = <
710*724ba675SRob Herring			MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK	0x100b1
711*724ba675SRob Herring			MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI	0x100b1
712*724ba675SRob Herring			MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO	0x100b1
713*724ba675SRob Herring			MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24	0x100b1
714*724ba675SRob Herring		>;
715*724ba675SRob Herring	};
716*724ba675SRob Herring
717*724ba675SRob Herring	pinctrl_enet: enetgrp {
718*724ba675SRob Herring		fsl,pins = <
719*724ba675SRob Herring			MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b030
720*724ba675SRob Herring			MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x1b030
721*724ba675SRob Herring			MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x1b030
722*724ba675SRob Herring			MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b030
723*724ba675SRob Herring			MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b030
724*724ba675SRob Herring			MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x1b030
725*724ba675SRob Herring			MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x1b030
726*724ba675SRob Herring			MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x1b030
727*724ba675SRob Herring			MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x1b030
728*724ba675SRob Herring			MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x1b030
729*724ba675SRob Herring			MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x1b030
730*724ba675SRob Herring			MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x1b030
731*724ba675SRob Herring			MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x1b0b0
732*724ba675SRob Herring			MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b0b0
733*724ba675SRob Herring			MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0
734*724ba675SRob Herring			MX6QDL_PAD_GPIO_16__ENET_REF_CLK	0x4001b0a8
735*724ba675SRob Herring			MX6QDL_PAD_ENET_TXD0__GPIO1_IO30	0x4001b0b0 /* PHY_RST# */
736*724ba675SRob Herring		>;
737*724ba675SRob Herring	};
738*724ba675SRob Herring
739*724ba675SRob Herring	pinctrl_flexcan: flexcangrp {
740*724ba675SRob Herring		fsl,pins = <
741*724ba675SRob Herring			MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX	0x1b0b1
742*724ba675SRob Herring			MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX	0x1b0b1
743*724ba675SRob Herring			MX6QDL_PAD_GPIO_2__GPIO1_IO02		0x4001b0b0 /* CAN_STBY */
744*724ba675SRob Herring		>;
745*724ba675SRob Herring	};
746*724ba675SRob Herring
747*724ba675SRob Herring	pinctrl_gpio_leds: gpioledsgrp {
748*724ba675SRob Herring		fsl,pins = <
749*724ba675SRob Herring			MX6QDL_PAD_KEY_COL0__GPIO4_IO06		0x1b0b0
750*724ba675SRob Herring			MX6QDL_PAD_KEY_ROW0__GPIO4_IO07		0x1b0b0
751*724ba675SRob Herring			MX6QDL_PAD_KEY_ROW4__GPIO4_IO15		0x1b0b0
752*724ba675SRob Herring		>;
753*724ba675SRob Herring	};
754*724ba675SRob Herring
755*724ba675SRob Herring	pinctrl_i2c1: i2c1grp {
756*724ba675SRob Herring		fsl,pins = <
757*724ba675SRob Herring			MX6QDL_PAD_EIM_D21__I2C1_SCL		0x4001b8b1
758*724ba675SRob Herring			MX6QDL_PAD_EIM_D28__I2C1_SDA		0x4001b8b1
759*724ba675SRob Herring			MX6QDL_PAD_GPIO_4__GPIO1_IO04		0xb0b1
760*724ba675SRob Herring		>;
761*724ba675SRob Herring	};
762*724ba675SRob Herring
763*724ba675SRob Herring	pinctrl_i2c2: i2c2grp {
764*724ba675SRob Herring		fsl,pins = <
765*724ba675SRob Herring			MX6QDL_PAD_KEY_COL3__I2C2_SCL		0x4001b8b1
766*724ba675SRob Herring			MX6QDL_PAD_KEY_ROW3__I2C2_SDA		0x4001b8b1
767*724ba675SRob Herring		>;
768*724ba675SRob Herring	};
769*724ba675SRob Herring
770*724ba675SRob Herring	pinctrl_i2c3: i2c3grp {
771*724ba675SRob Herring		fsl,pins = <
772*724ba675SRob Herring			MX6QDL_PAD_GPIO_3__I2C3_SCL		0x4001b8b1
773*724ba675SRob Herring			MX6QDL_PAD_GPIO_6__I2C3_SDA		0x4001b8b1
774*724ba675SRob Herring			MX6QDL_PAD_GPIO_19__GPIO4_IO05		0x4001b0b0 /* DIOI2C_DIS# */
775*724ba675SRob Herring			MX6QDL_PAD_DISP0_DAT18__GPIO5_IO12	0x0001b0b0 /* LVDS_TOUCH_IRQ# */
776*724ba675SRob Herring			MX6QDL_PAD_DISP0_DAT19__GPIO5_IO13	0x0001b0b0 /* LVDS_BACKEN */
777*724ba675SRob Herring		>;
778*724ba675SRob Herring	};
779*724ba675SRob Herring
780*724ba675SRob Herring	pinctrl_imu: imugrp {
781*724ba675SRob Herring		fsl,pins = <
782*724ba675SRob Herring			MX6QDL_PAD_DISP0_DAT12__GPIO5_IO06	0x1b0b0
783*724ba675SRob Herring		>;
784*724ba675SRob Herring	};
785*724ba675SRob Herring
786*724ba675SRob Herring	pinctrl_keypad: keypadgrp {
787*724ba675SRob Herring		fsl,pins = <
788*724ba675SRob Herring			MX6QDL_PAD_DISP0_DAT17__GPIO5_IO11	0x0001b0b0 /* KEYPAD_IRQ# */
789*724ba675SRob Herring			MX6QDL_PAD_DISP0_DAT9__GPIO4_IO30	0x0001b0b0 /* KEYPAD_LED_EN */
790*724ba675SRob Herring		>;
791*724ba675SRob Herring	};
792*724ba675SRob Herring
793*724ba675SRob Herring	pinctrl_mag: maggrp {
794*724ba675SRob Herring		fsl,pins = <
795*724ba675SRob Herring			MX6QDL_PAD_DISP0_DAT15__GPIO5_IO09	0x1b0b0
796*724ba675SRob Herring		>;
797*724ba675SRob Herring	};
798*724ba675SRob Herring
799*724ba675SRob Herring	pinctrl_pcie: pciegrp {
800*724ba675SRob Herring		fsl,pins = <
801*724ba675SRob Herring			MX6QDL_PAD_DISP0_DAT10__GPIO4_IO31	0x1b0b0    /* PCI_RST# */
802*724ba675SRob Herring			MX6QDL_PAD_GPIO_17__GPIO7_IO12		0x4001b0b0 /* PCIESKT_WDIS# */
803*724ba675SRob Herring		>;
804*724ba675SRob Herring	};
805*724ba675SRob Herring
806*724ba675SRob Herring	pinctrl_pmic: pmicgrp {
807*724ba675SRob Herring		fsl,pins = <
808*724ba675SRob Herring			MX6QDL_PAD_GPIO_8__GPIO1_IO08		0x0001b0b0 /* PMIC_IRQ# */
809*724ba675SRob Herring		>;
810*724ba675SRob Herring	};
811*724ba675SRob Herring
812*724ba675SRob Herring	pinctrl_pps: ppsgrp {
813*724ba675SRob Herring		fsl,pins = <
814*724ba675SRob Herring			MX6QDL_PAD_ENET_RXD1__GPIO1_IO26	0x1b0b1
815*724ba675SRob Herring		>;
816*724ba675SRob Herring	};
817*724ba675SRob Herring
818*724ba675SRob Herring	pinctrl_pwm2: pwm2grp {
819*724ba675SRob Herring		fsl,pins = <
820*724ba675SRob Herring			MX6QDL_PAD_SD1_DAT2__PWM2_OUT		0x1b0b1
821*724ba675SRob Herring		>;
822*724ba675SRob Herring	};
823*724ba675SRob Herring
824*724ba675SRob Herring	pinctrl_pwm3: pwm3grp {
825*724ba675SRob Herring		fsl,pins = <
826*724ba675SRob Herring			MX6QDL_PAD_SD1_DAT1__PWM3_OUT		0x1b0b1
827*724ba675SRob Herring		>;
828*724ba675SRob Herring	};
829*724ba675SRob Herring
830*724ba675SRob Herring	pinctrl_pwm4: pwm4grp {
831*724ba675SRob Herring		fsl,pins = <
832*724ba675SRob Herring			MX6QDL_PAD_SD1_CMD__PWM4_OUT		0x1b0b1
833*724ba675SRob Herring		>;
834*724ba675SRob Herring	};
835*724ba675SRob Herring
836*724ba675SRob Herring	pinctrl_uart1: uart1grp {
837*724ba675SRob Herring		fsl,pins = <
838*724ba675SRob Herring			MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA	0x1b0b1
839*724ba675SRob Herring			MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA	0x1b0b1
840*724ba675SRob Herring			MX6QDL_PAD_SD3_DAT4__GPIO7_IO01		0x4001b0b1 /* TEN */
841*724ba675SRob Herring		>;
842*724ba675SRob Herring	};
843*724ba675SRob Herring
844*724ba675SRob Herring	pinctrl_uart2: uart2grp {
845*724ba675SRob Herring		fsl,pins = <
846*724ba675SRob Herring			MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA	0x1b0b1
847*724ba675SRob Herring			MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA	0x1b0b1
848*724ba675SRob Herring		>;
849*724ba675SRob Herring	};
850*724ba675SRob Herring
851*724ba675SRob Herring	pinctrl_uart5: uart5grp {
852*724ba675SRob Herring		fsl,pins = <
853*724ba675SRob Herring			MX6QDL_PAD_KEY_COL1__UART5_TX_DATA	0x1b0b1
854*724ba675SRob Herring			MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA	0x1b0b1
855*724ba675SRob Herring		>;
856*724ba675SRob Herring	};
857*724ba675SRob Herring
858*724ba675SRob Herring	pinctrl_usbh1: usbh1grp {
859*724ba675SRob Herring		fsl,pins = <
860*724ba675SRob Herring			MX6QDL_PAD_GPIO_9__GPIO1_IO09		0x4001b0b0 /* USBHUB_RST# */
861*724ba675SRob Herring		>;
862*724ba675SRob Herring	};
863*724ba675SRob Herring
864*724ba675SRob Herring	pinctrl_usbotg: usbotggrp {
865*724ba675SRob Herring		fsl,pins = <
866*724ba675SRob Herring			MX6QDL_PAD_GPIO_1__USB_OTG_ID		0x17059
867*724ba675SRob Herring			MX6QDL_PAD_EIM_D22__GPIO3_IO22		0x1b0b0 /* PWR_EN */
868*724ba675SRob Herring			MX6QDL_PAD_KEY_COL4__GPIO4_IO14		0x1b0b0 /* OC */
869*724ba675SRob Herring		>;
870*724ba675SRob Herring	};
871*724ba675SRob Herring
872*724ba675SRob Herring	pinctrl_usdhc2: usdhc2grp {
873*724ba675SRob Herring		fsl,pins = <
874*724ba675SRob Herring			MX6QDL_PAD_SD2_CMD__SD2_CMD		0x170f9
875*724ba675SRob Herring			MX6QDL_PAD_SD2_CLK__SD2_CLK		0x100f9
876*724ba675SRob Herring			MX6QDL_PAD_SD2_DAT0__SD2_DATA0		0x170f9
877*724ba675SRob Herring			MX6QDL_PAD_SD2_DAT1__SD2_DATA1		0x170f9
878*724ba675SRob Herring			MX6QDL_PAD_SD2_DAT2__SD2_DATA2		0x170f9
879*724ba675SRob Herring			MX6QDL_PAD_SD2_DAT3__SD2_DATA3		0x170f9
880*724ba675SRob Herring			MX6QDL_PAD_NANDF_D4__SD2_DATA4		0x170f9
881*724ba675SRob Herring			MX6QDL_PAD_NANDF_D5__SD2_DATA5		0x170f9
882*724ba675SRob Herring			MX6QDL_PAD_NANDF_D6__SD2_DATA6		0x170f9
883*724ba675SRob Herring			MX6QDL_PAD_NANDF_D7__SD2_DATA7		0x170f9
884*724ba675SRob Herring		>;
885*724ba675SRob Herring	};
886*724ba675SRob Herring
887*724ba675SRob Herring	pinctrl_usdhc3: usdhc3grp {
888*724ba675SRob Herring		fsl,pins = <
889*724ba675SRob Herring			MX6QDL_PAD_SD3_CMD__SD3_CMD		0x17059
890*724ba675SRob Herring			MX6QDL_PAD_SD3_CLK__SD3_CLK		0x10059
891*724ba675SRob Herring			MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x17059
892*724ba675SRob Herring			MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x17059
893*724ba675SRob Herring			MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x17059
894*724ba675SRob Herring			MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x17059
895*724ba675SRob Herring			MX6QDL_PAD_SD3_DAT5__GPIO7_IO00		0x17059 /* CD */
896*724ba675SRob Herring			MX6QDL_PAD_NANDF_CS1__SD3_VSELECT	0x17059
897*724ba675SRob Herring		>;
898*724ba675SRob Herring	};
899*724ba675SRob Herring
900*724ba675SRob Herring	pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
901*724ba675SRob Herring		fsl,pins = <
902*724ba675SRob Herring			MX6QDL_PAD_SD3_CMD__SD3_CMD		0x170b9
903*724ba675SRob Herring			MX6QDL_PAD_SD3_CLK__SD3_CLK		0x100b9
904*724ba675SRob Herring			MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x170b9
905*724ba675SRob Herring			MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x170b9
906*724ba675SRob Herring			MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x170b9
907*724ba675SRob Herring			MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x170b9
908*724ba675SRob Herring			MX6QDL_PAD_SD3_DAT5__GPIO7_IO00		0x170b9 /* CD */
909*724ba675SRob Herring			MX6QDL_PAD_NANDF_CS1__SD3_VSELECT	0x170b9
910*724ba675SRob Herring		>;
911*724ba675SRob Herring	};
912*724ba675SRob Herring
913*724ba675SRob Herring	pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
914*724ba675SRob Herring		fsl,pins = <
915*724ba675SRob Herring			MX6QDL_PAD_SD3_CMD__SD3_CMD		0x170f9
916*724ba675SRob Herring			MX6QDL_PAD_SD3_CLK__SD3_CLK		0x100f9
917*724ba675SRob Herring			MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x170f9
918*724ba675SRob Herring			MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x170f9
919*724ba675SRob Herring			MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x170f9
920*724ba675SRob Herring			MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x170f9
921*724ba675SRob Herring			MX6QDL_PAD_SD3_DAT5__GPIO7_IO00		0x170f9 /* CD */
922*724ba675SRob Herring			MX6QDL_PAD_NANDF_CS1__SD3_VSELECT	0x170f9
923*724ba675SRob Herring		>;
924*724ba675SRob Herring	};
925*724ba675SRob Herring
926*724ba675SRob Herring	pinctrl_wdog: wdoggrp {
927*724ba675SRob Herring		fsl,pins = <
928*724ba675SRob Herring			MX6QDL_PAD_DISP0_DAT8__WDOG1_B		0x1b0b0
929*724ba675SRob Herring		>;
930*724ba675SRob Herring	};
931*724ba675SRob Herring};
932