1// SPDX-License-Identifier: GPL-2.0 2#include <dt-bindings/gpio/gpio.h> 3 4/ { 5 dummy_reg: regulator-dummy { 6 compatible = "regulator-fixed"; 7 regulator-name = "dummy-supply"; 8 }; 9 10 reg_usb_otg_vbus: regulator-usb-otg-vbus { 11 compatible = "regulator-fixed"; 12 regulator-name = "usb_otg_vbus"; 13 regulator-min-microvolt = <5000000>; 14 regulator-max-microvolt = <5000000>; 15 gpio = <&gpio3 22 0>; 16 enable-active-high; 17 }; 18 19 chosen { 20 stdout-path = &uart1; 21 }; 22}; 23 24&ecspi3 { 25 cs-gpios = <&gpio4 24 GPIO_ACTIVE_LOW>; 26 pinctrl-names = "default"; 27 pinctrl-0 = <&pinctrl_ecspi3>; 28 status = "okay"; 29 30 flash: flash@0 { 31 #address-cells = <1>; 32 #size-cells = <1>; 33 compatible = "sst,sst25vf040b", "jedec,spi-nor"; 34 spi-max-frequency = <20000000>; 35 reg = <0>; 36 }; 37}; 38 39&fec { 40 pinctrl-names = "default"; 41 pinctrl-0 = <&pinctrl_enet>; 42 status = "okay"; 43 phy-mode = "rgmii"; 44}; 45 46&iomuxc { 47 pinctrl-names = "default"; 48 pinctrl-0 = <&pinctrl_hog>; 49 50 pinctrl_hog: hoggrp { 51 fsl,pins = < 52 MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x80000000 53 MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x80000000 /* PMIC irq */ 54 MX6QDL_PAD_EIM_D26__GPIO3_IO26 0x80000000 /* MAX11801 irq */ 55 MX6QDL_PAD_NANDF_D5__GPIO2_IO05 0x000030b0 /* Backlight enable */ 56 >; 57 }; 58 59 pinctrl_enet: enetgrp { 60 fsl,pins = < 61 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 62 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030 63 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030 64 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 65 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 66 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030 67 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030 68 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030 69 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030 70 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030 71 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030 72 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030 73 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 74 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 75 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 76 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 77 >; 78 }; 79 80 pinctrl_i2c2: i2c2grp { 81 fsl,pins = < 82 MX6QDL_PAD_EIM_EB2__I2C2_SCL 0x4001b8b1 83 MX6QDL_PAD_EIM_D16__I2C2_SDA 0x4001b8b1 84 >; 85 }; 86 87 pinctrl_uart1: uart1grp { 88 fsl,pins = < 89 MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1 90 MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1 91 >; 92 }; 93 94 pinctrl_usbotg: usbotggrp { 95 fsl,pins = < 96 MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059 97 >; 98 }; 99 100 pinctrl_usdhc2: usdhc2grp { 101 fsl,pins = < 102 MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059 103 MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059 104 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059 105 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059 106 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059 107 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059 108 MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x80000000 /* card detect */ 109 >; 110 }; 111 112 pinctrl_usdhc3: usdhc3grp { 113 fsl,pins = < 114 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 115 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 116 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 117 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 118 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 119 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 120 >; 121 }; 122 123 pinctrl_usdhc4: usdhc4grp { 124 fsl,pins = < 125 MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059 126 MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059 127 MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059 128 MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059 129 MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059 130 MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059 131 MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059 132 MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059 133 MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17059 134 MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059 135 >; 136 }; 137 138 pinctrl_ecspi3: ecspi3grp { 139 fsl,pins = < 140 MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO 0x100b1 141 MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI 0x100b1 142 MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK 0x100b1 143 MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24 0x80000000 /* SPI NOR chipselect */ 144 >; 145 }; 146}; 147 148&i2c2 { 149 pinctrl-names = "default"; 150 pinctrl-0 = <&pinctrl_i2c2>; 151 status = "okay"; 152}; 153 154&uart1 { 155 pinctrl-names = "default"; 156 pinctrl-0 = <&pinctrl_uart1>; 157 status = "okay"; 158}; 159 160&usbh1 { 161 status = "okay"; 162}; 163 164&usbotg { 165 vbus-supply = <®_usb_otg_vbus>; 166 pinctrl-names = "default"; 167 pinctrl-0 = <&pinctrl_usbotg>; 168 disable-over-current; 169 dr_mode = "host"; 170 status = "okay"; 171}; 172 173&usdhc2 { /* module slot */ 174 pinctrl-names = "default"; 175 pinctrl-0 = <&pinctrl_usdhc2>; 176 cd-gpios = <&gpio2 2 GPIO_ACTIVE_LOW>; 177 status = "okay"; 178}; 179 180&usdhc3 { /* baseboard slot */ 181 pinctrl-names = "default"; 182 pinctrl-0 = <&pinctrl_usdhc3>; 183}; 184 185&usdhc4 { /* eMMC */ 186 pinctrl-names = "default"; 187 pinctrl-0 = <&pinctrl_usdhc4>; 188 bus-width = <8>; 189 non-removable; 190 status = "okay"; 191}; 192