1724ba675SRob Herring// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2724ba675SRob Herring/* 3724ba675SRob Herring * Copyright 2018 4724ba675SRob Herring * Lukasz Majewski, DENX Software Engineering, lukma@denx.de 5724ba675SRob Herring */ 6724ba675SRob Herring 7724ba675SRob Herring/dts-v1/; 8724ba675SRob Herring 9724ba675SRob Herring#include "imx6q.dtsi" 10724ba675SRob Herring 11724ba675SRob Herring#include <dt-bindings/gpio/gpio.h> 12724ba675SRob Herring#include <dt-bindings/pwm/pwm.h> 13724ba675SRob Herring#include <dt-bindings/sound/fsl-imx-audmux.h> 14724ba675SRob Herring 15724ba675SRob Herring/ { 16724ba675SRob Herring backlight_lcd: backlight-lcd { 17724ba675SRob Herring compatible = "pwm-backlight"; 18*4d1e5adeSUwe Kleine-König pwms = <&pwm1 0 5000000 0>; 19724ba675SRob Herring brightness-levels = <0 255>; 20724ba675SRob Herring num-interpolated-steps = <255>; 21724ba675SRob Herring default-brightness-level = <250>; 22724ba675SRob Herring }; 23724ba675SRob Herring 24724ba675SRob Herring beeper { 25724ba675SRob Herring compatible = "pwm-beeper"; 26*4d1e5adeSUwe Kleine-König pwms = <&pwm2 0 500000 0>; 27724ba675SRob Herring }; 28724ba675SRob Herring 29724ba675SRob Herring lcd_display: display { 30724ba675SRob Herring compatible = "fsl,imx-parallel-display"; 31724ba675SRob Herring #address-cells = <1>; 32724ba675SRob Herring #size-cells = <0>; 33724ba675SRob Herring interface-pix-fmt = "rgb24"; 34724ba675SRob Herring pinctrl-names = "default"; 35724ba675SRob Herring pinctrl-0 = <&pinctrl_ipu1>; 36724ba675SRob Herring 37724ba675SRob Herring port@0 { 38724ba675SRob Herring reg = <0>; 39724ba675SRob Herring 40724ba675SRob Herring lcd_display_in: endpoint { 41724ba675SRob Herring remote-endpoint = <&ipu1_di0_disp0>; 42724ba675SRob Herring }; 43724ba675SRob Herring }; 44724ba675SRob Herring 45724ba675SRob Herring port@1 { 46724ba675SRob Herring reg = <1>; 47724ba675SRob Herring 48724ba675SRob Herring lcd_display_out: endpoint { 49724ba675SRob Herring remote-endpoint = <&lcd_panel_in>; 50724ba675SRob Herring }; 51724ba675SRob Herring }; 52724ba675SRob Herring }; 53724ba675SRob Herring 54724ba675SRob Herring lcd_panel: lcd-panel { 55724ba675SRob Herring compatible = "auo,g070vvn01"; 56724ba675SRob Herring backlight = <&backlight_lcd>; 57724ba675SRob Herring power-supply = <®_display>; 58724ba675SRob Herring 59724ba675SRob Herring port { 60724ba675SRob Herring lcd_panel_in: endpoint { 61724ba675SRob Herring remote-endpoint = <&lcd_display_out>; 62724ba675SRob Herring }; 63724ba675SRob Herring }; 64724ba675SRob Herring }; 65724ba675SRob Herring 66724ba675SRob Herring leds { 67724ba675SRob Herring compatible = "gpio-leds"; 68724ba675SRob Herring 69724ba675SRob Herring led-green { 70724ba675SRob Herring label = "led1"; 71724ba675SRob Herring gpios = <&gpio3 16 GPIO_ACTIVE_HIGH>; 72724ba675SRob Herring linux,default-trigger = "gpio"; 73724ba675SRob Herring default-state = "off"; 74724ba675SRob Herring }; 75724ba675SRob Herring 76724ba675SRob Herring led-red { 77724ba675SRob Herring label = "led0"; 78724ba675SRob Herring gpios = <&gpio3 23 GPIO_ACTIVE_HIGH>; 79724ba675SRob Herring linux,default-trigger = "gpio"; 80724ba675SRob Herring default-state = "off"; 81724ba675SRob Herring }; 82724ba675SRob Herring }; 83724ba675SRob Herring 84724ba675SRob Herring reg_3p3v: regulator-3p3v { 85724ba675SRob Herring compatible = "regulator-fixed"; 86724ba675SRob Herring regulator-name = "3P3V"; 87724ba675SRob Herring regulator-min-microvolt = <3300000>; 88724ba675SRob Herring regulator-max-microvolt = <3300000>; 89724ba675SRob Herring regulator-always-on; 90724ba675SRob Herring }; 91724ba675SRob Herring 92724ba675SRob Herring reg_audio: regulator-audio { 93724ba675SRob Herring compatible = "regulator-fixed"; 94724ba675SRob Herring regulator-name = "sgtl5000-supply"; 95724ba675SRob Herring gpio = <&gpio6 31 GPIO_ACTIVE_HIGH>; 96724ba675SRob Herring enable-active-high; 97724ba675SRob Herring regulator-always-on; 98724ba675SRob Herring }; 99724ba675SRob Herring 100724ba675SRob Herring reg_display: regulator-display { 101724ba675SRob Herring compatible = "regulator-fixed"; 102724ba675SRob Herring regulator-name = "display-supply"; 103724ba675SRob Herring regulator-min-microvolt = <3300000>; 104724ba675SRob Herring regulator-max-microvolt = <3300000>; 105724ba675SRob Herring regulator-always-on; 106724ba675SRob Herring }; 107724ba675SRob Herring 108724ba675SRob Herring reg_usb_h1_vbus: regulator-usb_h1_vbus { 109724ba675SRob Herring compatible = "regulator-fixed"; 110724ba675SRob Herring regulator-name = "usb_h1_vbus"; 111724ba675SRob Herring regulator-min-microvolt = <5000000>; 112724ba675SRob Herring regulator-max-microvolt = <5000000>; 113724ba675SRob Herring enable-active-high; 114724ba675SRob Herring }; 115724ba675SRob Herring 116724ba675SRob Herring sound { 117724ba675SRob Herring compatible = "simple-audio-card"; 118724ba675SRob Herring simple-audio-card,name = "imx6q-sgtl5000-audio"; 119724ba675SRob Herring simple-audio-card,format = "i2s"; 120724ba675SRob Herring simple-audio-card,bitclock-master = <&codec_dai>; 121724ba675SRob Herring simple-audio-card,frame-master = <&codec_dai>; 122724ba675SRob Herring 123724ba675SRob Herring cpu_dai: simple-audio-card,cpu { 124724ba675SRob Herring sound-dai = <&ssi1>; 125724ba675SRob Herring }; 126724ba675SRob Herring 127724ba675SRob Herring codec_dai: simple-audio-card,codec { 128724ba675SRob Herring sound-dai = <&sgtl5000>; 129724ba675SRob Herring }; 130724ba675SRob Herring }; 131724ba675SRob Herring}; 132724ba675SRob Herring 133724ba675SRob Herring&audmux { 134724ba675SRob Herring pinctrl-names = "default"; 135724ba675SRob Herring pinctrl-0 = <&pinctrl_audmux>; 136724ba675SRob Herring status = "okay"; 137724ba675SRob Herring 138724ba675SRob Herring mux-ssi1 { 139724ba675SRob Herring fsl,audmux-port = <0>; 140724ba675SRob Herring fsl,port-config = < 141724ba675SRob Herring (IMX_AUDMUX_V2_PTCR_SYN | 142724ba675SRob Herring IMX_AUDMUX_V2_PTCR_TFSEL(2) | 143724ba675SRob Herring IMX_AUDMUX_V2_PTCR_TCSEL(2) | 144724ba675SRob Herring IMX_AUDMUX_V2_PTCR_TFSDIR | 145724ba675SRob Herring IMX_AUDMUX_V2_PTCR_TCLKDIR) 146724ba675SRob Herring IMX_AUDMUX_V2_PDCR_RXDSEL(2) 147724ba675SRob Herring >; 148724ba675SRob Herring }; 149724ba675SRob Herring 150724ba675SRob Herring mux-aud3 { 151724ba675SRob Herring fsl,audmux-port = <2>; 152724ba675SRob Herring fsl,port-config = < 153724ba675SRob Herring IMX_AUDMUX_V2_PTCR_SYN 154724ba675SRob Herring IMX_AUDMUX_V2_PDCR_RXDSEL(0) 155724ba675SRob Herring >; 156724ba675SRob Herring }; 157724ba675SRob Herring}; 158724ba675SRob Herring 159724ba675SRob Herring&can1 { 160724ba675SRob Herring pinctrl-names = "default"; 161724ba675SRob Herring pinctrl-0 = <&pinctrl_flexcan1>; 162724ba675SRob Herring}; 163724ba675SRob Herring 164724ba675SRob Herring&can2 { 165724ba675SRob Herring pinctrl-names = "default"; 166724ba675SRob Herring pinctrl-0 = <&pinctrl_flexcan2>; 167724ba675SRob Herring}; 168724ba675SRob Herring 169724ba675SRob Herring&fec { 170724ba675SRob Herring pinctrl-names = "default"; 171724ba675SRob Herring pinctrl-0 = <&pinctrl_enet>; 172724ba675SRob Herring phy-mode = "rgmii"; 173724ba675SRob Herring fsl,magic-packet; 174724ba675SRob Herring status = "okay"; 175724ba675SRob Herring}; 176724ba675SRob Herring 177724ba675SRob Herring&i2c1 { 178724ba675SRob Herring clock-frequency = <400000>; 179724ba675SRob Herring pinctrl-names = "default"; 180724ba675SRob Herring pinctrl-0 = <&pinctrl_i2c1>; 181724ba675SRob Herring status = "okay"; 182724ba675SRob Herring 183724ba675SRob Herring touchscreen@5d { 184724ba675SRob Herring compatible = "goodix,gt911"; 185724ba675SRob Herring reg = <0x5d>; 186724ba675SRob Herring pinctrl-names = "default"; 187724ba675SRob Herring pinctrl-0 = <&pinctrl_ts>; 188724ba675SRob Herring interrupt-parent = <&gpio1>; 189724ba675SRob Herring interrupts = <9 IRQ_TYPE_EDGE_FALLING>; 190724ba675SRob Herring irq-gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>; 191724ba675SRob Herring reset-gpios = <&gpio5 2 GPIO_ACTIVE_HIGH>; 192724ba675SRob Herring }; 193724ba675SRob Herring 194724ba675SRob Herring ds1307: rtc@32 { 195724ba675SRob Herring compatible = "dallas,ds1307"; 196724ba675SRob Herring reg = <0x32>; 197724ba675SRob Herring }; 198724ba675SRob Herring}; 199724ba675SRob Herring 200724ba675SRob Herring&i2c2 { 201724ba675SRob Herring clock-frequency = <400000>; 202724ba675SRob Herring pinctrl-names = "default"; 203724ba675SRob Herring pinctrl-0 = <&pinctrl_i2c2>; 204724ba675SRob Herring status = "okay"; 205724ba675SRob Herring 206724ba675SRob Herring sgtl5000: audio-codec@a { 207724ba675SRob Herring compatible = "fsl,sgtl5000"; 208724ba675SRob Herring #sound-dai-cells = <0>; 209724ba675SRob Herring reg = <0x0a>; 210724ba675SRob Herring pinctrl-names = "default"; 211724ba675SRob Herring pinctrl-0 = <&pinctrl_codec>; 212724ba675SRob Herring clocks = <&clks IMX6QDL_CLK_CKO>; 213724ba675SRob Herring VDDA-supply = <®_3p3v>; 214724ba675SRob Herring VDDIO-supply = <®_3p3v>; 215724ba675SRob Herring }; 216724ba675SRob Herring}; 217724ba675SRob Herring 218724ba675SRob Herring&iomuxc { 219724ba675SRob Herring pinctrl_audmux: audmuxgrp { 220724ba675SRob Herring fsl,pins = < 221724ba675SRob Herring MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0 222724ba675SRob Herring MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0 223724ba675SRob Herring MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0 224724ba675SRob Herring MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0 225724ba675SRob Herring >; 226724ba675SRob Herring }; 227724ba675SRob Herring 228724ba675SRob Herring pinctrl_codec: codecgrp { 229724ba675SRob Herring fsl,pins = < 230724ba675SRob Herring MX6QDL_PAD_EIM_BCLK__GPIO6_IO31 0x1b0b0 231724ba675SRob Herring /* sgtl5000 sys_mclk clock routed to CLKO1 */ 232724ba675SRob Herring MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x000b0 233724ba675SRob Herring >; 234724ba675SRob Herring }; 235724ba675SRob Herring 236724ba675SRob Herring pinctrl_enet: enetgrp { 237724ba675SRob Herring fsl,pins = < 238724ba675SRob Herring MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 239724ba675SRob Herring MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 240724ba675SRob Herring MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 241724ba675SRob Herring MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 242724ba675SRob Herring MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 243724ba675SRob Herring MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 244724ba675SRob Herring MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 245724ba675SRob Herring MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 246724ba675SRob Herring MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 247724ba675SRob Herring MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 248724ba675SRob Herring MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 249724ba675SRob Herring MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 250724ba675SRob Herring MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 251724ba675SRob Herring MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 252724ba675SRob Herring MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 253724ba675SRob Herring MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 254724ba675SRob Herring >; 255724ba675SRob Herring }; 256724ba675SRob Herring 257724ba675SRob Herring pinctrl_flexcan1: can1grp { 258724ba675SRob Herring fsl,pins = < 259724ba675SRob Herring MX6QDL_PAD_GPIO_7__FLEXCAN1_TX 0x1b0b0 260724ba675SRob Herring MX6QDL_PAD_GPIO_8__FLEXCAN1_RX 0x1b0b0 261724ba675SRob Herring >; 262724ba675SRob Herring }; 263724ba675SRob Herring 264724ba675SRob Herring pinctrl_flexcan2: can2grp { 265724ba675SRob Herring fsl,pins = < 266724ba675SRob Herring MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX 0x1b0b0 267724ba675SRob Herring MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX 0x1b0b0 268724ba675SRob Herring >; 269724ba675SRob Herring }; 270724ba675SRob Herring 271724ba675SRob Herring pinctrl_i2c1: i2c1grp { 272724ba675SRob Herring fsl,pins = < 273724ba675SRob Herring MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1 274724ba675SRob Herring MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1 275724ba675SRob Herring >; 276724ba675SRob Herring }; 277724ba675SRob Herring 278724ba675SRob Herring pinctrl_i2c2: i2c2grp { 279724ba675SRob Herring fsl,pins = < 280724ba675SRob Herring MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 281724ba675SRob Herring MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 282724ba675SRob Herring >; 283724ba675SRob Herring }; 284724ba675SRob Herring 285724ba675SRob Herring pinctrl_ipu1: ipu1grp { 286724ba675SRob Herring fsl,pins = < 287724ba675SRob Herring MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10 288724ba675SRob Herring MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x10 289724ba675SRob Herring MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10 290724ba675SRob Herring MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10 291724ba675SRob Herring MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10 292724ba675SRob Herring MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10 293724ba675SRob Herring MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10 294724ba675SRob Herring MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10 295724ba675SRob Herring MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10 296724ba675SRob Herring MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10 297724ba675SRob Herring MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x10 298724ba675SRob Herring MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x10 299724ba675SRob Herring MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x10 300724ba675SRob Herring MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x10 301724ba675SRob Herring MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x10 302724ba675SRob Herring MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x10 303724ba675SRob Herring MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x10 304724ba675SRob Herring MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x10 305724ba675SRob Herring MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x10 306724ba675SRob Herring MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x10 307724ba675SRob Herring MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x10 308724ba675SRob Herring MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x10 309724ba675SRob Herring MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0x10 310724ba675SRob Herring MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0x10 311724ba675SRob Herring MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0x10 312724ba675SRob Herring MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0x10 313724ba675SRob Herring MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0x10 314724ba675SRob Herring MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0x10 315724ba675SRob Herring >; 316724ba675SRob Herring }; 317724ba675SRob Herring 318724ba675SRob Herring pinctrl_pwm1: pwm1grp { 319724ba675SRob Herring fsl,pins = < 320724ba675SRob Herring MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1 321724ba675SRob Herring >; 322724ba675SRob Herring }; 323724ba675SRob Herring 324724ba675SRob Herring pinctrl_pwm2: pwm2grp { 325724ba675SRob Herring fsl,pins = < 326724ba675SRob Herring MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1 327724ba675SRob Herring >; 328724ba675SRob Herring }; 329724ba675SRob Herring 330724ba675SRob Herring pinctrl_ts: tsgrp { 331724ba675SRob Herring fsl,pins = < 332724ba675SRob Herring MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x1b0b0 333724ba675SRob Herring MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x1b0b0 334724ba675SRob Herring >; 335724ba675SRob Herring }; 336724ba675SRob Herring 337724ba675SRob Herring pinctrl_uart1: uart1grp { 338724ba675SRob Herring fsl,pins = < 339724ba675SRob Herring MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1 340724ba675SRob Herring MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1 341724ba675SRob Herring >; 342724ba675SRob Herring }; 343724ba675SRob Herring 344724ba675SRob Herring pinctrl_uart2: uart2grp { 345724ba675SRob Herring fsl,pins = < 346724ba675SRob Herring MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1 347724ba675SRob Herring MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1 348724ba675SRob Herring MX6QDL_PAD_EIM_D28__UART2_CTS_B 0x1b0b1 349724ba675SRob Herring MX6QDL_PAD_EIM_D29__UART2_RTS_B 0x1b0b1 350724ba675SRob Herring >; 351724ba675SRob Herring }; 352724ba675SRob Herring 353724ba675SRob Herring pinctrl_usdhc2: usdhc2grp { 354724ba675SRob Herring fsl,pins = < 355724ba675SRob Herring MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059 356724ba675SRob Herring MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059 357724ba675SRob Herring MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059 358724ba675SRob Herring MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059 359724ba675SRob Herring MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059 360724ba675SRob Herring MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059 361724ba675SRob Herring >; 362724ba675SRob Herring }; 363724ba675SRob Herring 364724ba675SRob Herring pinctrl_usdhc4: usdhc4grp { 365724ba675SRob Herring fsl,pins = < 366724ba675SRob Herring MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059 367724ba675SRob Herring MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059 368724ba675SRob Herring MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059 369724ba675SRob Herring MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059 370724ba675SRob Herring MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059 371724ba675SRob Herring MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059 372724ba675SRob Herring MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059 373724ba675SRob Herring MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059 374724ba675SRob Herring MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17059 375724ba675SRob Herring MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059 376724ba675SRob Herring >; 377724ba675SRob Herring }; 378724ba675SRob Herring}; 379724ba675SRob Herring 380724ba675SRob Herring&pwm1 { 381724ba675SRob Herring pinctrl-names = "default"; 382724ba675SRob Herring pinctrl-0 = <&pinctrl_pwm1>; 383724ba675SRob Herring status = "okay"; 384724ba675SRob Herring}; 385724ba675SRob Herring 386724ba675SRob Herring&pwm2 { 387724ba675SRob Herring pinctrl-names = "default"; 388724ba675SRob Herring pinctrl-0 = <&pinctrl_pwm2>; 389724ba675SRob Herring status = "okay"; 390724ba675SRob Herring}; 391724ba675SRob Herring 392724ba675SRob Herring&ssi1 { 393724ba675SRob Herring status = "okay"; 394724ba675SRob Herring}; 395724ba675SRob Herring 396724ba675SRob Herring&uart1 { 397724ba675SRob Herring pinctrl-names = "default"; 398724ba675SRob Herring pinctrl-0 = <&pinctrl_uart1>; 399724ba675SRob Herring status = "okay"; 400724ba675SRob Herring}; 401724ba675SRob Herring 402724ba675SRob Herring&uart2 { 403724ba675SRob Herring pinctrl-names = "default"; 404724ba675SRob Herring pinctrl-0 = <&pinctrl_uart2>; 405724ba675SRob Herring uart-has-rtscts; 406724ba675SRob Herring}; 407724ba675SRob Herring 408724ba675SRob Herring&usbh1 { 409724ba675SRob Herring status = "okay"; 410724ba675SRob Herring}; 411724ba675SRob Herring 412724ba675SRob Herring&usdhc2 { 413724ba675SRob Herring pinctrl-names = "default"; 414724ba675SRob Herring pinctrl-0 = <&pinctrl_usdhc2>; 415724ba675SRob Herring bus-width = <4>; 416724ba675SRob Herring cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; 417724ba675SRob Herring status = "okay"; 418724ba675SRob Herring}; 419724ba675SRob Herring 420724ba675SRob Herring&usdhc4 { 421724ba675SRob Herring pinctrl-names = "default"; 422724ba675SRob Herring pinctrl-0 = <&pinctrl_usdhc4>; 423724ba675SRob Herring bus-width = <8>; 424724ba675SRob Herring non-removable; 425724ba675SRob Herring no-1-8-v; 426724ba675SRob Herring keep-power-in-suspend; 427724ba675SRob Herring status = "okay"; 428724ba675SRob Herring}; 429724ba675SRob Herring 430724ba675SRob Herring&wdog1 { 431724ba675SRob Herring status = "okay"; 432724ba675SRob Herring}; 433