1// SPDX-License-Identifier: GPL-2.0-or-later 2/* 3 * Copyright 2013 Data Modul AG 4 */ 5 6/dts-v1/; 7 8#include <dt-bindings/gpio/gpio.h> 9#include "imx6q.dtsi" 10 11/ { 12 model = "Data Modul eDM-QMX6 Board"; 13 compatible = "dmo,imx6q-edmqmx6", "fsl,imx6q"; 14 15 chosen { 16 stdout-path = &uart2; 17 }; 18 19 aliases { 20 gpio7 = &stmpe_gpio1; 21 gpio8 = &stmpe_gpio2; 22 stmpe-i2c0 = &stmpe1; 23 stmpe-i2c1 = &stmpe2; 24 }; 25 26 memory@10000000 { 27 device_type = "memory"; 28 reg = <0x10000000 0x80000000>; 29 }; 30 31 reg_3p3v: regulator-3p3v { 32 compatible = "regulator-fixed"; 33 regulator-name = "3P3V"; 34 regulator-min-microvolt = <3300000>; 35 regulator-max-microvolt = <3300000>; 36 regulator-always-on; 37 }; 38 39 reg_usb_otg_switch: regulator-usb-otg-switch { 40 compatible = "regulator-fixed"; 41 regulator-name = "usb_otg_switch"; 42 regulator-min-microvolt = <5000000>; 43 regulator-max-microvolt = <5000000>; 44 gpio = <&gpio7 12 0>; 45 regulator-boot-on; 46 regulator-always-on; 47 }; 48 49 reg_usb_host1: regulator-usb-host1 { 50 compatible = "regulator-fixed"; 51 regulator-name = "usb_host1_en"; 52 regulator-min-microvolt = <3300000>; 53 regulator-max-microvolt = <3300000>; 54 gpio = <&gpio3 31 0>; 55 enable-active-high; 56 }; 57 58 gpio-leds { 59 compatible = "gpio-leds"; 60 61 led-blue { 62 label = "blue"; 63 gpios = <&stmpe_gpio1 8 GPIO_ACTIVE_HIGH>; 64 linux,default-trigger = "heartbeat"; 65 }; 66 67 led-green { 68 label = "green"; 69 gpios = <&stmpe_gpio1 9 GPIO_ACTIVE_HIGH>; 70 }; 71 72 led-pink { 73 label = "pink"; 74 gpios = <&stmpe_gpio1 10 GPIO_ACTIVE_HIGH>; 75 }; 76 77 led-red { 78 label = "red"; 79 gpios = <&stmpe_gpio1 11 GPIO_ACTIVE_HIGH>; 80 }; 81 }; 82}; 83 84&can1 { 85 pinctrl-names = "default"; 86 pinctrl-0 = <&pinctrl_can1>; 87 status = "okay"; 88}; 89 90&ecspi5 { 91 pinctrl-names = "default"; 92 pinctrl-0 = <&pinctrl_ecspi5>; 93 cs-gpios = <&gpio1 12 GPIO_ACTIVE_LOW>; 94 status = "okay"; 95 96 flash: flash@0 { 97 compatible = "m25p80", "jedec,spi-nor"; 98 spi-max-frequency = <40000000>; 99 reg = <0>; 100 }; 101}; 102 103&fec { 104 pinctrl-names = "default"; 105 pinctrl-0 = <&pinctrl_enet>; 106 phy-mode = "rgmii-id"; 107 phy-reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>; 108 phy-supply = <&vgen2_1v2_eth>; 109 status = "okay"; 110}; 111 112&i2c1 { 113 clock-frequency = <100000>; 114 pinctrl-names = "default"; 115 pinctrl-0 = <&pinctrl_i2c1>; 116 status = "okay"; 117}; 118 119&i2c2 { 120 clock-frequency = <100000>; 121 pinctrl-names = "default"; 122 pinctrl-0 = <&pinctrl_i2c2 123 &pinctrl_stmpe1 124 &pinctrl_stmpe2 125 &pinctrl_pfuze>; 126 status = "okay"; 127 128 pmic: pmic@8 { 129 compatible = "fsl,pfuze100"; 130 reg = <0x08>; 131 interrupt-parent = <&gpio3>; 132 interrupts = <20 8>; 133 134 regulators { 135 sw1a_reg: sw1ab { 136 regulator-min-microvolt = <300000>; 137 regulator-max-microvolt = <1875000>; 138 regulator-boot-on; 139 regulator-always-on; 140 }; 141 142 sw1c_reg: sw1c { 143 regulator-min-microvolt = <300000>; 144 regulator-max-microvolt = <1875000>; 145 regulator-boot-on; 146 regulator-always-on; 147 }; 148 149 sw2_reg: sw2 { 150 regulator-min-microvolt = <800000>; 151 regulator-max-microvolt = <3300000>; 152 regulator-boot-on; 153 regulator-always-on; 154 }; 155 156 sw3a_reg: sw3a { 157 regulator-min-microvolt = <400000>; 158 regulator-max-microvolt = <1975000>; 159 regulator-boot-on; 160 regulator-always-on; 161 }; 162 163 sw3b_reg: sw3b { 164 regulator-min-microvolt = <400000>; 165 regulator-max-microvolt = <1975000>; 166 regulator-boot-on; 167 regulator-always-on; 168 }; 169 170 sw4_reg: sw4 { 171 regulator-min-microvolt = <400000>; 172 regulator-max-microvolt = <1975000>; 173 regulator-always-on; 174 }; 175 176 swbst_reg: swbst { 177 regulator-min-microvolt = <5000000>; 178 regulator-max-microvolt = <5150000>; 179 regulator-always-on; 180 }; 181 182 snvs_reg: vsnvs { 183 regulator-min-microvolt = <1000000>; 184 regulator-max-microvolt = <3000000>; 185 regulator-boot-on; 186 regulator-always-on; 187 }; 188 189 vref_reg: vrefddr { 190 regulator-boot-on; 191 regulator-always-on; 192 }; 193 194 vgen1_reg: vgen1 { 195 regulator-min-microvolt = <800000>; 196 regulator-max-microvolt = <1550000>; 197 }; 198 199 vgen2_1v2_eth: vgen2 { 200 regulator-min-microvolt = <800000>; 201 regulator-max-microvolt = <1550000>; 202 }; 203 204 vdd_high_in: vgen3 { 205 regulator-min-microvolt = <1800000>; 206 regulator-max-microvolt = <3300000>; 207 regulator-boot-on; 208 regulator-always-on; 209 }; 210 211 vgen4_reg: vgen4 { 212 regulator-min-microvolt = <1800000>; 213 regulator-max-microvolt = <3300000>; 214 regulator-always-on; 215 }; 216 217 vgen5_reg: vgen5 { 218 regulator-min-microvolt = <1800000>; 219 regulator-max-microvolt = <3300000>; 220 regulator-always-on; 221 }; 222 223 vgen6_reg: vgen6 { 224 regulator-min-microvolt = <1800000>; 225 regulator-max-microvolt = <3300000>; 226 regulator-always-on; 227 }; 228 }; 229 }; 230 231 stmpe1: stmpe1601@40 { 232 compatible = "st,stmpe1601"; 233 reg = <0x40>; 234 interrupts = <30 0>; 235 interrupt-parent = <&gpio3>; 236 vcc-supply = <&sw2_reg>; 237 vio-supply = <&sw2_reg>; 238 239 stmpe_gpio1: stmpe_gpio { 240 #gpio-cells = <2>; 241 compatible = "st,stmpe-gpio"; 242 }; 243 }; 244 245 stmpe2: stmpe1601@44 { 246 compatible = "st,stmpe1601"; 247 reg = <0x44>; 248 interrupts = <2 0>; 249 interrupt-parent = <&gpio5>; 250 vcc-supply = <&sw2_reg>; 251 vio-supply = <&sw2_reg>; 252 253 stmpe_gpio2: stmpe_gpio { 254 #gpio-cells = <2>; 255 compatible = "st,stmpe-gpio"; 256 }; 257 }; 258 259 temp1: ad7414@4c { 260 compatible = "ad,ad7414"; 261 reg = <0x4c>; 262 }; 263 264 temp2: ad7414@4d { 265 compatible = "ad,ad7414"; 266 reg = <0x4d>; 267 }; 268 269 rtc: m41t62@68 { 270 compatible = "st,m41t62"; 271 reg = <0x68>; 272 }; 273}; 274 275&i2c3 { 276 clock-frequency = <100000>; 277 pinctrl-names = "default"; 278 pinctrl-0 = <&pinctrl_i2c3>; 279 status = "okay"; 280}; 281 282&iomuxc { 283 pinctrl-names = "default"; 284 pinctrl-0 = <&pinctrl_hog>; 285 286 pinctrl_hog: hoggrp { 287 fsl,pins = < 288 MX6QDL_PAD_EIM_A16__GPIO2_IO22 0x80000000 289 MX6QDL_PAD_EIM_A17__GPIO2_IO21 0x80000000 290 >; 291 }; 292 293 pinctrl_can1: can1grp { 294 fsl,pins = < 295 MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b0b0 296 MX6QDL_PAD_GPIO_7__FLEXCAN1_TX 0x1b0b0 297 >; 298 }; 299 300 pinctrl_ecspi5: ecspi5rp-1grp { 301 fsl,pins = < 302 MX6QDL_PAD_SD1_DAT0__ECSPI5_MISO 0x80000000 303 MX6QDL_PAD_SD1_CMD__ECSPI5_MOSI 0x80000000 304 MX6QDL_PAD_SD1_CLK__ECSPI5_SCLK 0x80000000 305 MX6QDL_PAD_SD2_DAT3__GPIO1_IO12 0x80000000 306 >; 307 }; 308 309 pinctrl_enet: enetgrp { 310 fsl,pins = < 311 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 312 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030 313 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030 314 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 315 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 316 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030 317 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030 318 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030 319 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030 320 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030 321 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030 322 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030 323 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 324 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 325 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 326 MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x1b0b0 327 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 328 >; 329 }; 330 331 pinctrl_i2c1: i2c1grp { 332 fsl,pins = < 333 MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 334 MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 335 >; 336 }; 337 338 pinctrl_i2c2: i2c2grp { 339 fsl,pins = < 340 MX6QDL_PAD_EIM_EB2__I2C2_SCL 0x4001b8b1 341 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 342 >; 343 }; 344 345 pinctrl_i2c3: i2c3grp { 346 fsl,pins = < 347 MX6QDL_PAD_EIM_D17__I2C3_SCL 0x4001b8b1 348 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 349 >; 350 }; 351 352 pinctrl_pcie: pciegrp { 353 fsl,pins = < 354 MX6QDL_PAD_KEY_COL1__GPIO4_IO08 0x100b1 355 >; 356 }; 357 358 pinctrl_pfuze: pfuze100grp { 359 fsl,pins = < 360 MX6QDL_PAD_EIM_D20__GPIO3_IO20 0x80000000 361 >; 362 }; 363 364 pinctrl_stmpe1: stmpe1grp { 365 fsl,pins = <MX6QDL_PAD_EIM_D30__GPIO3_IO30 0x80000000>; 366 }; 367 368 pinctrl_stmpe2: stmpe2grp { 369 fsl,pins = <MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x80000000>; 370 }; 371 372 pinctrl_uart1: uart1grp { 373 fsl,pins = < 374 MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1 375 MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1 376 >; 377 }; 378 379 pinctrl_uart2: uart2grp { 380 fsl,pins = < 381 MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1 382 MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1 383 >; 384 }; 385 386 pinctrl_usbotg: usbotggrp { 387 fsl,pins = < 388 MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059 389 >; 390 }; 391 392 pinctrl_usdhc3: usdhc3grp { 393 fsl,pins = < 394 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 395 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 396 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 397 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 398 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 399 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 400 >; 401 }; 402 403 pinctrl_usdhc4: usdhc4grp { 404 fsl,pins = < 405 MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059 406 MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059 407 MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059 408 MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059 409 MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059 410 MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059 411 MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059 412 MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059 413 MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17059 414 MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059 415 >; 416 }; 417}; 418 419&pcie { 420 pinctrl-names = "default"; 421 pinctrl-0 = <&pinctrl_pcie>; 422 reset-gpio = <&gpio4 8 GPIO_ACTIVE_LOW>; 423 status = "okay"; 424}; 425 426&sata { 427 status = "okay"; 428}; 429 430&uart1 { 431 pinctrl-names = "default"; 432 pinctrl-0 = <&pinctrl_uart1>; 433 status = "okay"; 434}; 435 436&uart2 { 437 pinctrl-names = "default"; 438 pinctrl-0 = <&pinctrl_uart2>; 439 status = "okay"; 440}; 441 442&usbh1 { 443 vbus-supply = <®_usb_host1>; 444 disable-over-current; 445 dr_mode = "host"; 446 status = "okay"; 447}; 448 449&usbotg { 450 pinctrl-names = "default"; 451 pinctrl-0 = <&pinctrl_usbotg>; 452 disable-over-current; 453 status = "okay"; 454}; 455 456&usdhc3 { 457 pinctrl-names = "default"; 458 pinctrl-0 = <&pinctrl_usdhc3>; 459 vmmc-supply = <®_3p3v>; 460 status = "okay"; 461}; 462 463&usdhc4 { 464 pinctrl-names = "default"; 465 pinctrl-0 = <&pinctrl_usdhc4>; 466 vmmc-supply = <®_3p3v>; 467 non-removable; 468 bus-width = <8>; 469 status = "okay"; 470}; 471