xref: /linux/arch/arm/boot/dts/nxp/imx/imx53-qsb-common.dtsi (revision 724ba6751532055db75992fc6ae21c3e322e94a7)
1*724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0+
2*724ba675SRob Herring//
3*724ba675SRob Herring// Copyright 2011 Freescale Semiconductor, Inc.
4*724ba675SRob Herring// Copyright 2011 Linaro Ltd.
5*724ba675SRob Herring
6*724ba675SRob Herring#include "imx53.dtsi"
7*724ba675SRob Herring
8*724ba675SRob Herring/ {
9*724ba675SRob Herring	chosen {
10*724ba675SRob Herring		stdout-path = &uart1;
11*724ba675SRob Herring	};
12*724ba675SRob Herring
13*724ba675SRob Herring	memory@70000000 {
14*724ba675SRob Herring		device_type = "memory";
15*724ba675SRob Herring		reg = <0x70000000 0x20000000>,
16*724ba675SRob Herring		      <0xb0000000 0x20000000>;
17*724ba675SRob Herring	};
18*724ba675SRob Herring
19*724ba675SRob Herring	display0: disp0 {
20*724ba675SRob Herring		compatible = "fsl,imx-parallel-display";
21*724ba675SRob Herring		pinctrl-names = "default";
22*724ba675SRob Herring		pinctrl-0 = <&pinctrl_ipu_disp0>;
23*724ba675SRob Herring
24*724ba675SRob Herring		#address-cells = <1>;
25*724ba675SRob Herring		#size-cells = <0>;
26*724ba675SRob Herring		status = "disabled";
27*724ba675SRob Herring
28*724ba675SRob Herring		port@0 {
29*724ba675SRob Herring			reg = <0>;
30*724ba675SRob Herring
31*724ba675SRob Herring			display0_in: endpoint {
32*724ba675SRob Herring				remote-endpoint = <&ipu_di0_disp0>;
33*724ba675SRob Herring			};
34*724ba675SRob Herring		};
35*724ba675SRob Herring
36*724ba675SRob Herring		port@1 {
37*724ba675SRob Herring			reg = <1>;
38*724ba675SRob Herring
39*724ba675SRob Herring			display_out: endpoint {
40*724ba675SRob Herring				remote-endpoint = <&panel_in>;
41*724ba675SRob Herring			};
42*724ba675SRob Herring		};
43*724ba675SRob Herring	};
44*724ba675SRob Herring
45*724ba675SRob Herring	gpio-keys {
46*724ba675SRob Herring		compatible = "gpio-keys";
47*724ba675SRob Herring
48*724ba675SRob Herring		key-power {
49*724ba675SRob Herring			label = "Power Button";
50*724ba675SRob Herring			gpios = <&gpio1 8 GPIO_ACTIVE_LOW>;
51*724ba675SRob Herring			linux,code = <KEY_POWER>;
52*724ba675SRob Herring		};
53*724ba675SRob Herring
54*724ba675SRob Herring		key-volume-up {
55*724ba675SRob Herring			label = "Volume Up";
56*724ba675SRob Herring			gpios = <&gpio2 14 GPIO_ACTIVE_LOW>;
57*724ba675SRob Herring			linux,code = <KEY_VOLUMEUP>;
58*724ba675SRob Herring			wakeup-source;
59*724ba675SRob Herring		};
60*724ba675SRob Herring
61*724ba675SRob Herring		key-volume-down {
62*724ba675SRob Herring			label = "Volume Down";
63*724ba675SRob Herring			gpios = <&gpio2 15 GPIO_ACTIVE_LOW>;
64*724ba675SRob Herring			linux,code = <KEY_VOLUMEDOWN>;
65*724ba675SRob Herring			wakeup-source;
66*724ba675SRob Herring		};
67*724ba675SRob Herring	};
68*724ba675SRob Herring
69*724ba675SRob Herring	leds {
70*724ba675SRob Herring		compatible = "gpio-leds";
71*724ba675SRob Herring		pinctrl-names = "default";
72*724ba675SRob Herring		pinctrl-0 = <&led_pin_gpio7_7>;
73*724ba675SRob Herring
74*724ba675SRob Herring		led-user {
75*724ba675SRob Herring			label = "Heartbeat";
76*724ba675SRob Herring			gpios = <&gpio7 7 0>;
77*724ba675SRob Herring			linux,default-trigger = "heartbeat";
78*724ba675SRob Herring		};
79*724ba675SRob Herring	};
80*724ba675SRob Herring
81*724ba675SRob Herring	panel {
82*724ba675SRob Herring		compatible = "sii,43wvf1g";
83*724ba675SRob Herring
84*724ba675SRob Herring		port {
85*724ba675SRob Herring			panel_in: endpoint {
86*724ba675SRob Herring				remote-endpoint = <&display_out>;
87*724ba675SRob Herring			};
88*724ba675SRob Herring		};
89*724ba675SRob Herring	};
90*724ba675SRob Herring
91*724ba675SRob Herring	regulators {
92*724ba675SRob Herring		compatible = "simple-bus";
93*724ba675SRob Herring		#address-cells = <1>;
94*724ba675SRob Herring		#size-cells = <0>;
95*724ba675SRob Herring
96*724ba675SRob Herring		reg_3p2v: regulator@0 {
97*724ba675SRob Herring			compatible = "regulator-fixed";
98*724ba675SRob Herring			reg = <0>;
99*724ba675SRob Herring			regulator-name = "3P2V";
100*724ba675SRob Herring			regulator-min-microvolt = <3200000>;
101*724ba675SRob Herring			regulator-max-microvolt = <3200000>;
102*724ba675SRob Herring			regulator-always-on;
103*724ba675SRob Herring		};
104*724ba675SRob Herring
105*724ba675SRob Herring		reg_usb_vbus: regulator@1 {
106*724ba675SRob Herring			compatible = "regulator-fixed";
107*724ba675SRob Herring			reg = <1>;
108*724ba675SRob Herring			regulator-name = "usb_vbus";
109*724ba675SRob Herring			regulator-min-microvolt = <5000000>;
110*724ba675SRob Herring			regulator-max-microvolt = <5000000>;
111*724ba675SRob Herring			gpio = <&gpio7 8 0>;
112*724ba675SRob Herring			enable-active-high;
113*724ba675SRob Herring		};
114*724ba675SRob Herring	};
115*724ba675SRob Herring
116*724ba675SRob Herring	sound {
117*724ba675SRob Herring		compatible = "fsl,imx53-qsb-sgtl5000",
118*724ba675SRob Herring			     "fsl,imx-audio-sgtl5000";
119*724ba675SRob Herring		model = "imx53-qsb-sgtl5000";
120*724ba675SRob Herring		ssi-controller = <&ssi2>;
121*724ba675SRob Herring		audio-codec = <&sgtl5000>;
122*724ba675SRob Herring		audio-routing =
123*724ba675SRob Herring			"MIC_IN", "Mic Jack",
124*724ba675SRob Herring			"Mic Jack", "Mic Bias",
125*724ba675SRob Herring			"Headphone Jack", "HP_OUT";
126*724ba675SRob Herring		mux-int-port = <2>;
127*724ba675SRob Herring		mux-ext-port = <5>;
128*724ba675SRob Herring	};
129*724ba675SRob Herring};
130*724ba675SRob Herring
131*724ba675SRob Herring&cpu0 {
132*724ba675SRob Herring	/* CPU rated to 1GHz, not 1.2GHz as per the default settings */
133*724ba675SRob Herring	operating-points = <
134*724ba675SRob Herring		/* kHz   uV */
135*724ba675SRob Herring		166666  850000
136*724ba675SRob Herring		400000  900000
137*724ba675SRob Herring		800000  1050000
138*724ba675SRob Herring		1000000 1200000
139*724ba675SRob Herring	>;
140*724ba675SRob Herring};
141*724ba675SRob Herring
142*724ba675SRob Herring&esdhc1 {
143*724ba675SRob Herring	pinctrl-names = "default";
144*724ba675SRob Herring	pinctrl-0 = <&pinctrl_esdhc1>;
145*724ba675SRob Herring	cd-gpios = <&gpio3 13 GPIO_ACTIVE_LOW>;
146*724ba675SRob Herring	status = "okay";
147*724ba675SRob Herring};
148*724ba675SRob Herring
149*724ba675SRob Herring&ipu_di0_disp0 {
150*724ba675SRob Herring	remote-endpoint = <&display0_in>;
151*724ba675SRob Herring};
152*724ba675SRob Herring
153*724ba675SRob Herring&ssi2 {
154*724ba675SRob Herring	status = "okay";
155*724ba675SRob Herring};
156*724ba675SRob Herring
157*724ba675SRob Herring&esdhc3 {
158*724ba675SRob Herring	pinctrl-names = "default";
159*724ba675SRob Herring	pinctrl-0 = <&pinctrl_esdhc3>;
160*724ba675SRob Herring	cd-gpios = <&gpio3 11 GPIO_ACTIVE_LOW>;
161*724ba675SRob Herring	wp-gpios = <&gpio3 12 GPIO_ACTIVE_HIGH>;
162*724ba675SRob Herring	bus-width = <8>;
163*724ba675SRob Herring	status = "okay";
164*724ba675SRob Herring};
165*724ba675SRob Herring
166*724ba675SRob Herring&iomuxc {
167*724ba675SRob Herring	pinctrl-names = "default";
168*724ba675SRob Herring	pinctrl-0 = <&pinctrl_hog>;
169*724ba675SRob Herring
170*724ba675SRob Herring	imx53-qsb {
171*724ba675SRob Herring		pinctrl_hog: hoggrp {
172*724ba675SRob Herring			fsl,pins = <
173*724ba675SRob Herring				MX53_PAD_GPIO_8__GPIO1_8          0x80000000
174*724ba675SRob Herring				MX53_PAD_PATA_DATA14__GPIO2_14    0x80000000
175*724ba675SRob Herring				MX53_PAD_PATA_DATA15__GPIO2_15    0x80000000
176*724ba675SRob Herring				MX53_PAD_EIM_DA11__GPIO3_11       0x80000000
177*724ba675SRob Herring				MX53_PAD_EIM_DA12__GPIO3_12       0x80000000
178*724ba675SRob Herring				MX53_PAD_PATA_DA_0__GPIO7_6       0x80000000
179*724ba675SRob Herring				MX53_PAD_PATA_DA_2__GPIO7_8	  0x80000000
180*724ba675SRob Herring				MX53_PAD_GPIO_16__GPIO7_11        0x80000000
181*724ba675SRob Herring			>;
182*724ba675SRob Herring		};
183*724ba675SRob Herring
184*724ba675SRob Herring		led_pin_gpio7_7: led_gpio7_7 {
185*724ba675SRob Herring			fsl,pins = <
186*724ba675SRob Herring				MX53_PAD_PATA_DA_1__GPIO7_7 0x80000000
187*724ba675SRob Herring			>;
188*724ba675SRob Herring		};
189*724ba675SRob Herring
190*724ba675SRob Herring		pinctrl_audmux: audmuxgrp {
191*724ba675SRob Herring			fsl,pins = <
192*724ba675SRob Herring				MX53_PAD_KEY_COL0__AUDMUX_AUD5_TXC	0x80000000
193*724ba675SRob Herring				MX53_PAD_KEY_ROW0__AUDMUX_AUD5_TXD	0x80000000
194*724ba675SRob Herring				MX53_PAD_KEY_COL1__AUDMUX_AUD5_TXFS	0x80000000
195*724ba675SRob Herring				MX53_PAD_KEY_ROW1__AUDMUX_AUD5_RXD	0x80000000
196*724ba675SRob Herring			>;
197*724ba675SRob Herring		};
198*724ba675SRob Herring
199*724ba675SRob Herring		pinctrl_codec: codecgrp {
200*724ba675SRob Herring			fsl,pins = <
201*724ba675SRob Herring				MX53_PAD_GPIO_0__CCM_SSI_EXT1_CLK	0x1c4
202*724ba675SRob Herring			>;
203*724ba675SRob Herring		};
204*724ba675SRob Herring
205*724ba675SRob Herring		pinctrl_esdhc1: esdhc1grp {
206*724ba675SRob Herring			fsl,pins = <
207*724ba675SRob Herring				MX53_PAD_SD1_DATA0__ESDHC1_DAT0		0x1d5
208*724ba675SRob Herring				MX53_PAD_SD1_DATA1__ESDHC1_DAT1		0x1d5
209*724ba675SRob Herring				MX53_PAD_SD1_DATA2__ESDHC1_DAT2		0x1d5
210*724ba675SRob Herring				MX53_PAD_SD1_DATA3__ESDHC1_DAT3		0x1d5
211*724ba675SRob Herring				MX53_PAD_SD1_CMD__ESDHC1_CMD		0x1d5
212*724ba675SRob Herring				MX53_PAD_SD1_CLK__ESDHC1_CLK		0x1d5
213*724ba675SRob Herring				MX53_PAD_EIM_DA13__GPIO3_13		0xe4
214*724ba675SRob Herring			>;
215*724ba675SRob Herring		};
216*724ba675SRob Herring
217*724ba675SRob Herring		pinctrl_esdhc3: esdhc3grp {
218*724ba675SRob Herring			fsl,pins = <
219*724ba675SRob Herring				MX53_PAD_PATA_DATA8__ESDHC3_DAT0	0x1d5
220*724ba675SRob Herring				MX53_PAD_PATA_DATA9__ESDHC3_DAT1	0x1d5
221*724ba675SRob Herring				MX53_PAD_PATA_DATA10__ESDHC3_DAT2	0x1d5
222*724ba675SRob Herring				MX53_PAD_PATA_DATA11__ESDHC3_DAT3	0x1d5
223*724ba675SRob Herring				MX53_PAD_PATA_DATA0__ESDHC3_DAT4	0x1d5
224*724ba675SRob Herring				MX53_PAD_PATA_DATA1__ESDHC3_DAT5	0x1d5
225*724ba675SRob Herring				MX53_PAD_PATA_DATA2__ESDHC3_DAT6	0x1d5
226*724ba675SRob Herring				MX53_PAD_PATA_DATA3__ESDHC3_DAT7	0x1d5
227*724ba675SRob Herring				MX53_PAD_PATA_RESET_B__ESDHC3_CMD	0x1d5
228*724ba675SRob Herring				MX53_PAD_PATA_IORDY__ESDHC3_CLK		0x1d5
229*724ba675SRob Herring			>;
230*724ba675SRob Herring		};
231*724ba675SRob Herring
232*724ba675SRob Herring		pinctrl_fec: fecgrp {
233*724ba675SRob Herring			fsl,pins = <
234*724ba675SRob Herring				MX53_PAD_FEC_MDC__FEC_MDC		0x4
235*724ba675SRob Herring				MX53_PAD_FEC_MDIO__FEC_MDIO		0x1fc
236*724ba675SRob Herring				MX53_PAD_FEC_REF_CLK__FEC_TX_CLK	0x180
237*724ba675SRob Herring				MX53_PAD_FEC_RX_ER__FEC_RX_ER		0x180
238*724ba675SRob Herring				MX53_PAD_FEC_CRS_DV__FEC_RX_DV		0x180
239*724ba675SRob Herring				MX53_PAD_FEC_RXD1__FEC_RDATA_1		0x180
240*724ba675SRob Herring				MX53_PAD_FEC_RXD0__FEC_RDATA_0		0x180
241*724ba675SRob Herring				MX53_PAD_FEC_TX_EN__FEC_TX_EN		0x4
242*724ba675SRob Herring				MX53_PAD_FEC_TXD1__FEC_TDATA_1		0x4
243*724ba675SRob Herring				MX53_PAD_FEC_TXD0__FEC_TDATA_0		0x4
244*724ba675SRob Herring			>;
245*724ba675SRob Herring		};
246*724ba675SRob Herring
247*724ba675SRob Herring		/* open drain */
248*724ba675SRob Herring		pinctrl_i2c1: i2c1grp {
249*724ba675SRob Herring			fsl,pins = <
250*724ba675SRob Herring				MX53_PAD_CSI0_DAT8__I2C1_SDA		0x400001ec
251*724ba675SRob Herring				MX53_PAD_CSI0_DAT9__I2C1_SCL		0x400001ec
252*724ba675SRob Herring			>;
253*724ba675SRob Herring		};
254*724ba675SRob Herring
255*724ba675SRob Herring		pinctrl_i2c2: i2c2grp {
256*724ba675SRob Herring			fsl,pins = <
257*724ba675SRob Herring				MX53_PAD_KEY_ROW3__I2C2_SDA		0xc0000000
258*724ba675SRob Herring				MX53_PAD_KEY_COL3__I2C2_SCL		0xc0000000
259*724ba675SRob Herring			>;
260*724ba675SRob Herring		};
261*724ba675SRob Herring
262*724ba675SRob Herring		pinctrl_ipu_disp0: ipudisp0grp {
263*724ba675SRob Herring			fsl,pins = <
264*724ba675SRob Herring				MX53_PAD_DI0_DISP_CLK__IPU_DI0_DISP_CLK	0x5
265*724ba675SRob Herring				MX53_PAD_DI0_PIN15__IPU_DI0_PIN15	0x5
266*724ba675SRob Herring				MX53_PAD_DI0_PIN2__IPU_DI0_PIN2		0x5
267*724ba675SRob Herring				MX53_PAD_DI0_PIN3__IPU_DI0_PIN3		0x5
268*724ba675SRob Herring				MX53_PAD_DISP0_DAT0__IPU_DISP0_DAT_0	0x5
269*724ba675SRob Herring				MX53_PAD_DISP0_DAT1__IPU_DISP0_DAT_1	0x5
270*724ba675SRob Herring				MX53_PAD_DISP0_DAT2__IPU_DISP0_DAT_2	0x5
271*724ba675SRob Herring				MX53_PAD_DISP0_DAT3__IPU_DISP0_DAT_3	0x5
272*724ba675SRob Herring				MX53_PAD_DISP0_DAT4__IPU_DISP0_DAT_4	0x5
273*724ba675SRob Herring				MX53_PAD_DISP0_DAT5__IPU_DISP0_DAT_5	0x5
274*724ba675SRob Herring				MX53_PAD_DISP0_DAT6__IPU_DISP0_DAT_6	0x5
275*724ba675SRob Herring				MX53_PAD_DISP0_DAT7__IPU_DISP0_DAT_7	0x5
276*724ba675SRob Herring				MX53_PAD_DISP0_DAT8__IPU_DISP0_DAT_8	0x5
277*724ba675SRob Herring				MX53_PAD_DISP0_DAT9__IPU_DISP0_DAT_9	0x5
278*724ba675SRob Herring				MX53_PAD_DISP0_DAT10__IPU_DISP0_DAT_10	0x5
279*724ba675SRob Herring				MX53_PAD_DISP0_DAT11__IPU_DISP0_DAT_11	0x5
280*724ba675SRob Herring				MX53_PAD_DISP0_DAT12__IPU_DISP0_DAT_12	0x5
281*724ba675SRob Herring				MX53_PAD_DISP0_DAT13__IPU_DISP0_DAT_13	0x5
282*724ba675SRob Herring				MX53_PAD_DISP0_DAT14__IPU_DISP0_DAT_14	0x5
283*724ba675SRob Herring				MX53_PAD_DISP0_DAT15__IPU_DISP0_DAT_15	0x5
284*724ba675SRob Herring				MX53_PAD_DISP0_DAT16__IPU_DISP0_DAT_16	0x5
285*724ba675SRob Herring				MX53_PAD_DISP0_DAT17__IPU_DISP0_DAT_17	0x5
286*724ba675SRob Herring				MX53_PAD_DISP0_DAT18__IPU_DISP0_DAT_18	0x5
287*724ba675SRob Herring				MX53_PAD_DISP0_DAT19__IPU_DISP0_DAT_19	0x5
288*724ba675SRob Herring				MX53_PAD_DISP0_DAT20__IPU_DISP0_DAT_20	0x5
289*724ba675SRob Herring				MX53_PAD_DISP0_DAT21__IPU_DISP0_DAT_21	0x5
290*724ba675SRob Herring				MX53_PAD_DISP0_DAT22__IPU_DISP0_DAT_22	0x5
291*724ba675SRob Herring				MX53_PAD_DISP0_DAT23__IPU_DISP0_DAT_23	0x5
292*724ba675SRob Herring			>;
293*724ba675SRob Herring		};
294*724ba675SRob Herring
295*724ba675SRob Herring		pinctrl_vga_sync: vgasync-grp {
296*724ba675SRob Herring			fsl,pins = <
297*724ba675SRob Herring				/* VGA_HSYNC, VSYNC with max drive strength */
298*724ba675SRob Herring				MX53_PAD_EIM_OE__IPU_DI1_PIN7 0xe6
299*724ba675SRob Herring				MX53_PAD_EIM_RW__IPU_DI1_PIN8 0xe6
300*724ba675SRob Herring			>;
301*724ba675SRob Herring		};
302*724ba675SRob Herring
303*724ba675SRob Herring		pinctrl_uart1: uart1grp {
304*724ba675SRob Herring			fsl,pins = <
305*724ba675SRob Herring				MX53_PAD_CSI0_DAT10__UART1_TXD_MUX	0x1e4
306*724ba675SRob Herring				MX53_PAD_CSI0_DAT11__UART1_RXD_MUX	0x1e4
307*724ba675SRob Herring			>;
308*724ba675SRob Herring		};
309*724ba675SRob Herring	};
310*724ba675SRob Herring};
311*724ba675SRob Herring
312*724ba675SRob Herring&tve {
313*724ba675SRob Herring	pinctrl-names = "default";
314*724ba675SRob Herring	pinctrl-0 = <&pinctrl_vga_sync>;
315*724ba675SRob Herring	ddc-i2c-bus = <&i2c2>;
316*724ba675SRob Herring	fsl,tve-mode = "vga";
317*724ba675SRob Herring	fsl,hsync-pin = <7>;	/* IPU DI1 PIN7 via EIM_OE */
318*724ba675SRob Herring	fsl,vsync-pin = <8>;	/* IPU DI1 PIN8 via EIM_RW */
319*724ba675SRob Herring	status = "okay";
320*724ba675SRob Herring};
321*724ba675SRob Herring
322*724ba675SRob Herring&uart1 {
323*724ba675SRob Herring	pinctrl-names = "default";
324*724ba675SRob Herring	pinctrl-0 = <&pinctrl_uart1>;
325*724ba675SRob Herring	status = "okay";
326*724ba675SRob Herring};
327*724ba675SRob Herring
328*724ba675SRob Herring&i2c2 {
329*724ba675SRob Herring	pinctrl-names = "default";
330*724ba675SRob Herring	pinctrl-0 = <&pinctrl_i2c2>;
331*724ba675SRob Herring	status = "okay";
332*724ba675SRob Herring
333*724ba675SRob Herring	sgtl5000: codec@a {
334*724ba675SRob Herring		compatible = "fsl,sgtl5000";
335*724ba675SRob Herring		reg = <0x0a>;
336*724ba675SRob Herring		pinctrl-names = "default";
337*724ba675SRob Herring		pinctrl-0 = <&pinctrl_codec>;
338*724ba675SRob Herring		#sound-dai-cells = <0>;
339*724ba675SRob Herring		VDDA-supply = <&reg_3p2v>;
340*724ba675SRob Herring		VDDIO-supply = <&reg_3p2v>;
341*724ba675SRob Herring		clocks = <&clks IMX5_CLK_SSI_EXT1_GATE>;
342*724ba675SRob Herring	};
343*724ba675SRob Herring};
344*724ba675SRob Herring
345*724ba675SRob Herring&i2c1 {
346*724ba675SRob Herring	pinctrl-names = "default";
347*724ba675SRob Herring	pinctrl-0 = <&pinctrl_i2c1>;
348*724ba675SRob Herring	status = "okay";
349*724ba675SRob Herring
350*724ba675SRob Herring	accelerometer: mma8450@1c {
351*724ba675SRob Herring		compatible = "fsl,mma8450";
352*724ba675SRob Herring		reg = <0x1c>;
353*724ba675SRob Herring	};
354*724ba675SRob Herring};
355*724ba675SRob Herring
356*724ba675SRob Herring&audmux {
357*724ba675SRob Herring	pinctrl-names = "default";
358*724ba675SRob Herring	pinctrl-0 = <&pinctrl_audmux>;
359*724ba675SRob Herring	status = "okay";
360*724ba675SRob Herring};
361*724ba675SRob Herring
362*724ba675SRob Herring&fec {
363*724ba675SRob Herring	pinctrl-names = "default";
364*724ba675SRob Herring	pinctrl-0 = <&pinctrl_fec>;
365*724ba675SRob Herring	phy-mode = "rmii";
366*724ba675SRob Herring	phy-reset-gpios = <&gpio7 6 GPIO_ACTIVE_LOW>;
367*724ba675SRob Herring	status = "okay";
368*724ba675SRob Herring};
369*724ba675SRob Herring
370*724ba675SRob Herring&sata {
371*724ba675SRob Herring	status = "okay";
372*724ba675SRob Herring};
373*724ba675SRob Herring
374*724ba675SRob Herring&vpu {
375*724ba675SRob Herring	status = "okay";
376*724ba675SRob Herring};
377*724ba675SRob Herring
378*724ba675SRob Herring&usbh1 {
379*724ba675SRob Herring	vbus-supply = <&reg_usb_vbus>;
380*724ba675SRob Herring	phy_type = "utmi";
381*724ba675SRob Herring	status = "okay";
382*724ba675SRob Herring};
383*724ba675SRob Herring
384*724ba675SRob Herring&usbotg {
385*724ba675SRob Herring	dr_mode = "peripheral";
386*724ba675SRob Herring	status = "okay";
387*724ba675SRob Herring};
388