xref: /linux/arch/arm/boot/dts/nxp/imx/imx51-eukrea-cpuimx51.dtsi (revision c532de5a67a70f8533d495f8f2aaa9a0491c3ad0)
1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Copyright 2013 Eukréa Electromatique <denis@eukrea.com>
4 */
5
6#include "imx51.dtsi"
7
8/ {
9	model = "Eukrea CPUIMX51";
10	compatible = "eukrea,cpuimx51", "fsl,imx51";
11
12	memory@90000000 {
13		device_type = "memory";
14		reg = <0x90000000 0x10000000>; /* 256M */
15	};
16};
17
18&fec {
19	pinctrl-names = "default";
20	pinctrl-0 = <&pinctrl_fec>;
21	status = "okay";
22};
23
24&i2c1 {
25	pinctrl-names = "default";
26	pinctrl-0 = <&pinctrl_i2c1>;
27	status = "okay";
28
29	pcf8563@51 {
30		compatible = "nxp,pcf8563";
31		reg = <0x51>;
32	};
33
34	tsc2007: tsc2007@49 {
35		compatible = "ti,tsc2007";
36		gpios = <&gpio4 0 1>;
37		interrupt-parent = <&gpio4>;
38		interrupts = <0x0 0x8>;
39		pinctrl-names = "default";
40		pinctrl-0 = <&pinctrl_tsc2007_1>;
41		reg = <0x49>;
42		ti,x-plate-ohms = <180>;
43	};
44};
45
46&iomuxc {
47	imx51-eukrea {
48		pinctrl_tsc2007_1: tsc2007grp-1 {
49			fsl,pins = <
50				MX51_PAD_GPIO_NAND__GPIO_NAND 0x1f5
51				MX51_PAD_NANDF_D8__GPIO4_0 0x1f5
52			>;
53		};
54
55		pinctrl_fec: fecgrp {
56			fsl,pins = <
57				MX51_PAD_DI_GP3__FEC_TX_ER		0x80000000
58				MX51_PAD_DI2_PIN4__FEC_CRS		0x80000000
59				MX51_PAD_DI2_PIN2__FEC_MDC		0x80000000
60				MX51_PAD_DI2_PIN3__FEC_MDIO		0x80000000
61				MX51_PAD_DI2_DISP_CLK__FEC_RDATA1	0x80000000
62				MX51_PAD_DI_GP4__FEC_RDATA2		0x80000000
63				MX51_PAD_DISP2_DAT0__FEC_RDATA3		0x80000000
64				MX51_PAD_DISP2_DAT1__FEC_RX_ER		0x80000000
65				MX51_PAD_DISP2_DAT6__FEC_TDATA1		0x80000000
66				MX51_PAD_DISP2_DAT7__FEC_TDATA2		0x80000000
67				MX51_PAD_DISP2_DAT8__FEC_TDATA3		0x80000000
68				MX51_PAD_DISP2_DAT9__FEC_TX_EN		0x80000000
69				MX51_PAD_DISP2_DAT10__FEC_COL		0x80000000
70				MX51_PAD_DISP2_DAT11__FEC_RX_CLK	0x80000000
71				MX51_PAD_DISP2_DAT12__FEC_RX_DV		0x80000000
72				MX51_PAD_DISP2_DAT13__FEC_TX_CLK	0x80000000
73				MX51_PAD_DISP2_DAT14__FEC_RDATA0	0x80000000
74				MX51_PAD_DISP2_DAT15__FEC_TDATA0	0x80000000
75			>;
76		};
77
78		pinctrl_i2c1: i2c1grp {
79			fsl,pins = <
80				MX51_PAD_SD2_CMD__I2C1_SCL		0x400001ed
81				MX51_PAD_SD2_CLK__I2C1_SDA		0x400001ed
82			>;
83		};
84	};
85};
86
87&nfc {
88	nand-bus-width = <8>;
89	nand-ecc-mode = "hw";
90	nand-on-flash-bbt;
91	status = "okay";
92};
93