xref: /linux/arch/arm/boot/dts/nxp/imx/imx35-eukrea-mbimxsd35-baseboard.dts (revision fcc79e1714e8c2b8e216dc3149812edd37884eef)
1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Copyright 2013 Eukréa Electromatique <denis@eukrea.com>
4 */
5
6/dts-v1/;
7
8#include <dt-bindings/gpio/gpio.h>
9#include <dt-bindings/input/input.h>
10#include "imx35-eukrea-cpuimx35.dtsi"
11
12/ {
13	model = "Eukrea CPUIMX35";
14	compatible = "eukrea,mbimxsd35-baseboard", "eukrea,cpuimx35", "fsl,imx35";
15
16	gpio-keys {
17		compatible = "gpio-keys";
18		pinctrl-names = "default";
19		pinctrl-0 = <&pinctrl_bp1>;
20
21		button {
22			label = "BP1";
23			gpios = <&gpio3 25 GPIO_ACTIVE_LOW>;
24			linux,code = <BTN_MISC>;
25			wakeup-source;
26			linux,input-type = <1>;
27		};
28	};
29
30	leds {
31		compatible = "gpio-leds";
32		pinctrl-names = "default";
33		pinctrl-0 = <&pinctrl_led1>;
34
35		led1 {
36			label = "led1";
37			gpios = <&gpio3 29 GPIO_ACTIVE_LOW>;
38			linux,default-trigger = "heartbeat";
39		};
40	};
41
42	sound {
43		compatible = "eukrea,asoc-tlv320";
44		eukrea,model = "imx35-eukrea-tlv320aic23";
45		ssi-controller = <&ssi1>;
46		fsl,mux-int-port = <1>;
47		fsl,mux-ext-port = <4>;
48	};
49};
50
51&audmux {
52	pinctrl-names = "default";
53	pinctrl-0 = <&pinctrl_audmux>;
54	status = "okay";
55};
56
57&esdhc1 {
58	pinctrl-names = "default";
59	pinctrl-0 = <&pinctrl_esdhc1>;
60	cd-gpios = <&gpio3 24 GPIO_ACTIVE_LOW>;
61	status = "okay";
62};
63
64&i2c1 {
65	tlv320aic23: codec@1a {
66		compatible = "ti,tlv320aic23";
67		reg = <0x1a>;
68	};
69};
70
71&iomuxc {
72	pinctrl_audmux: audmuxgrp {
73		fsl,pins = <
74			MX35_PAD_STXFS4__AUDMUX_AUD4_TXFS	0x80000000
75			MX35_PAD_STXD4__AUDMUX_AUD4_TXD		0x80000000
76			MX35_PAD_SRXD4__AUDMUX_AUD4_RXD		0x80000000
77			MX35_PAD_SCK4__AUDMUX_AUD4_TXC		0x80000000
78		>;
79	};
80
81	pinctrl_bp1: bp1grp {
82		fsl,pins = <MX35_PAD_LD19__GPIO3_25  0x80000000>;
83	};
84
85	pinctrl_esdhc1: esdhc1grp {
86		fsl,pins = <
87			MX35_PAD_SD1_CMD__ESDHC1_CMD		0x80000000
88			MX35_PAD_SD1_CLK__ESDHC1_CLK		0x80000000
89			MX35_PAD_SD1_DATA0__ESDHC1_DAT0		0x80000000
90			MX35_PAD_SD1_DATA1__ESDHC1_DAT1		0x80000000
91			MX35_PAD_SD1_DATA2__ESDHC1_DAT2		0x80000000
92			MX35_PAD_SD1_DATA3__ESDHC1_DAT3		0x80000000
93			MX35_PAD_LD18__GPIO3_24			0x80000000 /* CD */
94		>;
95	};
96
97	pinctrl_led1: led1grp {
98		fsl,pins = <MX35_PAD_LD23__GPIO3_29  0x80000000>;
99	};
100
101	pinctrl_reg_lcd_3v3: reg-lcd-3v3grp {
102		fsl,pins = <MX35_PAD_D3_CLS__GPIO1_4 0x80000000>;
103	};
104
105	pinctrl_uart1: uart1grp {
106		fsl,pins = <
107			MX35_PAD_TXD1__UART1_TXD_MUX		0x1c5
108			MX35_PAD_RXD1__UART1_RXD_MUX		0x1c5
109			MX35_PAD_CTS1__UART1_CTS		0x1c5
110			MX35_PAD_RTS1__UART1_RTS		0x1c5
111		>;
112	};
113
114	pinctrl_uart2: uart2grp {
115		fsl,pins = <
116			MX35_PAD_RXD2__UART2_RXD_MUX		0x1c5
117			MX35_PAD_TXD2__UART2_TXD_MUX		0x1c5
118			MX35_PAD_RTS2__UART2_RTS		0x1c5
119			MX35_PAD_CTS2__UART2_CTS		0x1c5
120		>;
121	};
122};
123
124&ssi1 {
125	codec-handle = <&tlv320aic23>;
126	status = "okay";
127};
128
129&uart1 {
130	pinctrl-names = "default";
131	pinctrl-0 = <&pinctrl_uart1>;
132	uart-has-rtscts;
133	status = "okay";
134};
135
136&uart2 {
137	pinctrl-names = "default";
138	pinctrl-0 = <&pinctrl_uart2>;
139	uart-has-rtscts;
140	status = "okay";
141};
142
143&usbhost1 {
144	phy_type = "serial";
145	dr_mode = "host";
146	status = "okay";
147};
148
149&usbotg {
150	phy_type = "utmi";
151	dr_mode = "otg";
152	external-vbus-divider;
153	status = "okay";
154};
155