1724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0+ 2724ba675SRob Herring// 3724ba675SRob Herring// Copyright 2012 Sascha Hauer, Pengutronix 4724ba675SRob Herring 5724ba675SRob Herring#include "imx27-pinfunc.h" 6724ba675SRob Herring 7724ba675SRob Herring#include <dt-bindings/clock/imx27-clock.h> 8724ba675SRob Herring#include <dt-bindings/gpio/gpio.h> 9724ba675SRob Herring#include <dt-bindings/input/input.h> 10724ba675SRob Herring#include <dt-bindings/interrupt-controller/irq.h> 11724ba675SRob Herring 12724ba675SRob Herring/ { 13724ba675SRob Herring #address-cells = <1>; 14724ba675SRob Herring #size-cells = <1>; 15724ba675SRob Herring /* 16724ba675SRob Herring * The decompressor and also some bootloaders rely on a 17724ba675SRob Herring * pre-existing /chosen node to be available to insert the 18724ba675SRob Herring * command line and merge other ATAGS info. 19724ba675SRob Herring */ 20724ba675SRob Herring chosen {}; 21724ba675SRob Herring 22724ba675SRob Herring aliases { 23724ba675SRob Herring ethernet0 = &fec; 24724ba675SRob Herring gpio0 = &gpio1; 25724ba675SRob Herring gpio1 = &gpio2; 26724ba675SRob Herring gpio2 = &gpio3; 27724ba675SRob Herring gpio3 = &gpio4; 28724ba675SRob Herring gpio4 = &gpio5; 29724ba675SRob Herring gpio5 = &gpio6; 30724ba675SRob Herring i2c0 = &i2c1; 31724ba675SRob Herring i2c1 = &i2c2; 32724ba675SRob Herring serial0 = &uart1; 33724ba675SRob Herring serial1 = &uart2; 34724ba675SRob Herring serial2 = &uart3; 35724ba675SRob Herring serial3 = &uart4; 36724ba675SRob Herring serial4 = &uart5; 37724ba675SRob Herring serial5 = &uart6; 38724ba675SRob Herring spi0 = &cspi1; 39724ba675SRob Herring spi1 = &cspi2; 40724ba675SRob Herring spi2 = &cspi3; 41724ba675SRob Herring }; 42724ba675SRob Herring 43724ba675SRob Herring aitc: aitc-interrupt-controller@10040000 { 44724ba675SRob Herring compatible = "fsl,imx27-aitc", "fsl,avic"; 45724ba675SRob Herring interrupt-controller; 46724ba675SRob Herring #interrupt-cells = <1>; 47724ba675SRob Herring reg = <0x10040000 0x1000>; 48724ba675SRob Herring }; 49724ba675SRob Herring 50724ba675SRob Herring clocks { 51724ba675SRob Herring clk_osc26m: osc26m { 52724ba675SRob Herring compatible = "fsl,imx-osc26m", "fixed-clock"; 53724ba675SRob Herring #clock-cells = <0>; 54724ba675SRob Herring clock-frequency = <26000000>; 55724ba675SRob Herring }; 56724ba675SRob Herring }; 57724ba675SRob Herring 58724ba675SRob Herring cpus { 59724ba675SRob Herring #size-cells = <0>; 60724ba675SRob Herring #address-cells = <1>; 61724ba675SRob Herring 62724ba675SRob Herring cpu: cpu@0 { 63724ba675SRob Herring device_type = "cpu"; 64724ba675SRob Herring reg = <0>; 65724ba675SRob Herring compatible = "arm,arm926ej-s"; 66724ba675SRob Herring operating-points = < 67724ba675SRob Herring /* kHz uV */ 68724ba675SRob Herring 266000 1300000 69724ba675SRob Herring 399000 1450000 70724ba675SRob Herring >; 71724ba675SRob Herring clock-latency = <62500>; 72724ba675SRob Herring clocks = <&clks IMX27_CLK_CPU_DIV>; 73724ba675SRob Herring voltage-tolerance = <5>; 74724ba675SRob Herring }; 75724ba675SRob Herring }; 76724ba675SRob Herring 77724ba675SRob Herring soc: soc { 78724ba675SRob Herring #address-cells = <1>; 79724ba675SRob Herring #size-cells = <1>; 80724ba675SRob Herring compatible = "simple-bus"; 81724ba675SRob Herring interrupt-parent = <&aitc>; 82724ba675SRob Herring ranges; 83724ba675SRob Herring 84724ba675SRob Herring aipi1: aipi@10000000 { /* AIPI1 */ 85724ba675SRob Herring compatible = "fsl,aipi-bus", "simple-bus"; 86724ba675SRob Herring #address-cells = <1>; 87724ba675SRob Herring #size-cells = <1>; 88724ba675SRob Herring reg = <0x10000000 0x20000>; 89724ba675SRob Herring ranges; 90724ba675SRob Herring 91724ba675SRob Herring dma: dma@10001000 { 92724ba675SRob Herring compatible = "fsl,imx27-dma"; 93724ba675SRob Herring reg = <0x10001000 0x1000>; 94724ba675SRob Herring interrupts = <32>; 95724ba675SRob Herring clocks = <&clks IMX27_CLK_DMA_IPG_GATE>, 96724ba675SRob Herring <&clks IMX27_CLK_DMA_AHB_GATE>; 97724ba675SRob Herring clock-names = "ipg", "ahb"; 98724ba675SRob Herring #dma-cells = <1>; 99724ba675SRob Herring dma-channels = <16>; 100724ba675SRob Herring }; 101724ba675SRob Herring 102724ba675SRob Herring wdog: watchdog@10002000 { 103724ba675SRob Herring compatible = "fsl,imx27-wdt", "fsl,imx21-wdt"; 104724ba675SRob Herring reg = <0x10002000 0x1000>; 105724ba675SRob Herring interrupts = <27>; 106724ba675SRob Herring clocks = <&clks IMX27_CLK_WDOG_IPG_GATE>; 107724ba675SRob Herring }; 108724ba675SRob Herring 109724ba675SRob Herring gpt1: timer@10003000 { 110724ba675SRob Herring compatible = "fsl,imx27-gpt", "fsl,imx21-gpt"; 111724ba675SRob Herring reg = <0x10003000 0x1000>; 112724ba675SRob Herring interrupts = <26>; 113724ba675SRob Herring clocks = <&clks IMX27_CLK_GPT1_IPG_GATE>, 114724ba675SRob Herring <&clks IMX27_CLK_PER1_GATE>; 115724ba675SRob Herring clock-names = "ipg", "per"; 116724ba675SRob Herring }; 117724ba675SRob Herring 118724ba675SRob Herring gpt2: timer@10004000 { 119724ba675SRob Herring compatible = "fsl,imx27-gpt", "fsl,imx21-gpt"; 120724ba675SRob Herring reg = <0x10004000 0x1000>; 121724ba675SRob Herring interrupts = <25>; 122724ba675SRob Herring clocks = <&clks IMX27_CLK_GPT2_IPG_GATE>, 123724ba675SRob Herring <&clks IMX27_CLK_PER1_GATE>; 124724ba675SRob Herring clock-names = "ipg", "per"; 125724ba675SRob Herring }; 126724ba675SRob Herring 127724ba675SRob Herring gpt3: timer@10005000 { 128724ba675SRob Herring compatible = "fsl,imx27-gpt", "fsl,imx21-gpt"; 129724ba675SRob Herring reg = <0x10005000 0x1000>; 130724ba675SRob Herring interrupts = <24>; 131724ba675SRob Herring clocks = <&clks IMX27_CLK_GPT3_IPG_GATE>, 132724ba675SRob Herring <&clks IMX27_CLK_PER1_GATE>; 133724ba675SRob Herring clock-names = "ipg", "per"; 134724ba675SRob Herring }; 135724ba675SRob Herring 136724ba675SRob Herring pwm: pwm@10006000 { 137724ba675SRob Herring #pwm-cells = <3>; 138724ba675SRob Herring compatible = "fsl,imx27-pwm"; 139724ba675SRob Herring reg = <0x10006000 0x1000>; 140724ba675SRob Herring interrupts = <23>; 141724ba675SRob Herring clocks = <&clks IMX27_CLK_PWM_IPG_GATE>, 142724ba675SRob Herring <&clks IMX27_CLK_PER1_GATE>; 143724ba675SRob Herring clock-names = "ipg", "per"; 144724ba675SRob Herring }; 145724ba675SRob Herring 146724ba675SRob Herring rtc: rtc@10007000 { 147724ba675SRob Herring compatible = "fsl,imx21-rtc"; 148724ba675SRob Herring reg = <0x10007000 0x1000>; 149724ba675SRob Herring interrupts = <22>; 150724ba675SRob Herring clocks = <&clks IMX27_CLK_CKIL>, 151724ba675SRob Herring <&clks IMX27_CLK_RTC_IPG_GATE>; 152724ba675SRob Herring clock-names = "ref", "ipg"; 153724ba675SRob Herring }; 154724ba675SRob Herring 155724ba675SRob Herring kpp: kpp@10008000 { 156724ba675SRob Herring compatible = "fsl,imx27-kpp", "fsl,imx21-kpp"; 157724ba675SRob Herring reg = <0x10008000 0x1000>; 158724ba675SRob Herring interrupts = <21>; 159724ba675SRob Herring clocks = <&clks IMX27_CLK_KPP_IPG_GATE>; 160724ba675SRob Herring status = "disabled"; 161724ba675SRob Herring }; 162724ba675SRob Herring 163724ba675SRob Herring owire: owire@10009000 { 164724ba675SRob Herring compatible = "fsl,imx27-owire", "fsl,imx21-owire"; 165724ba675SRob Herring reg = <0x10009000 0x1000>; 166724ba675SRob Herring clocks = <&clks IMX27_CLK_OWIRE_IPG_GATE>; 167724ba675SRob Herring status = "disabled"; 168724ba675SRob Herring }; 169724ba675SRob Herring 170724ba675SRob Herring uart1: serial@1000a000 { 171724ba675SRob Herring compatible = "fsl,imx27-uart", "fsl,imx21-uart"; 172724ba675SRob Herring reg = <0x1000a000 0x1000>; 173724ba675SRob Herring interrupts = <20>; 174724ba675SRob Herring clocks = <&clks IMX27_CLK_UART1_IPG_GATE>, 175724ba675SRob Herring <&clks IMX27_CLK_PER1_GATE>; 176724ba675SRob Herring clock-names = "ipg", "per"; 177724ba675SRob Herring status = "disabled"; 178724ba675SRob Herring }; 179724ba675SRob Herring 180724ba675SRob Herring uart2: serial@1000b000 { 181724ba675SRob Herring compatible = "fsl,imx27-uart", "fsl,imx21-uart"; 182724ba675SRob Herring reg = <0x1000b000 0x1000>; 183724ba675SRob Herring interrupts = <19>; 184724ba675SRob Herring clocks = <&clks IMX27_CLK_UART2_IPG_GATE>, 185724ba675SRob Herring <&clks IMX27_CLK_PER1_GATE>; 186724ba675SRob Herring clock-names = "ipg", "per"; 187724ba675SRob Herring status = "disabled"; 188724ba675SRob Herring }; 189724ba675SRob Herring 190724ba675SRob Herring uart3: serial@1000c000 { 191724ba675SRob Herring compatible = "fsl,imx27-uart", "fsl,imx21-uart"; 192724ba675SRob Herring reg = <0x1000c000 0x1000>; 193724ba675SRob Herring interrupts = <18>; 194724ba675SRob Herring clocks = <&clks IMX27_CLK_UART3_IPG_GATE>, 195724ba675SRob Herring <&clks IMX27_CLK_PER1_GATE>; 196724ba675SRob Herring clock-names = "ipg", "per"; 197724ba675SRob Herring status = "disabled"; 198724ba675SRob Herring }; 199724ba675SRob Herring 200724ba675SRob Herring uart4: serial@1000d000 { 201724ba675SRob Herring compatible = "fsl,imx27-uart", "fsl,imx21-uart"; 202724ba675SRob Herring reg = <0x1000d000 0x1000>; 203724ba675SRob Herring interrupts = <17>; 204724ba675SRob Herring clocks = <&clks IMX27_CLK_UART4_IPG_GATE>, 205724ba675SRob Herring <&clks IMX27_CLK_PER1_GATE>; 206724ba675SRob Herring clock-names = "ipg", "per"; 207724ba675SRob Herring status = "disabled"; 208724ba675SRob Herring }; 209724ba675SRob Herring 210724ba675SRob Herring cspi1: spi@1000e000 { 211724ba675SRob Herring #address-cells = <1>; 212724ba675SRob Herring #size-cells = <0>; 213724ba675SRob Herring compatible = "fsl,imx27-cspi"; 214724ba675SRob Herring reg = <0x1000e000 0x1000>; 215724ba675SRob Herring interrupts = <16>; 216724ba675SRob Herring clocks = <&clks IMX27_CLK_CSPI1_IPG_GATE>, 217724ba675SRob Herring <&clks IMX27_CLK_PER2_GATE>; 218724ba675SRob Herring clock-names = "ipg", "per"; 219724ba675SRob Herring status = "disabled"; 220724ba675SRob Herring }; 221724ba675SRob Herring 222724ba675SRob Herring cspi2: spi@1000f000 { 223724ba675SRob Herring #address-cells = <1>; 224724ba675SRob Herring #size-cells = <0>; 225724ba675SRob Herring compatible = "fsl,imx27-cspi"; 226724ba675SRob Herring reg = <0x1000f000 0x1000>; 227724ba675SRob Herring interrupts = <15>; 228724ba675SRob Herring clocks = <&clks IMX27_CLK_CSPI2_IPG_GATE>, 229724ba675SRob Herring <&clks IMX27_CLK_PER2_GATE>; 230724ba675SRob Herring clock-names = "ipg", "per"; 231724ba675SRob Herring status = "disabled"; 232724ba675SRob Herring }; 233724ba675SRob Herring 234724ba675SRob Herring ssi1: ssi@10010000 { 235724ba675SRob Herring #sound-dai-cells = <0>; 236724ba675SRob Herring compatible = "fsl,imx27-ssi", "fsl,imx21-ssi"; 237724ba675SRob Herring reg = <0x10010000 0x1000>; 238724ba675SRob Herring interrupts = <14>; 239724ba675SRob Herring clocks = <&clks IMX27_CLK_SSI1_IPG_GATE>; 240724ba675SRob Herring dmas = <&dma 12>, <&dma 13>, <&dma 14>, <&dma 15>; 241724ba675SRob Herring dma-names = "rx0", "tx0", "rx1", "tx1"; 242724ba675SRob Herring fsl,fifo-depth = <8>; 243724ba675SRob Herring status = "disabled"; 244724ba675SRob Herring }; 245724ba675SRob Herring 246724ba675SRob Herring ssi2: ssi@10011000 { 247724ba675SRob Herring #sound-dai-cells = <0>; 248724ba675SRob Herring compatible = "fsl,imx27-ssi", "fsl,imx21-ssi"; 249724ba675SRob Herring reg = <0x10011000 0x1000>; 250724ba675SRob Herring interrupts = <13>; 251724ba675SRob Herring clocks = <&clks IMX27_CLK_SSI2_IPG_GATE>; 252724ba675SRob Herring dmas = <&dma 8>, <&dma 9>, <&dma 10>, <&dma 11>; 253724ba675SRob Herring dma-names = "rx0", "tx0", "rx1", "tx1"; 254724ba675SRob Herring fsl,fifo-depth = <8>; 255724ba675SRob Herring status = "disabled"; 256724ba675SRob Herring }; 257724ba675SRob Herring 258724ba675SRob Herring i2c1: i2c@10012000 { 259724ba675SRob Herring #address-cells = <1>; 260724ba675SRob Herring #size-cells = <0>; 261724ba675SRob Herring compatible = "fsl,imx27-i2c", "fsl,imx21-i2c"; 262724ba675SRob Herring reg = <0x10012000 0x1000>; 263724ba675SRob Herring interrupts = <12>; 264724ba675SRob Herring clocks = <&clks IMX27_CLK_I2C1_IPG_GATE>; 265724ba675SRob Herring status = "disabled"; 266724ba675SRob Herring }; 267724ba675SRob Herring 268724ba675SRob Herring sdhci1: mmc@10013000 { 269724ba675SRob Herring compatible = "fsl,imx27-mmc", "fsl,imx21-mmc"; 270724ba675SRob Herring reg = <0x10013000 0x1000>; 271724ba675SRob Herring interrupts = <11>; 272724ba675SRob Herring clocks = <&clks IMX27_CLK_SDHC1_IPG_GATE>, 273724ba675SRob Herring <&clks IMX27_CLK_PER2_GATE>; 274724ba675SRob Herring clock-names = "ipg", "per"; 275724ba675SRob Herring dmas = <&dma 7>; 276724ba675SRob Herring dma-names = "rx-tx"; 277724ba675SRob Herring status = "disabled"; 278724ba675SRob Herring }; 279724ba675SRob Herring 280724ba675SRob Herring sdhci2: mmc@10014000 { 281724ba675SRob Herring compatible = "fsl,imx27-mmc", "fsl,imx21-mmc"; 282724ba675SRob Herring reg = <0x10014000 0x1000>; 283724ba675SRob Herring interrupts = <10>; 284724ba675SRob Herring clocks = <&clks IMX27_CLK_SDHC2_IPG_GATE>, 285724ba675SRob Herring <&clks IMX27_CLK_PER2_GATE>; 286724ba675SRob Herring clock-names = "ipg", "per"; 287724ba675SRob Herring dmas = <&dma 6>; 288724ba675SRob Herring dma-names = "rx-tx"; 289724ba675SRob Herring status = "disabled"; 290724ba675SRob Herring }; 291724ba675SRob Herring 292724ba675SRob Herring iomuxc: iomuxc@10015000 { 293724ba675SRob Herring compatible = "fsl,imx27-iomuxc"; 294724ba675SRob Herring reg = <0x10015000 0x600>; 295724ba675SRob Herring #address-cells = <1>; 296724ba675SRob Herring #size-cells = <1>; 297724ba675SRob Herring ranges; 298724ba675SRob Herring 299724ba675SRob Herring gpio1: gpio@10015000 { 300724ba675SRob Herring compatible = "fsl,imx27-gpio", "fsl,imx21-gpio"; 301724ba675SRob Herring reg = <0x10015000 0x100>; 302724ba675SRob Herring clocks = <&clks IMX27_CLK_GPIO_IPG_GATE>; 303724ba675SRob Herring interrupts = <8>; 304724ba675SRob Herring gpio-controller; 305724ba675SRob Herring #gpio-cells = <2>; 306724ba675SRob Herring interrupt-controller; 307724ba675SRob Herring #interrupt-cells = <2>; 308724ba675SRob Herring }; 309724ba675SRob Herring 310724ba675SRob Herring gpio2: gpio@10015100 { 311724ba675SRob Herring compatible = "fsl,imx27-gpio", "fsl,imx21-gpio"; 312724ba675SRob Herring reg = <0x10015100 0x100>; 313724ba675SRob Herring clocks = <&clks IMX27_CLK_GPIO_IPG_GATE>; 314724ba675SRob Herring interrupts = <8>; 315724ba675SRob Herring gpio-controller; 316724ba675SRob Herring #gpio-cells = <2>; 317724ba675SRob Herring interrupt-controller; 318724ba675SRob Herring #interrupt-cells = <2>; 319724ba675SRob Herring }; 320724ba675SRob Herring 321724ba675SRob Herring gpio3: gpio@10015200 { 322724ba675SRob Herring compatible = "fsl,imx27-gpio", "fsl,imx21-gpio"; 323724ba675SRob Herring reg = <0x10015200 0x100>; 324724ba675SRob Herring clocks = <&clks IMX27_CLK_GPIO_IPG_GATE>; 325724ba675SRob Herring interrupts = <8>; 326724ba675SRob Herring gpio-controller; 327724ba675SRob Herring #gpio-cells = <2>; 328724ba675SRob Herring interrupt-controller; 329724ba675SRob Herring #interrupt-cells = <2>; 330724ba675SRob Herring }; 331724ba675SRob Herring 332724ba675SRob Herring gpio4: gpio@10015300 { 333724ba675SRob Herring compatible = "fsl,imx27-gpio", "fsl,imx21-gpio"; 334724ba675SRob Herring reg = <0x10015300 0x100>; 335724ba675SRob Herring clocks = <&clks IMX27_CLK_GPIO_IPG_GATE>; 336724ba675SRob Herring interrupts = <8>; 337724ba675SRob Herring gpio-controller; 338724ba675SRob Herring #gpio-cells = <2>; 339724ba675SRob Herring interrupt-controller; 340724ba675SRob Herring #interrupt-cells = <2>; 341724ba675SRob Herring }; 342724ba675SRob Herring 343724ba675SRob Herring gpio5: gpio@10015400 { 344724ba675SRob Herring compatible = "fsl,imx27-gpio", "fsl,imx21-gpio"; 345724ba675SRob Herring reg = <0x10015400 0x100>; 346724ba675SRob Herring clocks = <&clks IMX27_CLK_GPIO_IPG_GATE>; 347724ba675SRob Herring interrupts = <8>; 348724ba675SRob Herring gpio-controller; 349724ba675SRob Herring #gpio-cells = <2>; 350724ba675SRob Herring interrupt-controller; 351724ba675SRob Herring #interrupt-cells = <2>; 352724ba675SRob Herring }; 353724ba675SRob Herring 354724ba675SRob Herring gpio6: gpio@10015500 { 355724ba675SRob Herring compatible = "fsl,imx27-gpio", "fsl,imx21-gpio"; 356724ba675SRob Herring reg = <0x10015500 0x100>; 357724ba675SRob Herring clocks = <&clks IMX27_CLK_GPIO_IPG_GATE>; 358724ba675SRob Herring interrupts = <8>; 359724ba675SRob Herring gpio-controller; 360724ba675SRob Herring #gpio-cells = <2>; 361724ba675SRob Herring interrupt-controller; 362724ba675SRob Herring #interrupt-cells = <2>; 363724ba675SRob Herring }; 364724ba675SRob Herring }; 365724ba675SRob Herring 366724ba675SRob Herring audmux: audmux@10016000 { 367724ba675SRob Herring compatible = "fsl,imx27-audmux", "fsl,imx21-audmux"; 368724ba675SRob Herring reg = <0x10016000 0x1000>; 369724ba675SRob Herring clocks = <&clks IMX27_CLK_DUMMY>; 370724ba675SRob Herring clock-names = "audmux"; 371724ba675SRob Herring status = "disabled"; 372724ba675SRob Herring }; 373724ba675SRob Herring 374724ba675SRob Herring cspi3: spi@10017000 { 375724ba675SRob Herring #address-cells = <1>; 376724ba675SRob Herring #size-cells = <0>; 377724ba675SRob Herring compatible = "fsl,imx27-cspi"; 378724ba675SRob Herring reg = <0x10017000 0x1000>; 379724ba675SRob Herring interrupts = <6>; 380724ba675SRob Herring clocks = <&clks IMX27_CLK_CSPI3_IPG_GATE>, 381724ba675SRob Herring <&clks IMX27_CLK_PER2_GATE>; 382724ba675SRob Herring clock-names = "ipg", "per"; 383724ba675SRob Herring status = "disabled"; 384724ba675SRob Herring }; 385724ba675SRob Herring 386724ba675SRob Herring gpt4: timer@10019000 { 387724ba675SRob Herring compatible = "fsl,imx27-gpt", "fsl,imx21-gpt"; 388724ba675SRob Herring reg = <0x10019000 0x1000>; 389724ba675SRob Herring interrupts = <4>; 390724ba675SRob Herring clocks = <&clks IMX27_CLK_GPT4_IPG_GATE>, 391724ba675SRob Herring <&clks IMX27_CLK_PER1_GATE>; 392724ba675SRob Herring clock-names = "ipg", "per"; 393724ba675SRob Herring }; 394724ba675SRob Herring 395724ba675SRob Herring gpt5: timer@1001a000 { 396724ba675SRob Herring compatible = "fsl,imx27-gpt", "fsl,imx21-gpt"; 397724ba675SRob Herring reg = <0x1001a000 0x1000>; 398724ba675SRob Herring interrupts = <3>; 399724ba675SRob Herring clocks = <&clks IMX27_CLK_GPT5_IPG_GATE>, 400724ba675SRob Herring <&clks IMX27_CLK_PER1_GATE>; 401724ba675SRob Herring clock-names = "ipg", "per"; 402724ba675SRob Herring }; 403724ba675SRob Herring 404724ba675SRob Herring uart5: serial@1001b000 { 405724ba675SRob Herring compatible = "fsl,imx27-uart", "fsl,imx21-uart"; 406724ba675SRob Herring reg = <0x1001b000 0x1000>; 407724ba675SRob Herring interrupts = <49>; 408724ba675SRob Herring clocks = <&clks IMX27_CLK_UART5_IPG_GATE>, 409724ba675SRob Herring <&clks IMX27_CLK_PER1_GATE>; 410724ba675SRob Herring clock-names = "ipg", "per"; 411724ba675SRob Herring status = "disabled"; 412724ba675SRob Herring }; 413724ba675SRob Herring 414724ba675SRob Herring uart6: serial@1001c000 { 415724ba675SRob Herring compatible = "fsl,imx27-uart", "fsl,imx21-uart"; 416724ba675SRob Herring reg = <0x1001c000 0x1000>; 417724ba675SRob Herring interrupts = <48>; 418724ba675SRob Herring clocks = <&clks IMX27_CLK_UART6_IPG_GATE>, 419724ba675SRob Herring <&clks IMX27_CLK_PER1_GATE>; 420724ba675SRob Herring clock-names = "ipg", "per"; 421724ba675SRob Herring status = "disabled"; 422724ba675SRob Herring }; 423724ba675SRob Herring 424724ba675SRob Herring i2c2: i2c@1001d000 { 425724ba675SRob Herring #address-cells = <1>; 426724ba675SRob Herring #size-cells = <0>; 427724ba675SRob Herring compatible = "fsl,imx27-i2c", "fsl,imx21-i2c"; 428724ba675SRob Herring reg = <0x1001d000 0x1000>; 429724ba675SRob Herring interrupts = <1>; 430724ba675SRob Herring clocks = <&clks IMX27_CLK_I2C2_IPG_GATE>; 431724ba675SRob Herring status = "disabled"; 432724ba675SRob Herring }; 433724ba675SRob Herring 434724ba675SRob Herring sdhci3: mmc@1001e000 { 435724ba675SRob Herring compatible = "fsl,imx27-mmc", "fsl,imx21-mmc"; 436724ba675SRob Herring reg = <0x1001e000 0x1000>; 437724ba675SRob Herring interrupts = <9>; 438724ba675SRob Herring clocks = <&clks IMX27_CLK_SDHC3_IPG_GATE>, 439724ba675SRob Herring <&clks IMX27_CLK_PER2_GATE>; 440724ba675SRob Herring clock-names = "ipg", "per"; 441724ba675SRob Herring dmas = <&dma 36>; 442724ba675SRob Herring dma-names = "rx-tx"; 443724ba675SRob Herring status = "disabled"; 444724ba675SRob Herring }; 445724ba675SRob Herring 446724ba675SRob Herring gpt6: timer@1001f000 { 447724ba675SRob Herring compatible = "fsl,imx27-gpt", "fsl,imx21-gpt"; 448724ba675SRob Herring reg = <0x1001f000 0x1000>; 449724ba675SRob Herring interrupts = <2>; 450724ba675SRob Herring clocks = <&clks IMX27_CLK_GPT6_IPG_GATE>, 451724ba675SRob Herring <&clks IMX27_CLK_PER1_GATE>; 452724ba675SRob Herring clock-names = "ipg", "per"; 453724ba675SRob Herring }; 454724ba675SRob Herring }; 455724ba675SRob Herring 456724ba675SRob Herring aipi2: aipi@10020000 { /* AIPI2 */ 457724ba675SRob Herring compatible = "fsl,aipi-bus", "simple-bus"; 458724ba675SRob Herring #address-cells = <1>; 459724ba675SRob Herring #size-cells = <1>; 460724ba675SRob Herring reg = <0x10020000 0x20000>; 461724ba675SRob Herring ranges; 462724ba675SRob Herring 463724ba675SRob Herring fb: fb@10021000 { 464724ba675SRob Herring compatible = "fsl,imx27-fb", "fsl,imx21-fb"; 465724ba675SRob Herring interrupts = <61>; 466724ba675SRob Herring reg = <0x10021000 0x1000>; 467724ba675SRob Herring clocks = <&clks IMX27_CLK_LCDC_IPG_GATE>, 468724ba675SRob Herring <&clks IMX27_CLK_LCDC_AHB_GATE>, 469724ba675SRob Herring <&clks IMX27_CLK_PER3_GATE>; 470724ba675SRob Herring clock-names = "ipg", "ahb", "per"; 471724ba675SRob Herring status = "disabled"; 472724ba675SRob Herring }; 473724ba675SRob Herring 474724ba675SRob Herring coda: coda@10023000 { 475724ba675SRob Herring compatible = "fsl,imx27-vpu", "cnm,codadx6"; 476724ba675SRob Herring reg = <0x10023000 0x0200>; 477724ba675SRob Herring interrupts = <53>; 478724ba675SRob Herring clocks = <&clks IMX27_CLK_VPU_BAUD_GATE>, 479724ba675SRob Herring <&clks IMX27_CLK_VPU_AHB_GATE>; 480724ba675SRob Herring clock-names = "per", "ahb"; 481724ba675SRob Herring iram = <&iram>; 482724ba675SRob Herring }; 483724ba675SRob Herring 484724ba675SRob Herring usbotg: usb@10024000 { 485724ba675SRob Herring compatible = "fsl,imx27-usb"; 486724ba675SRob Herring reg = <0x10024000 0x200>; 487724ba675SRob Herring interrupts = <56>; 488724ba675SRob Herring clocks = <&clks IMX27_CLK_USB_IPG_GATE>, 489724ba675SRob Herring <&clks IMX27_CLK_USB_AHB_GATE>, 490724ba675SRob Herring <&clks IMX27_CLK_USB_DIV>; 491724ba675SRob Herring clock-names = "ipg", "ahb", "per"; 492724ba675SRob Herring fsl,usbmisc = <&usbmisc 0>; 493724ba675SRob Herring status = "disabled"; 494724ba675SRob Herring }; 495724ba675SRob Herring 496724ba675SRob Herring usbh1: usb@10024200 { 497724ba675SRob Herring compatible = "fsl,imx27-usb"; 498724ba675SRob Herring reg = <0x10024200 0x200>; 499724ba675SRob Herring interrupts = <54>; 500724ba675SRob Herring clocks = <&clks IMX27_CLK_USB_IPG_GATE>, 501724ba675SRob Herring <&clks IMX27_CLK_USB_AHB_GATE>, 502724ba675SRob Herring <&clks IMX27_CLK_USB_DIV>; 503724ba675SRob Herring clock-names = "ipg", "ahb", "per"; 504724ba675SRob Herring fsl,usbmisc = <&usbmisc 1>; 505724ba675SRob Herring dr_mode = "host"; 506724ba675SRob Herring status = "disabled"; 507724ba675SRob Herring }; 508724ba675SRob Herring 509724ba675SRob Herring usbh2: usb@10024400 { 510724ba675SRob Herring compatible = "fsl,imx27-usb"; 511724ba675SRob Herring reg = <0x10024400 0x200>; 512724ba675SRob Herring interrupts = <55>; 513724ba675SRob Herring clocks = <&clks IMX27_CLK_USB_IPG_GATE>, 514724ba675SRob Herring <&clks IMX27_CLK_USB_AHB_GATE>, 515724ba675SRob Herring <&clks IMX27_CLK_USB_DIV>; 516724ba675SRob Herring clock-names = "ipg", "ahb", "per"; 517724ba675SRob Herring fsl,usbmisc = <&usbmisc 2>; 518724ba675SRob Herring dr_mode = "host"; 519724ba675SRob Herring status = "disabled"; 520724ba675SRob Herring }; 521724ba675SRob Herring 522724ba675SRob Herring usbmisc: usbmisc@10024600 { 523724ba675SRob Herring #index-cells = <1>; 524724ba675SRob Herring compatible = "fsl,imx27-usbmisc"; 525724ba675SRob Herring reg = <0x10024600 0x200>; 526724ba675SRob Herring }; 527724ba675SRob Herring 528724ba675SRob Herring sahara2: crypto@10025000 { 529724ba675SRob Herring compatible = "fsl,imx27-sahara"; 530724ba675SRob Herring reg = <0x10025000 0x1000>; 531724ba675SRob Herring interrupts = <59>; 532724ba675SRob Herring clocks = <&clks IMX27_CLK_SAHARA_IPG_GATE>, 533724ba675SRob Herring <&clks IMX27_CLK_SAHARA_AHB_GATE>; 534724ba675SRob Herring clock-names = "ipg", "ahb"; 535724ba675SRob Herring }; 536724ba675SRob Herring 537724ba675SRob Herring clks: ccm@10027000 { 538724ba675SRob Herring compatible = "fsl,imx27-ccm"; 539724ba675SRob Herring reg = <0x10027000 0x1000>; 540724ba675SRob Herring #clock-cells = <1>; 541724ba675SRob Herring }; 542724ba675SRob Herring 543724ba675SRob Herring iim: efuse@10028000 { 544724ba675SRob Herring compatible = "fsl,imx27-iim"; 545724ba675SRob Herring reg = <0x10028000 0x1000>; 546724ba675SRob Herring interrupts = <62>; 547724ba675SRob Herring clocks = <&clks IMX27_CLK_IIM_IPG_GATE>; 548724ba675SRob Herring }; 549724ba675SRob Herring 550724ba675SRob Herring fec: ethernet@1002b000 { 551724ba675SRob Herring compatible = "fsl,imx27-fec"; 552724ba675SRob Herring reg = <0x1002b000 0x1000>; 553724ba675SRob Herring interrupts = <50>; 554724ba675SRob Herring clocks = <&clks IMX27_CLK_FEC_IPG_GATE>, 555724ba675SRob Herring <&clks IMX27_CLK_FEC_AHB_GATE>; 556724ba675SRob Herring clock-names = "ipg", "ahb"; 557724ba675SRob Herring status = "disabled"; 558724ba675SRob Herring }; 559724ba675SRob Herring }; 560724ba675SRob Herring 561724ba675SRob Herring nfc: nand-controller@d8000000 { 562724ba675SRob Herring #address-cells = <1>; 563724ba675SRob Herring #size-cells = <1>; 564724ba675SRob Herring compatible = "fsl,imx27-nand"; 565724ba675SRob Herring reg = <0xd8000000 0x1000>; 566724ba675SRob Herring interrupts = <29>; 567724ba675SRob Herring clocks = <&clks IMX27_CLK_NFC_BAUD_GATE>; 568724ba675SRob Herring status = "disabled"; 569724ba675SRob Herring }; 570724ba675SRob Herring 571724ba675SRob Herring weim: weim@d8002000 { 572724ba675SRob Herring #address-cells = <2>; 573724ba675SRob Herring #size-cells = <1>; 574724ba675SRob Herring compatible = "fsl,imx27-weim"; 575724ba675SRob Herring reg = <0xd8002000 0x1000>; 576724ba675SRob Herring clocks = <&clks IMX27_CLK_EMI_AHB_GATE>; 577724ba675SRob Herring ranges = < 578724ba675SRob Herring 0 0 0xc0000000 0x08000000 579724ba675SRob Herring 1 0 0xc8000000 0x08000000 580724ba675SRob Herring 2 0 0xd0000000 0x02000000 581724ba675SRob Herring 3 0 0xd2000000 0x02000000 582724ba675SRob Herring 4 0 0xd4000000 0x02000000 583724ba675SRob Herring 5 0 0xd6000000 0x02000000 584724ba675SRob Herring >; 585724ba675SRob Herring status = "disabled"; 586724ba675SRob Herring }; 587724ba675SRob Herring 588724ba675SRob Herring iram: sram@ffff4c00 { 589724ba675SRob Herring compatible = "mmio-sram"; 590724ba675SRob Herring reg = <0xffff4c00 0xb400>; 591*2fb7b2a2SFabio Estevam ranges = <0 0xffff4c00 0xb400>; 592*2fb7b2a2SFabio Estevam #address-cells = <1>; 593*2fb7b2a2SFabio Estevam #size-cells = <1>; 594724ba675SRob Herring }; 595724ba675SRob Herring }; 596724ba675SRob Herring}; 597