1// SPDX-License-Identifier: GPL-2.0-or-later 2/* 3 * Copyright 2012 Markus Pargmann, Pengutronix 4 */ 5 6#include "imx27-phytec-phycard-s-som.dtsi" 7 8/ { 9 model = "Phytec pca100 rapid development kit"; 10 compatible = "phytec,imx27-pca100-rdk", "phytec,imx27-pca100", "fsl,imx27"; 11 12 chosen { 13 stdout-path = &uart1; 14 }; 15 16 display: display { 17 model = "Primeview-PD050VL1"; 18 bits-per-pixel = <16>; /* non-standard but required */ 19 fsl,pcr = <0xf0c88080>; /* non-standard but required */ 20 display-timings { 21 native-mode = <&timing0>; 22 timing0: timing0 { 23 hactive = <640>; 24 vactive = <480>; 25 hback-porch = <112>; 26 hfront-porch = <36>; 27 hsync-len = <32>; 28 vback-porch = <33>; 29 vfront-porch = <33>; 30 vsync-len = <2>; 31 clock-frequency = <25000000>; 32 }; 33 }; 34 }; 35 36 reg_3v3: regulator-0 { 37 compatible = "regulator-fixed"; 38 regulator-name = "3V3"; 39 regulator-min-microvolt = <3300000>; 40 regulator-max-microvolt = <3300000>; 41 regulator-always-on; 42 }; 43}; 44 45&fb { 46 display = <&display>; 47 status = "okay"; 48}; 49 50&i2c1 { 51 pinctrl-names = "default"; 52 pinctrl-0 = <&pinctrl_i2c1>; 53 status = "okay"; 54 55 rtc@51 { 56 compatible = "nxp,pcf8563"; 57 reg = <0x51>; 58 }; 59 60 adc@64 { 61 compatible = "maxim,max1037"; 62 vcc-supply = <®_3v3>; 63 reg = <0x64>; 64 }; 65}; 66 67&iomuxc { 68 imx27-phycard-s-rdk { 69 pinctrl_i2c1: i2c1grp { 70 fsl,pins = < 71 MX27_PAD_I2C_DATA__I2C_DATA 0x0 72 MX27_PAD_I2C_CLK__I2C_CLK 0x0 73 >; 74 }; 75 76 pinctrl_owire1: owire1grp { 77 fsl,pins = < 78 MX27_PAD_RTCK__OWIRE 0x0 79 >; 80 }; 81 82 pinctrl_sdhc2: sdhc2grp { 83 fsl,pins = < 84 MX27_PAD_SD2_CLK__SD2_CLK 0x0 85 MX27_PAD_SD2_CMD__SD2_CMD 0x0 86 MX27_PAD_SD2_D0__SD2_D0 0x0 87 MX27_PAD_SD2_D1__SD2_D1 0x0 88 MX27_PAD_SD2_D2__SD2_D2 0x0 89 MX27_PAD_SD2_D3__SD2_D3 0x0 90 MX27_PAD_SSI3_RXDAT__GPIO3_29 0x0 /* CD */ 91 >; 92 }; 93 94 pinctrl_uart1: uart1grp { 95 fsl,pins = < 96 MX27_PAD_UART1_TXD__UART1_TXD 0x0 97 MX27_PAD_UART1_RXD__UART1_RXD 0x0 98 MX27_PAD_UART1_CTS__UART1_CTS 0x0 99 MX27_PAD_UART1_RTS__UART1_RTS 0x0 100 >; 101 }; 102 103 pinctrl_uart2: uart2grp { 104 fsl,pins = < 105 MX27_PAD_UART2_TXD__UART2_TXD 0x0 106 MX27_PAD_UART2_RXD__UART2_RXD 0x0 107 MX27_PAD_UART2_CTS__UART2_CTS 0x0 108 MX27_PAD_UART2_RTS__UART2_RTS 0x0 109 >; 110 }; 111 112 pinctrl_uart3: uart3grp { 113 fsl,pins = < 114 MX27_PAD_UART3_TXD__UART3_TXD 0x0 115 MX27_PAD_UART3_RXD__UART3_RXD 0x0 116 MX27_PAD_UART3_CTS__UART3_CTS 0x0 117 MX27_PAD_UART3_RTS__UART3_RTS 0x0 118 >; 119 }; 120 }; 121}; 122 123&owire { 124 pinctrl-names = "default"; 125 pinctrl-0 = <&pinctrl_owire1>; 126 status = "okay"; 127}; 128 129&sdhci2 { 130 pinctrl-names = "default"; 131 pinctrl-0 = <&pinctrl_sdhc2>; 132 cd-gpios = <&gpio3 29 GPIO_ACTIVE_HIGH>; 133 status = "okay"; 134}; 135 136&uart1 { 137 uart-has-rtscts; 138 pinctrl-names = "default"; 139 pinctrl-0 = <&pinctrl_uart1>; 140 status = "okay"; 141}; 142 143&uart2 { 144 uart-has-rtscts; 145 pinctrl-names = "default"; 146 pinctrl-0 = <&pinctrl_uart2>; 147 status = "okay"; 148}; 149 150&uart3 { 151 uart-has-rtscts; 152 pinctrl-names = "default"; 153 pinctrl-0 = <&pinctrl_uart3>; 154 status = "okay"; 155}; 156