1// SPDX-License-Identifier: GPL-2.0+ 2// 3// Copyright 2012 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de> 4 5#include <dt-bindings/gpio/gpio.h> 6#include "imx25-pinfunc.h" 7 8/ { 9 #address-cells = <1>; 10 #size-cells = <1>; 11 /* 12 * The decompressor and also some bootloaders rely on a 13 * pre-existing /chosen node to be available to insert the 14 * command line and merge other ATAGS info. 15 */ 16 chosen {}; 17 18 aliases { 19 ethernet0 = &fec; 20 gpio0 = &gpio1; 21 gpio1 = &gpio2; 22 gpio2 = &gpio3; 23 gpio3 = &gpio4; 24 i2c0 = &i2c1; 25 i2c1 = &i2c2; 26 i2c2 = &i2c3; 27 mmc0 = &esdhc1; 28 mmc1 = &esdhc2; 29 pwm0 = &pwm1; 30 pwm1 = &pwm2; 31 pwm2 = &pwm3; 32 pwm3 = &pwm4; 33 serial0 = &uart1; 34 serial1 = &uart2; 35 serial2 = &uart3; 36 serial3 = &uart4; 37 serial4 = &uart5; 38 spi0 = &spi1; 39 spi1 = &spi2; 40 spi2 = &spi3; 41 usb0 = &usbotg; 42 usb1 = &usbhost1; 43 }; 44 45 cpus { 46 #address-cells = <1>; 47 #size-cells = <0>; 48 49 cpu@0 { 50 compatible = "arm,arm926ej-s"; 51 device_type = "cpu"; 52 reg = <0>; 53 }; 54 }; 55 56 asic: asic-interrupt-controller@68000000 { 57 compatible = "fsl,imx25-asic", "fsl,avic"; 58 interrupt-controller; 59 #interrupt-cells = <1>; 60 reg = <0x68000000 0x8000000>; 61 }; 62 63 clocks { 64 osc { 65 compatible = "fixed-clock"; 66 #clock-cells = <0>; 67 clock-frequency = <24000000>; 68 }; 69 }; 70 71 usbphy0: usb-phy0 { 72 compatible = "usb-nop-xceiv"; 73 #phy-cells = <0>; 74 }; 75 76 usbphy1: usb-phy1 { 77 compatible = "usb-nop-xceiv"; 78 #phy-cells = <0>; 79 }; 80 81 soc: soc { 82 #address-cells = <1>; 83 #size-cells = <1>; 84 compatible = "simple-bus"; 85 interrupt-parent = <&asic>; 86 ranges; 87 88 bus@43f00000 { /* AIPS1 */ 89 compatible = "fsl,aips-bus", "simple-bus"; 90 #address-cells = <1>; 91 #size-cells = <1>; 92 reg = <0x43f00000 0x100000>; 93 ranges; 94 95 aips1: bridge@43f00000 { 96 compatible = "fsl,imx25-aips"; 97 reg = <0x43f00000 0x4000>; 98 }; 99 100 i2c1: i2c@43f80000 { 101 #address-cells = <1>; 102 #size-cells = <0>; 103 compatible = "fsl,imx25-i2c", "fsl,imx21-i2c"; 104 reg = <0x43f80000 0x4000>; 105 clocks = <&clks 48>; 106 clock-names = "ipg"; 107 interrupts = <3>; 108 status = "disabled"; 109 }; 110 111 i2c3: i2c@43f84000 { 112 #address-cells = <1>; 113 #size-cells = <0>; 114 compatible = "fsl,imx25-i2c", "fsl,imx21-i2c"; 115 reg = <0x43f84000 0x4000>; 116 clocks = <&clks 48>; 117 clock-names = "ipg"; 118 interrupts = <10>; 119 status = "disabled"; 120 }; 121 122 can1: can@43f88000 { 123 compatible = "fsl,imx25-flexcan"; 124 reg = <0x43f88000 0x4000>; 125 interrupts = <43>; 126 clocks = <&clks 75>, <&clks 75>; 127 clock-names = "ipg", "per"; 128 status = "disabled"; 129 }; 130 131 can2: can@43f8c000 { 132 compatible = "fsl,imx25-flexcan"; 133 reg = <0x43f8c000 0x4000>; 134 interrupts = <44>; 135 clocks = <&clks 76>, <&clks 76>; 136 clock-names = "ipg", "per"; 137 status = "disabled"; 138 }; 139 140 uart1: serial@43f90000 { 141 compatible = "fsl,imx25-uart", "fsl,imx21-uart"; 142 reg = <0x43f90000 0x4000>; 143 interrupts = <45>; 144 clocks = <&clks 120>, <&clks 57>; 145 clock-names = "ipg", "per"; 146 status = "disabled"; 147 }; 148 149 uart2: serial@43f94000 { 150 compatible = "fsl,imx25-uart", "fsl,imx21-uart"; 151 reg = <0x43f94000 0x4000>; 152 interrupts = <32>; 153 clocks = <&clks 121>, <&clks 57>; 154 clock-names = "ipg", "per"; 155 status = "disabled"; 156 }; 157 158 i2c2: i2c@43f98000 { 159 #address-cells = <1>; 160 #size-cells = <0>; 161 compatible = "fsl,imx25-i2c", "fsl,imx21-i2c"; 162 reg = <0x43f98000 0x4000>; 163 clocks = <&clks 48>; 164 clock-names = "ipg"; 165 interrupts = <4>; 166 status = "disabled"; 167 }; 168 169 owire@43f9c000 { 170 #address-cells = <1>; 171 #size-cells = <0>; 172 reg = <0x43f9c000 0x4000>; 173 clocks = <&clks 51>; 174 clock-names = ""; 175 interrupts = <2>; 176 status = "disabled"; 177 }; 178 179 spi1: spi@43fa4000 { 180 #address-cells = <1>; 181 #size-cells = <0>; 182 compatible = "fsl,imx25-cspi", "fsl,imx35-cspi"; 183 reg = <0x43fa4000 0x4000>; 184 clocks = <&clks 78>, <&clks 78>; 185 clock-names = "ipg", "per"; 186 interrupts = <14>; 187 status = "disabled"; 188 }; 189 190 kpp: kpp@43fa8000 { 191 compatible = "fsl,imx25-kpp", "fsl,imx21-kpp"; 192 reg = <0x43fa8000 0x4000>; 193 clocks = <&clks 102>; 194 interrupts = <24>; 195 status = "disabled"; 196 }; 197 198 iomuxc: iomuxc@43fac000 { 199 compatible = "fsl,imx25-iomuxc"; 200 reg = <0x43fac000 0x4000>; 201 }; 202 203 audmux: audmux@43fb0000 { 204 compatible = "fsl,imx25-audmux", "fsl,imx31-audmux"; 205 reg = <0x43fb0000 0x4000>; 206 status = "disabled"; 207 }; 208 }; 209 210 spba-bus@50000000 { 211 compatible = "fsl,spba-bus", "simple-bus"; 212 #address-cells = <1>; 213 #size-cells = <1>; 214 reg = <0x50000000 0x40000>; 215 ranges; 216 217 spi3: spi@50004000 { 218 #address-cells = <1>; 219 #size-cells = <0>; 220 compatible = "fsl,imx25-cspi", "fsl,imx35-cspi"; 221 reg = <0x50004000 0x4000>; 222 interrupts = <0>; 223 clocks = <&clks 80>, <&clks 80>; 224 clock-names = "ipg", "per"; 225 status = "disabled"; 226 }; 227 228 uart4: serial@50008000 { 229 compatible = "fsl,imx25-uart", "fsl,imx21-uart"; 230 reg = <0x50008000 0x4000>; 231 interrupts = <5>; 232 clocks = <&clks 123>, <&clks 57>; 233 clock-names = "ipg", "per"; 234 status = "disabled"; 235 }; 236 237 uart3: serial@5000c000 { 238 compatible = "fsl,imx25-uart", "fsl,imx21-uart"; 239 reg = <0x5000c000 0x4000>; 240 interrupts = <18>; 241 clocks = <&clks 122>, <&clks 57>; 242 clock-names = "ipg", "per"; 243 status = "disabled"; 244 }; 245 246 spi2: spi@50010000 { 247 #address-cells = <1>; 248 #size-cells = <0>; 249 compatible = "fsl,imx25-cspi", "fsl,imx35-cspi"; 250 reg = <0x50010000 0x4000>; 251 clocks = <&clks 79>, <&clks 79>; 252 clock-names = "ipg", "per"; 253 interrupts = <13>; 254 status = "disabled"; 255 }; 256 257 ssi2: ssi@50014000 { 258 #sound-dai-cells = <0>; 259 compatible = "fsl,imx25-ssi", "fsl,imx21-ssi"; 260 reg = <0x50014000 0x4000>; 261 interrupts = <11>; 262 clocks = <&clks 118>; 263 clock-names = "ipg"; 264 dmas = <&sdma 24 1 0>, 265 <&sdma 25 1 0>; 266 dma-names = "rx", "tx"; 267 fsl,fifo-depth = <15>; 268 status = "disabled"; 269 }; 270 271 esai@50018000 { 272 reg = <0x50018000 0x4000>; 273 interrupts = <7>; 274 }; 275 276 uart5: serial@5002c000 { 277 compatible = "fsl,imx25-uart", "fsl,imx21-uart"; 278 reg = <0x5002c000 0x4000>; 279 interrupts = <40>; 280 clocks = <&clks 124>, <&clks 57>; 281 clock-names = "ipg", "per"; 282 status = "disabled"; 283 }; 284 285 tscadc: tscadc@50030000 { 286 compatible = "fsl,imx25-tsadc"; 287 reg = <0x50030000 0xc>; 288 interrupts = <46>; 289 clocks = <&clks 119>; 290 clock-names = "ipg"; 291 interrupt-controller; 292 #interrupt-cells = <1>; 293 #address-cells = <1>; 294 #size-cells = <1>; 295 status = "disabled"; 296 ranges; 297 298 adc: adc@50030800 { 299 compatible = "fsl,imx25-gcq"; 300 reg = <0x50030800 0x60>; 301 interrupt-parent = <&tscadc>; 302 interrupts = <1>; 303 #address-cells = <1>; 304 #size-cells = <0>; 305 status = "disabled"; 306 }; 307 308 tsc: tcq@50030400 { 309 compatible = "fsl,imx25-tcq"; 310 reg = <0x50030400 0x60>; 311 interrupt-parent = <&tscadc>; 312 interrupts = <0>; 313 fsl,wires = <4>; 314 status = "disabled"; 315 }; 316 }; 317 318 ssi1: ssi@50034000 { 319 #sound-dai-cells = <0>; 320 compatible = "fsl,imx25-ssi", "fsl,imx21-ssi"; 321 reg = <0x50034000 0x4000>; 322 interrupts = <12>; 323 clocks = <&clks 117>; 324 clock-names = "ipg"; 325 dmas = <&sdma 28 1 0>, 326 <&sdma 29 1 0>; 327 dma-names = "rx", "tx"; 328 fsl,fifo-depth = <15>; 329 status = "disabled"; 330 }; 331 332 fec: ethernet@50038000 { 333 compatible = "fsl,imx25-fec"; 334 reg = <0x50038000 0x4000>; 335 interrupts = <57>; 336 clocks = <&clks 88>, <&clks 65>; 337 clock-names = "ipg", "ahb"; 338 status = "disabled"; 339 }; 340 }; 341 342 bus@53f00000 { /* AIPS2 */ 343 compatible = "fsl,aips-bus", "simple-bus"; 344 #address-cells = <1>; 345 #size-cells = <1>; 346 reg = <0x53f00000 0x100000>; 347 ranges; 348 349 aips2: bridge@53f00000 { 350 compatible = "fsl,imx25-aips"; 351 reg = <0x53f00000 0x4000>; 352 }; 353 354 clks: ccm@53f80000 { 355 compatible = "fsl,imx25-ccm"; 356 reg = <0x53f80000 0x4000>; 357 interrupts = <31>; 358 #clock-cells = <1>; 359 }; 360 361 gpt4: timer@53f84000 { 362 compatible = "fsl,imx25-gpt", "fsl,imx31-gpt"; 363 reg = <0x53f84000 0x4000>; 364 clocks = <&clks 95>, <&clks 47>; 365 clock-names = "ipg", "per"; 366 interrupts = <1>; 367 }; 368 369 gpt3: timer@53f88000 { 370 compatible = "fsl,imx25-gpt", "fsl,imx31-gpt"; 371 reg = <0x53f88000 0x4000>; 372 clocks = <&clks 94>, <&clks 47>; 373 clock-names = "ipg", "per"; 374 interrupts = <29>; 375 }; 376 377 gpt2: timer@53f8c000 { 378 compatible = "fsl,imx25-gpt", "fsl,imx31-gpt"; 379 reg = <0x53f8c000 0x4000>; 380 clocks = <&clks 93>, <&clks 47>; 381 clock-names = "ipg", "per"; 382 interrupts = <53>; 383 }; 384 385 gpt1: timer@53f90000 { 386 compatible = "fsl,imx25-gpt", "fsl,imx31-gpt"; 387 reg = <0x53f90000 0x4000>; 388 clocks = <&clks 92>, <&clks 47>; 389 clock-names = "ipg", "per"; 390 interrupts = <54>; 391 }; 392 393 epit1: timer@53f94000 { 394 compatible = "fsl,imx25-epit"; 395 reg = <0x53f94000 0x4000>; 396 clocks = <&clks 83>, <&clks 43>; 397 clock-names = "ipg", "per"; 398 interrupts = <28>; 399 }; 400 401 epit2: timer@53f98000 { 402 compatible = "fsl,imx25-epit"; 403 reg = <0x53f98000 0x4000>; 404 clocks = <&clks 84>, <&clks 43>; 405 clock-names = "ipg", "per"; 406 interrupts = <27>; 407 }; 408 409 gpio4: gpio@53f9c000 { 410 compatible = "fsl,imx25-gpio", "fsl,imx35-gpio"; 411 reg = <0x53f9c000 0x4000>; 412 interrupts = <23>; 413 gpio-controller; 414 #gpio-cells = <2>; 415 interrupt-controller; 416 #interrupt-cells = <2>; 417 }; 418 419 pwm2: pwm@53fa0000 { 420 compatible = "fsl,imx25-pwm", "fsl,imx27-pwm"; 421 #pwm-cells = <3>; 422 reg = <0x53fa0000 0x4000>; 423 clocks = <&clks 106>, <&clks 52>; 424 clock-names = "ipg", "per"; 425 interrupts = <36>; 426 }; 427 428 gpio3: gpio@53fa4000 { 429 compatible = "fsl,imx25-gpio", "fsl,imx35-gpio"; 430 reg = <0x53fa4000 0x4000>; 431 interrupts = <16>; 432 gpio-controller; 433 #gpio-cells = <2>; 434 interrupt-controller; 435 #interrupt-cells = <2>; 436 }; 437 438 pwm3: pwm@53fa8000 { 439 compatible = "fsl,imx25-pwm", "fsl,imx27-pwm"; 440 #pwm-cells = <3>; 441 reg = <0x53fa8000 0x4000>; 442 clocks = <&clks 107>, <&clks 52>; 443 clock-names = "ipg", "per"; 444 interrupts = <41>; 445 }; 446 447 scc: crypto@53fac000 { 448 compatible = "fsl,imx25-scc"; 449 reg = <0x53fac000 0x4000>; 450 clocks = <&clks 111>; 451 clock-names = "ipg"; 452 interrupts = <49>, <50>; 453 interrupt-names = "scm", "smn"; 454 }; 455 456 rngb: rngb@53fb0000 { 457 compatible = "fsl,imx25-rngb"; 458 reg = <0x53fb0000 0x4000>; 459 clocks = <&clks 109>; 460 interrupts = <22>; 461 }; 462 463 esdhc1: mmc@53fb4000 { 464 compatible = "fsl,imx25-esdhc"; 465 reg = <0x53fb4000 0x4000>; 466 interrupts = <9>; 467 clocks = <&clks 86>, <&clks 63>, <&clks 45>; 468 clock-names = "ipg", "ahb", "per"; 469 status = "disabled"; 470 }; 471 472 esdhc2: mmc@53fb8000 { 473 compatible = "fsl,imx25-esdhc"; 474 reg = <0x53fb8000 0x4000>; 475 interrupts = <8>; 476 clocks = <&clks 87>, <&clks 64>, <&clks 46>; 477 clock-names = "ipg", "ahb", "per"; 478 status = "disabled"; 479 }; 480 481 lcdc: lcdc@53fbc000 { 482 compatible = "fsl,imx25-fb", "fsl,imx21-fb"; 483 reg = <0x53fbc000 0x4000>; 484 interrupts = <39>; 485 clocks = <&clks 103>, <&clks 66>, <&clks 49>; 486 clock-names = "ipg", "ahb", "per"; 487 status = "disabled"; 488 }; 489 490 slcdc@53fc0000 { 491 reg = <0x53fc0000 0x4000>; 492 interrupts = <38>; 493 status = "disabled"; 494 }; 495 496 pwm4: pwm@53fc8000 { 497 compatible = "fsl,imx25-pwm", "fsl,imx27-pwm"; 498 #pwm-cells = <3>; 499 reg = <0x53fc8000 0x4000>; 500 clocks = <&clks 108>, <&clks 52>; 501 clock-names = "ipg", "per"; 502 interrupts = <42>; 503 }; 504 505 gpio1: gpio@53fcc000 { 506 compatible = "fsl,imx25-gpio", "fsl,imx35-gpio"; 507 reg = <0x53fcc000 0x4000>; 508 interrupts = <52>; 509 gpio-controller; 510 #gpio-cells = <2>; 511 interrupt-controller; 512 #interrupt-cells = <2>; 513 }; 514 515 gpio2: gpio@53fd0000 { 516 compatible = "fsl,imx25-gpio", "fsl,imx35-gpio"; 517 reg = <0x53fd0000 0x4000>; 518 interrupts = <51>; 519 gpio-controller; 520 #gpio-cells = <2>; 521 interrupt-controller; 522 #interrupt-cells = <2>; 523 }; 524 525 sdma: dma-controller@53fd4000 { 526 compatible = "fsl,imx25-sdma"; 527 reg = <0x53fd4000 0x4000>; 528 clocks = <&clks 112>, <&clks 68>; 529 clock-names = "ipg", "ahb"; 530 #dma-cells = <3>; 531 interrupts = <34>; 532 fsl,sdma-ram-script-name = "imx/sdma/sdma-imx25.bin"; 533 }; 534 535 watchdog@53fdc000 { 536 compatible = "fsl,imx25-wdt", "fsl,imx21-wdt"; 537 reg = <0x53fdc000 0x4000>; 538 clocks = <&clks 126>; 539 interrupts = <55>; 540 }; 541 542 pwm1: pwm@53fe0000 { 543 compatible = "fsl,imx25-pwm", "fsl,imx27-pwm"; 544 #pwm-cells = <3>; 545 reg = <0x53fe0000 0x4000>; 546 clocks = <&clks 105>, <&clks 52>; 547 clock-names = "ipg", "per"; 548 interrupts = <26>; 549 }; 550 551 iim: efuse@53ff0000 { 552 compatible = "fsl,imx25-iim"; 553 reg = <0x53ff0000 0x4000>; 554 interrupts = <19>; 555 clocks = <&clks 99>; 556 }; 557 558 usbotg: usb@53ff4000 { 559 compatible = "fsl,imx25-usb", "fsl,imx27-usb"; 560 reg = <0x53ff4000 0x0200>; 561 interrupts = <37>; 562 clocks = <&clks 9>, <&clks 70>, <&clks 8>; 563 clock-names = "ipg", "ahb", "per"; 564 fsl,usbmisc = <&usbmisc 0>; 565 fsl,usbphy = <&usbphy0>; 566 phy_type = "utmi"; 567 dr_mode = "otg"; 568 status = "disabled"; 569 }; 570 571 usbhost1: usb@53ff4400 { 572 compatible = "fsl,imx25-usb", "fsl,imx27-usb"; 573 reg = <0x53ff4400 0x0200>; 574 interrupts = <35>; 575 clocks = <&clks 9>, <&clks 70>, <&clks 8>; 576 clock-names = "ipg", "ahb", "per"; 577 fsl,usbmisc = <&usbmisc 1>; 578 fsl,usbphy = <&usbphy1>; 579 maximum-speed = "full-speed"; 580 phy_type = "serial"; 581 dr_mode = "host"; 582 status = "disabled"; 583 }; 584 585 usbmisc: usbmisc@53ff4600 { 586 #index-cells = <1>; 587 compatible = "fsl,imx25-usbmisc"; 588 reg = <0x53ff4600 0x00f>; 589 }; 590 591 dryice@53ffc000 { 592 compatible = "fsl,imx25-rtc"; 593 reg = <0x53ffc000 0x4000>; 594 clocks = <&clks 81>; 595 interrupts = <25 56>; 596 }; 597 }; 598 599 iram: sram@78000000 { 600 compatible = "mmio-sram"; 601 reg = <0x78000000 0x20000>; 602 ranges = <0 0x78000000 0x20000>; 603 #address-cells = <1>; 604 #size-cells = <1>; 605 }; 606 607 bus@80000000 { 608 compatible = "fsl,emi-bus", "simple-bus"; 609 #address-cells = <1>; 610 #size-cells = <1>; 611 reg = <0x80000000 0x3b002000>; 612 ranges; 613 614 nfc: nand@bb000000 { 615 #address-cells = <1>; 616 #size-cells = <1>; 617 618 compatible = "fsl,imx25-nand"; 619 reg = <0xbb000000 0x2000>; 620 clocks = <&clks 50>; 621 clock-names = ""; 622 interrupts = <33>; 623 status = "disabled"; 624 }; 625 }; 626 }; 627}; 628