1724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0-or-later 2724ba675SRob Herring/* 3724ba675SRob Herring * Copyright 2013 Eukréa Electromatique <denis@eukrea.com> 4724ba675SRob Herring */ 5724ba675SRob Herring 6724ba675SRob Herring#include "imx25.dtsi" 7724ba675SRob Herring 8724ba675SRob Herring/ { 9724ba675SRob Herring model = "Eukrea CPUIMX25"; 10724ba675SRob Herring compatible = "eukrea,cpuimx25", "fsl,imx25"; 11724ba675SRob Herring 12724ba675SRob Herring memory@80000000 { 13724ba675SRob Herring device_type = "memory"; 14724ba675SRob Herring reg = <0x80000000 0x4000000>; /* 64M */ 15724ba675SRob Herring }; 16724ba675SRob Herring}; 17724ba675SRob Herring 18724ba675SRob Herring&fec { 19724ba675SRob Herring phy-mode = "rmii"; 20724ba675SRob Herring pinctrl-names = "default"; 21724ba675SRob Herring pinctrl-0 = <&pinctrl_fec>; 22724ba675SRob Herring status = "okay"; 23724ba675SRob Herring}; 24724ba675SRob Herring 25724ba675SRob Herring&i2c1 { 26724ba675SRob Herring pinctrl-names = "default"; 27724ba675SRob Herring pinctrl-0 = <&pinctrl_i2c1>; 28724ba675SRob Herring status = "okay"; 29724ba675SRob Herring 30*68c711b8SFabio Estevam rtc@51 { 31724ba675SRob Herring compatible = "nxp,pcf8563"; 32724ba675SRob Herring reg = <0x51>; 33724ba675SRob Herring }; 34724ba675SRob Herring}; 35724ba675SRob Herring 36724ba675SRob Herring&iomuxc { 37724ba675SRob Herring imx25-eukrea-cpuimx25 { 38724ba675SRob Herring pinctrl_fec: fecgrp { 39724ba675SRob Herring fsl,pins = < 40724ba675SRob Herring MX25_PAD_FEC_MDC__FEC_MDC 0x80000000 41724ba675SRob Herring MX25_PAD_FEC_MDIO__FEC_MDIO 0x400001e0 42724ba675SRob Herring MX25_PAD_FEC_TDATA0__FEC_TDATA0 0x80000000 43724ba675SRob Herring MX25_PAD_FEC_TDATA1__FEC_TDATA1 0x80000000 44724ba675SRob Herring MX25_PAD_FEC_TX_EN__FEC_TX_EN 0x80000000 45724ba675SRob Herring MX25_PAD_FEC_RDATA0__FEC_RDATA0 0x80000000 46724ba675SRob Herring MX25_PAD_FEC_RDATA1__FEC_RDATA1 0x80000000 47724ba675SRob Herring MX25_PAD_FEC_RX_DV__FEC_RX_DV 0x80000000 48724ba675SRob Herring MX25_PAD_FEC_TX_CLK__FEC_TX_CLK 0x1c0 49724ba675SRob Herring >; 50724ba675SRob Herring }; 51724ba675SRob Herring 52724ba675SRob Herring pinctrl_i2c1: i2c1grp { 53724ba675SRob Herring fsl,pins = < 54724ba675SRob Herring MX25_PAD_I2C1_CLK__I2C1_CLK 0x80000000 55724ba675SRob Herring MX25_PAD_I2C1_DAT__I2C1_DAT 0x80000000 56724ba675SRob Herring >; 57724ba675SRob Herring }; 58724ba675SRob Herring }; 59724ba675SRob Herring}; 60724ba675SRob Herring 61724ba675SRob Herring&nfc { 62724ba675SRob Herring nand-bus-width = <8>; 63724ba675SRob Herring nand-ecc-mode = "hw"; 64724ba675SRob Herring nand-on-flash-bbt; 65724ba675SRob Herring status = "okay"; 66724ba675SRob Herring}; 67