1// SPDX-License-Identifier: GPL-2.0 2/dts-v1/; 3 4#include <dt-bindings/input/input.h> 5#include "tegra124.dtsi" 6 7/ { 8 model = "NVIDIA Tegra124 Venice2"; 9 compatible = "nvidia,venice2", "nvidia,tegra124"; 10 11 aliases { 12 rtc0 = "/i2c@7000d000/pmic@40"; 13 rtc1 = "/rtc@7000e000"; 14 serial0 = &uarta; 15 }; 16 17 chosen { 18 stdout-path = "serial0:115200n8"; 19 }; 20 21 memory@80000000 { 22 reg = <0x0 0x80000000 0x0 0x80000000>; 23 }; 24 25 host1x@50000000 { 26 hdmi@54280000 { 27 status = "okay"; 28 29 vdd-supply = <&vdd_3v3_hdmi>; 30 pll-supply = <&vdd_hdmi_pll>; 31 hdmi-supply = <&vdd_5v0_hdmi>; 32 33 nvidia,ddc-i2c-bus = <&hdmi_ddc>; 34 nvidia,hpd-gpio = 35 <&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>; 36 }; 37 38 sor@54540000 { 39 status = "okay"; 40 41 avdd-io-hdmi-dp-supply = <&vdd_1v05_run>; 42 vdd-hdmi-dp-pll-supply = <&vdd_3v3_run>; 43 44 nvidia,dpaux = <&dpaux>; 45 nvidia,panel = <&panel>; 46 }; 47 48 dpaux@545c0000 { 49 vdd-supply = <&vdd_3v3_panel>; 50 status = "okay"; 51 52 aux-bus { 53 panel: panel { 54 compatible = "lg,lp129qe"; 55 power-supply = <&vdd_3v3_panel>; 56 backlight = <&backlight>; 57 }; 58 }; 59 }; 60 }; 61 62 gpu@57000000 { 63 /* 64 * Node left disabled on purpose - the bootloader will enable 65 * it after having set the VPR up 66 */ 67 vdd-supply = <&vdd_gpu>; 68 }; 69 70 pinmux: pinmux@70000868 { 71 pinctrl-names = "boot"; 72 pinctrl-0 = <&pinmux_boot>; 73 74 pinmux_boot: pinmux { 75 dap_mclk1_pw4 { 76 nvidia,pins = "dap_mclk1_pw4"; 77 nvidia,function = "extperiph1"; 78 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 79 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 80 nvidia,tristate = <TEGRA_PIN_DISABLE>; 81 }; 82 dap1_din_pn1 { 83 nvidia,pins = "dap1_din_pn1"; 84 nvidia,function = "i2s0"; 85 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 86 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 87 nvidia,tristate = <TEGRA_PIN_ENABLE>; 88 }; 89 dap1_dout_pn2 { 90 nvidia,pins = "dap1_dout_pn2", 91 "dap1_fs_pn0", 92 "dap1_sclk_pn3"; 93 nvidia,function = "i2s0"; 94 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 95 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 96 nvidia,tristate = <TEGRA_PIN_ENABLE>; 97 }; 98 dap2_din_pa4 { 99 nvidia,pins = "dap2_din_pa4"; 100 nvidia,function = "i2s1"; 101 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 102 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 103 nvidia,tristate = <TEGRA_PIN_DISABLE>; 104 }; 105 dap2_dout_pa5 { 106 nvidia,pins = "dap2_dout_pa5", 107 "dap2_fs_pa2", 108 "dap2_sclk_pa3"; 109 nvidia,function = "i2s1"; 110 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 111 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 112 nvidia,tristate = <TEGRA_PIN_DISABLE>; 113 }; 114 dvfs_pwm_px0 { 115 nvidia,pins = "dvfs_pwm_px0", 116 "dvfs_clk_px2"; 117 nvidia,function = "cldvfs"; 118 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 119 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 120 nvidia,tristate = <TEGRA_PIN_DISABLE>; 121 }; 122 ulpi_clk_py0 { 123 nvidia,pins = "ulpi_clk_py0", 124 "ulpi_nxt_py2", 125 "ulpi_stp_py3"; 126 nvidia,function = "spi1"; 127 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 128 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 129 nvidia,tristate = <TEGRA_PIN_DISABLE>; 130 }; 131 ulpi_dir_py1 { 132 nvidia,pins = "ulpi_dir_py1"; 133 nvidia,function = "spi1"; 134 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 135 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 136 nvidia,tristate = <TEGRA_PIN_DISABLE>; 137 }; 138 cam_i2c_scl_pbb1 { 139 nvidia,pins = "cam_i2c_scl_pbb1", 140 "cam_i2c_sda_pbb2"; 141 nvidia,function = "i2c3"; 142 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 143 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 144 nvidia,tristate = <TEGRA_PIN_DISABLE>; 145 nvidia,lock = <TEGRA_PIN_DISABLE>; 146 nvidia,open-drain = <TEGRA_PIN_ENABLE>; 147 }; 148 gen2_i2c_scl_pt5 { 149 nvidia,pins = "gen2_i2c_scl_pt5", 150 "gen2_i2c_sda_pt6"; 151 nvidia,function = "i2c2"; 152 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 153 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 154 nvidia,tristate = <TEGRA_PIN_DISABLE>; 155 nvidia,lock = <TEGRA_PIN_DISABLE>; 156 nvidia,open-drain = <TEGRA_PIN_ENABLE>; 157 }; 158 pg4 { 159 nvidia,pins = "pg4", 160 "pg5", 161 "pg6", 162 "pi3"; 163 nvidia,function = "spi4"; 164 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 165 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 166 nvidia,tristate = <TEGRA_PIN_DISABLE>; 167 }; 168 pg7 { 169 nvidia,pins = "pg7"; 170 nvidia,function = "spi4"; 171 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 172 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 173 nvidia,tristate = <TEGRA_PIN_DISABLE>; 174 }; 175 ph1 { 176 nvidia,pins = "ph1"; 177 nvidia,function = "pwm1"; 178 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 179 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 180 nvidia,tristate = <TEGRA_PIN_DISABLE>; 181 }; 182 pk0 { 183 nvidia,pins = "pk0", 184 "kb_row15_ps7", 185 "clk_32k_out_pa0"; 186 nvidia,function = "soc"; 187 nvidia,pull = <TEGRA_PIN_PULL_UP>; 188 nvidia,tristate = <TEGRA_PIN_DISABLE>; 189 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 190 }; 191 sdmmc1_clk_pz0 { 192 nvidia,pins = "sdmmc1_clk_pz0"; 193 nvidia,function = "sdmmc1"; 194 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 195 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 196 nvidia,tristate = <TEGRA_PIN_DISABLE>; 197 }; 198 sdmmc1_cmd_pz1 { 199 nvidia,pins = "sdmmc1_cmd_pz1", 200 "sdmmc1_dat0_py7", 201 "sdmmc1_dat1_py6", 202 "sdmmc1_dat2_py5", 203 "sdmmc1_dat3_py4"; 204 nvidia,function = "sdmmc1"; 205 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 206 nvidia,pull = <TEGRA_PIN_PULL_UP>; 207 nvidia,tristate = <TEGRA_PIN_DISABLE>; 208 }; 209 sdmmc3_clk_pa6 { 210 nvidia,pins = "sdmmc3_clk_pa6"; 211 nvidia,function = "sdmmc3"; 212 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 213 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 214 nvidia,tristate = <TEGRA_PIN_DISABLE>; 215 }; 216 sdmmc3_cmd_pa7 { 217 nvidia,pins = "sdmmc3_cmd_pa7", 218 "sdmmc3_dat0_pb7", 219 "sdmmc3_dat1_pb6", 220 "sdmmc3_dat2_pb5", 221 "sdmmc3_dat3_pb4", 222 "sdmmc3_clk_lb_out_pee4", 223 "sdmmc3_clk_lb_in_pee5"; 224 nvidia,function = "sdmmc3"; 225 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 226 nvidia,pull = <TEGRA_PIN_PULL_UP>; 227 nvidia,tristate = <TEGRA_PIN_DISABLE>; 228 }; 229 sdmmc4_clk_pcc4 { 230 nvidia,pins = "sdmmc4_clk_pcc4"; 231 nvidia,function = "sdmmc4"; 232 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 233 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 234 nvidia,tristate = <TEGRA_PIN_DISABLE>; 235 }; 236 sdmmc4_cmd_pt7 { 237 nvidia,pins = "sdmmc4_cmd_pt7", 238 "sdmmc4_dat0_paa0", 239 "sdmmc4_dat1_paa1", 240 "sdmmc4_dat2_paa2", 241 "sdmmc4_dat3_paa3", 242 "sdmmc4_dat4_paa4", 243 "sdmmc4_dat5_paa5", 244 "sdmmc4_dat6_paa6", 245 "sdmmc4_dat7_paa7"; 246 nvidia,function = "sdmmc4"; 247 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 248 nvidia,pull = <TEGRA_PIN_PULL_UP>; 249 nvidia,tristate = <TEGRA_PIN_DISABLE>; 250 }; 251 pwr_i2c_scl_pz6 { 252 nvidia,pins = "pwr_i2c_scl_pz6", 253 "pwr_i2c_sda_pz7"; 254 nvidia,function = "i2cpwr"; 255 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 256 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 257 nvidia,tristate = <TEGRA_PIN_DISABLE>; 258 nvidia,lock = <TEGRA_PIN_DISABLE>; 259 nvidia,open-drain = <TEGRA_PIN_ENABLE>; 260 }; 261 jtag_rtck { 262 nvidia,pins = "jtag_rtck"; 263 nvidia,function = "rtck"; 264 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 265 nvidia,pull = <TEGRA_PIN_PULL_UP>; 266 nvidia,tristate = <TEGRA_PIN_DISABLE>; 267 }; 268 clk_32k_in { 269 nvidia,pins = "clk_32k_in"; 270 nvidia,function = "clk"; 271 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 272 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 273 nvidia,tristate = <TEGRA_PIN_DISABLE>; 274 }; 275 core_pwr_req { 276 nvidia,pins = "core_pwr_req"; 277 nvidia,function = "pwron"; 278 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 279 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 280 nvidia,tristate = <TEGRA_PIN_DISABLE>; 281 }; 282 cpu_pwr_req { 283 nvidia,pins = "cpu_pwr_req"; 284 nvidia,function = "cpu"; 285 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 286 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 287 nvidia,tristate = <TEGRA_PIN_DISABLE>; 288 }; 289 pwr_int_n { 290 nvidia,pins = "pwr_int_n"; 291 nvidia,function = "pmi"; 292 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 293 nvidia,pull = <TEGRA_PIN_PULL_UP>; 294 nvidia,tristate = <TEGRA_PIN_DISABLE>; 295 }; 296 reset_out_n { 297 nvidia,pins = "reset_out_n"; 298 nvidia,function = "reset_out_n"; 299 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 300 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 301 nvidia,tristate = <TEGRA_PIN_DISABLE>; 302 }; 303 clk3_out_pee0 { 304 nvidia,pins = "clk3_out_pee0"; 305 nvidia,function = "extperiph3"; 306 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 307 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 308 nvidia,tristate = <TEGRA_PIN_DISABLE>; 309 }; 310 dap4_din_pp5 { 311 nvidia,pins = "dap4_din_pp5"; 312 nvidia,function = "i2s3"; 313 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 314 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 315 nvidia,tristate = <TEGRA_PIN_ENABLE>; 316 }; 317 dap4_dout_pp6 { 318 nvidia,pins = "dap4_dout_pp6", 319 "dap4_fs_pp4", 320 "dap4_sclk_pp7"; 321 nvidia,function = "i2s3"; 322 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 323 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 324 nvidia,tristate = <TEGRA_PIN_ENABLE>; 325 }; 326 gen1_i2c_sda_pc5 { 327 nvidia,pins = "gen1_i2c_sda_pc5", 328 "gen1_i2c_scl_pc4"; 329 nvidia,function = "i2c1"; 330 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 331 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 332 nvidia,tristate = <TEGRA_PIN_DISABLE>; 333 nvidia,lock = <TEGRA_PIN_DISABLE>; 334 nvidia,open-drain = <TEGRA_PIN_ENABLE>; 335 }; 336 uart2_cts_n_pj5 { 337 nvidia,pins = "uart2_cts_n_pj5"; 338 nvidia,function = "uartb"; 339 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 340 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 341 nvidia,tristate = <TEGRA_PIN_DISABLE>; 342 }; 343 uart2_rts_n_pj6 { 344 nvidia,pins = "uart2_rts_n_pj6"; 345 nvidia,function = "uartb"; 346 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 347 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 348 nvidia,tristate = <TEGRA_PIN_DISABLE>; 349 }; 350 uart2_rxd_pc3 { 351 nvidia,pins = "uart2_rxd_pc3"; 352 nvidia,function = "irda"; 353 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 354 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 355 nvidia,tristate = <TEGRA_PIN_DISABLE>; 356 }; 357 uart2_txd_pc2 { 358 nvidia,pins = "uart2_txd_pc2"; 359 nvidia,function = "irda"; 360 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 361 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 362 nvidia,tristate = <TEGRA_PIN_DISABLE>; 363 }; 364 uart3_cts_n_pa1 { 365 nvidia,pins = "uart3_cts_n_pa1", 366 "uart3_rxd_pw7"; 367 nvidia,function = "uartc"; 368 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 369 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 370 nvidia,tristate = <TEGRA_PIN_DISABLE>; 371 }; 372 uart3_rts_n_pc0 { 373 nvidia,pins = "uart3_rts_n_pc0", 374 "uart3_txd_pw6"; 375 nvidia,function = "uartc"; 376 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 377 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 378 nvidia,tristate = <TEGRA_PIN_DISABLE>; 379 }; 380 hdmi_cec_pee3 { 381 nvidia,pins = "hdmi_cec_pee3"; 382 nvidia,function = "cec"; 383 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 384 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 385 nvidia,tristate = <TEGRA_PIN_DISABLE>; 386 nvidia,lock = <TEGRA_PIN_DISABLE>; 387 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 388 }; 389 hdmi_int_pn7 { 390 nvidia,pins = "hdmi_int_pn7"; 391 nvidia,function = "rsvd1"; 392 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 393 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 394 nvidia,tristate = <TEGRA_PIN_DISABLE>; 395 }; 396 ddc_scl_pv4 { 397 nvidia,pins = "ddc_scl_pv4", 398 "ddc_sda_pv5"; 399 nvidia,function = "i2c4"; 400 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 401 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 402 nvidia,tristate = <TEGRA_PIN_DISABLE>; 403 nvidia,lock = <TEGRA_PIN_DISABLE>; 404 nvidia,rcv-sel = <TEGRA_PIN_ENABLE>; 405 }; 406 pj7 { 407 nvidia,pins = "pj7", 408 "pk7"; 409 nvidia,function = "uartd"; 410 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 411 nvidia,tristate = <TEGRA_PIN_DISABLE>; 412 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 413 }; 414 pb0 { 415 nvidia,pins = "pb0", 416 "pb1"; 417 nvidia,function = "uartd"; 418 nvidia,pull = <TEGRA_PIN_PULL_UP>; 419 nvidia,tristate = <TEGRA_PIN_DISABLE>; 420 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 421 }; 422 ph0 { 423 nvidia,pins = "ph0"; 424 nvidia,function = "pwm0"; 425 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 426 nvidia,tristate = <TEGRA_PIN_DISABLE>; 427 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 428 }; 429 kb_row10_ps2 { 430 nvidia,pins = "kb_row10_ps2"; 431 nvidia,function = "uarta"; 432 nvidia,pull = <TEGRA_PIN_PULL_UP>; 433 nvidia,tristate = <TEGRA_PIN_DISABLE>; 434 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 435 }; 436 kb_row9_ps1 { 437 nvidia,pins = "kb_row9_ps1"; 438 nvidia,function = "uarta"; 439 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 440 nvidia,tristate = <TEGRA_PIN_DISABLE>; 441 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 442 }; 443 kb_row6_pr6 { 444 nvidia,pins = "kb_row6_pr6"; 445 nvidia,function = "displaya_alt"; 446 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 447 nvidia,tristate = <TEGRA_PIN_DISABLE>; 448 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 449 }; 450 usb_vbus_en0_pn4 { 451 nvidia,pins = "usb_vbus_en0_pn4", 452 "usb_vbus_en1_pn5"; 453 nvidia,function = "usb"; 454 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 455 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 456 nvidia,tristate = <TEGRA_PIN_DISABLE>; 457 nvidia,lock = <TEGRA_PIN_DISABLE>; 458 nvidia,open-drain = <TEGRA_PIN_ENABLE>; 459 }; 460 drive_sdio1 { 461 nvidia,pins = "drive_sdio1"; 462 nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>; 463 nvidia,schmitt = <TEGRA_PIN_DISABLE>; 464 nvidia,pull-down-strength = <32>; 465 nvidia,pull-up-strength = <42>; 466 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>; 467 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>; 468 }; 469 drive_sdio3 { 470 nvidia,pins = "drive_sdio3"; 471 nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>; 472 nvidia,schmitt = <TEGRA_PIN_DISABLE>; 473 nvidia,pull-down-strength = <20>; 474 nvidia,pull-up-strength = <36>; 475 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>; 476 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>; 477 }; 478 drive_gma { 479 nvidia,pins = "drive_gma"; 480 nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>; 481 nvidia,schmitt = <TEGRA_PIN_DISABLE>; 482 nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>; 483 nvidia,pull-down-strength = <1>; 484 nvidia,pull-up-strength = <2>; 485 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>; 486 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>; 487 nvidia,drive-type = <1>; 488 }; 489 als_irq_l { 490 nvidia,pins = "gpio_x3_aud_px3"; 491 nvidia,function = "gmi"; 492 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 493 nvidia,tristate = <TEGRA_PIN_ENABLE>; 494 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 495 }; 496 codec_irq_l { 497 nvidia,pins = "ph4"; 498 nvidia,function = "gmi"; 499 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 500 nvidia,tristate = <TEGRA_PIN_DISABLE>; 501 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 502 }; 503 lcd_bl_en { 504 nvidia,pins = "ph2"; 505 nvidia,function = "gmi"; 506 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 507 nvidia,tristate = <TEGRA_PIN_DISABLE>; 508 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 509 }; 510 touch_irq_l { 511 nvidia,pins = "gpio_w3_aud_pw3"; 512 nvidia,function = "spi6"; 513 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 514 nvidia,tristate = <TEGRA_PIN_ENABLE>; 515 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 516 }; 517 tpm_davint_l { 518 nvidia,pins = "ph6"; 519 nvidia,function = "gmi"; 520 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 521 nvidia,tristate = <TEGRA_PIN_ENABLE>; 522 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 523 }; 524 ts_irq_l { 525 nvidia,pins = "pk2"; 526 nvidia,function = "gmi"; 527 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 528 nvidia,tristate = <TEGRA_PIN_ENABLE>; 529 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 530 }; 531 ts_reset_l { 532 nvidia,pins = "pk4"; 533 nvidia,function = "gmi"; 534 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 535 nvidia,tristate = <TEGRA_PIN_DISABLE>; 536 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 537 }; 538 ts_shdn_l { 539 nvidia,pins = "pk1"; 540 nvidia,function = "gmi"; 541 nvidia,pull = <TEGRA_PIN_PULL_UP>; 542 nvidia,tristate = <TEGRA_PIN_DISABLE>; 543 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 544 }; 545 ph7 { 546 nvidia,pins = "ph7"; 547 nvidia,function = "gmi"; 548 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 549 nvidia,tristate = <TEGRA_PIN_DISABLE>; 550 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 551 }; 552 kb_col0_ap { 553 nvidia,pins = "kb_col0_pq0"; 554 nvidia,function = "rsvd4"; 555 nvidia,pull = <TEGRA_PIN_PULL_UP>; 556 nvidia,tristate = <TEGRA_PIN_DISABLE>; 557 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 558 }; 559 lid_open { 560 nvidia,pins = "kb_row4_pr4"; 561 nvidia,function = "rsvd3"; 562 nvidia,pull = <TEGRA_PIN_PULL_UP>; 563 nvidia,tristate = <TEGRA_PIN_DISABLE>; 564 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 565 }; 566 en_vdd_sd { 567 nvidia,pins = "kb_row0_pr0"; 568 nvidia,function = "rsvd4"; 569 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 570 nvidia,tristate = <TEGRA_PIN_DISABLE>; 571 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 572 }; 573 ac_ok { 574 nvidia,pins = "pj0"; 575 nvidia,function = "gmi"; 576 nvidia,pull = <TEGRA_PIN_PULL_UP>; 577 nvidia,tristate = <TEGRA_PIN_ENABLE>; 578 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 579 }; 580 sensor_irq_l { 581 nvidia,pins = "pi6"; 582 nvidia,function = "gmi"; 583 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 584 nvidia,tristate = <TEGRA_PIN_DISABLE>; 585 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 586 }; 587 wifi_en { 588 nvidia,pins = "gpio_x7_aud_px7"; 589 nvidia,function = "rsvd4"; 590 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 591 nvidia,tristate = <TEGRA_PIN_DISABLE>; 592 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 593 }; 594 wifi_rst_l { 595 nvidia,pins = "clk2_req_pcc5"; 596 nvidia,function = "dap"; 597 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 598 nvidia,tristate = <TEGRA_PIN_DISABLE>; 599 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 600 }; 601 hp_det_l { 602 nvidia,pins = "ulpi_data1_po2"; 603 nvidia,function = "spi3"; 604 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 605 nvidia,tristate = <TEGRA_PIN_DISABLE>; 606 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 607 }; 608 }; 609 }; 610 611 serial@70006000 { 612 /delete-property/ dmas; 613 /delete-property/ dma-names; 614 status = "okay"; 615 }; 616 617 pwm@7000a000 { 618 status = "okay"; 619 }; 620 621 i2c@7000c000 { 622 status = "okay"; 623 clock-frequency = <100000>; 624 625 acodec: audio-codec@10 { 626 compatible = "maxim,max98090"; 627 reg = <0x10>; 628 interrupt-parent = <&gpio>; 629 interrupts = <TEGRA_GPIO(H, 4) IRQ_TYPE_EDGE_FALLING>; 630 }; 631 }; 632 633 i2c@7000c400 { 634 status = "okay"; 635 clock-frequency = <100000>; 636 637 trackpad@4b { 638 compatible = "atmel,maxtouch"; 639 reg = <0x4b>; 640 interrupt-parent = <&gpio>; 641 interrupts = <TEGRA_GPIO(W, 3) IRQ_TYPE_LEVEL_LOW>; 642 linux,gpio-keymap = <0 0 0 BTN_LEFT>; 643 }; 644 }; 645 646 i2c@7000c500 { 647 status = "okay"; 648 clock-frequency = <100000>; 649 }; 650 651 hdmi_ddc: i2c@7000c700 { 652 status = "okay"; 653 clock-frequency = <100000>; 654 }; 655 656 i2c@7000d000 { 657 status = "okay"; 658 clock-frequency = <400000>; 659 660 pmic: pmic@40 { 661 compatible = "ams,as3722"; 662 reg = <0x40>; 663 interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>; 664 665 ams,system-power-controller; 666 667 #interrupt-cells = <2>; 668 interrupt-controller; 669 670 gpio-controller; 671 #gpio-cells = <2>; 672 673 pinctrl-names = "default"; 674 pinctrl-0 = <&as3722_default>; 675 676 as3722_default: pinmux { 677 gpio0 { 678 pins = "gpio0"; 679 function = "gpio"; 680 bias-pull-down; 681 }; 682 683 gpio1_2_4_7 { 684 pins = "gpio1", "gpio2", "gpio4", "gpio7"; 685 function = "gpio"; 686 bias-pull-up; 687 }; 688 689 gpio3_6 { 690 pins = "gpio3", "gpio6"; 691 bias-high-impedance; 692 }; 693 694 gpio5 { 695 pins = "gpio5"; 696 function = "clk32k-out"; 697 }; 698 }; 699 700 regulators { 701 vsup-sd2-supply = <&vdd_5v0_sys>; 702 vsup-sd3-supply = <&vdd_5v0_sys>; 703 vsup-sd4-supply = <&vdd_5v0_sys>; 704 vsup-sd5-supply = <&vdd_5v0_sys>; 705 vin-ldo0-supply = <&vdd_1v35_lp0>; 706 vin-ldo1-6-supply = <&vdd_3v3_run>; 707 vin-ldo2-5-7-supply = <&vddio_1v8>; 708 vin-ldo3-4-supply = <&vdd_3v3_sys>; 709 vin-ldo9-10-supply = <&vdd_5v0_sys>; 710 vin-ldo11-supply = <&vdd_3v3_run>; 711 712 sd0 { 713 regulator-name = "+VDD_CPU_AP"; 714 regulator-min-microvolt = <700000>; 715 regulator-max-microvolt = <1400000>; 716 regulator-min-microamp = <3500000>; 717 regulator-max-microamp = <3500000>; 718 regulator-always-on; 719 regulator-boot-on; 720 ams,ext-control = <2>; 721 }; 722 723 sd1 { 724 regulator-name = "+VDD_CORE"; 725 regulator-min-microvolt = <700000>; 726 regulator-max-microvolt = <1350000>; 727 regulator-min-microamp = <2500000>; 728 regulator-max-microamp = <2500000>; 729 regulator-always-on; 730 regulator-boot-on; 731 ams,ext-control = <1>; 732 }; 733 734 vdd_1v35_lp0: sd2 { 735 regulator-name = "+1.35V_LP0(sd2)"; 736 regulator-min-microvolt = <1350000>; 737 regulator-max-microvolt = <1350000>; 738 regulator-always-on; 739 regulator-boot-on; 740 }; 741 742 sd3 { 743 regulator-name = "+1.35V_LP0(sd3)"; 744 regulator-min-microvolt = <1350000>; 745 regulator-max-microvolt = <1350000>; 746 regulator-always-on; 747 regulator-boot-on; 748 }; 749 750 vdd_1v05_run: sd4 { 751 regulator-name = "+1.05V_RUN"; 752 regulator-min-microvolt = <1050000>; 753 regulator-max-microvolt = <1050000>; 754 }; 755 756 vddio_1v8: sd5 { 757 regulator-name = "+1.8V_VDDIO"; 758 regulator-min-microvolt = <1800000>; 759 regulator-max-microvolt = <1800000>; 760 regulator-boot-on; 761 regulator-always-on; 762 }; 763 764 vdd_gpu: sd6 { 765 regulator-name = "+VDD_GPU_AP"; 766 regulator-min-microvolt = <650000>; 767 regulator-max-microvolt = <1200000>; 768 regulator-min-microamp = <3500000>; 769 regulator-max-microamp = <3500000>; 770 regulator-boot-on; 771 regulator-always-on; 772 }; 773 774 avdd_1v05_run: ldo0 { 775 regulator-name = "+1.05V_RUN_AVDD"; 776 regulator-min-microvolt = <1050000>; 777 regulator-max-microvolt = <1050000>; 778 regulator-boot-on; 779 regulator-always-on; 780 ams,ext-control = <1>; 781 }; 782 783 ldo1 { 784 regulator-name = "+1.8V_RUN_CAM"; 785 regulator-min-microvolt = <1800000>; 786 regulator-max-microvolt = <1800000>; 787 }; 788 789 ldo2 { 790 regulator-name = "+1.2V_GEN_AVDD"; 791 regulator-min-microvolt = <1200000>; 792 regulator-max-microvolt = <1200000>; 793 regulator-boot-on; 794 regulator-always-on; 795 }; 796 797 ldo3 { 798 regulator-name = "+1.00V_LP0_VDD_RTC"; 799 regulator-min-microvolt = <1000000>; 800 regulator-max-microvolt = <1000000>; 801 regulator-boot-on; 802 regulator-always-on; 803 ams,enable-tracking; 804 }; 805 806 vdd_run_cam: ldo4 { 807 regulator-name = "+3.3V_RUN_CAM"; 808 regulator-min-microvolt = <2800000>; 809 regulator-max-microvolt = <2800000>; 810 }; 811 812 ldo5 { 813 regulator-name = "+1.2V_RUN_CAM_FRONT"; 814 regulator-min-microvolt = <1200000>; 815 regulator-max-microvolt = <1200000>; 816 }; 817 818 vddio_sdmmc3: ldo6 { 819 regulator-name = "+VDDIO_SDMMC3"; 820 regulator-min-microvolt = <1800000>; 821 regulator-max-microvolt = <3300000>; 822 }; 823 824 ldo7 { 825 regulator-name = "+1.05V_RUN_CAM_REAR"; 826 regulator-min-microvolt = <1050000>; 827 regulator-max-microvolt = <1050000>; 828 }; 829 830 ldo9 { 831 regulator-name = "+2.8V_RUN_TOUCH"; 832 regulator-min-microvolt = <2800000>; 833 regulator-max-microvolt = <2800000>; 834 }; 835 836 ldo10 { 837 regulator-name = "+2.8V_RUN_CAM_AF"; 838 regulator-min-microvolt = <2800000>; 839 regulator-max-microvolt = <2800000>; 840 }; 841 842 ldo11 { 843 regulator-name = "+1.8V_RUN_VPP_FUSE"; 844 regulator-min-microvolt = <1800000>; 845 regulator-max-microvolt = <1800000>; 846 }; 847 }; 848 }; 849 }; 850 851 spi@7000d400 { 852 status = "okay"; 853 854 cros_ec: cros-ec@0 { 855 compatible = "google,cros-ec-spi"; 856 spi-max-frequency = <4000000>; 857 interrupt-parent = <&gpio>; 858 interrupts = <TEGRA_GPIO(C, 7) IRQ_TYPE_LEVEL_LOW>; 859 reg = <0>; 860 wakeup-source; 861 862 google,cros-ec-spi-msg-delay = <2000>; 863 864 i2c-tunnel { 865 compatible = "google,cros-ec-i2c-tunnel"; 866 #address-cells = <1>; 867 #size-cells = <0>; 868 869 google,remote-bus = <0>; 870 871 charger: bq24735@9 { 872 compatible = "ti,bq24735"; 873 reg = <0x9>; 874 interrupt-parent = <&gpio>; 875 interrupts = <TEGRA_GPIO(J, 0) 876 IRQ_TYPE_EDGE_BOTH>; 877 ti,ac-detect-gpios = <&gpio 878 TEGRA_GPIO(J, 0) 879 GPIO_ACTIVE_HIGH>; 880 }; 881 882 battery: sbs-battery@b { 883 compatible = "sbs,sbs-battery"; 884 reg = <0xb>; 885 sbs,i2c-retry-count = <2>; 886 sbs,poll-retry-count = <1>; 887 }; 888 }; 889 }; 890 }; 891 892 spi@7000da00 { 893 status = "okay"; 894 spi-max-frequency = <25000000>; 895 896 flash@0 { 897 compatible = "winbond,w25q32dw", "jedec,spi-nor"; 898 reg = <0>; 899 spi-max-frequency = <20000000>; 900 }; 901 }; 902 903 pmc@7000e400 { 904 nvidia,invert-interrupt; 905 nvidia,suspend-mode = <1>; 906 nvidia,cpu-pwr-good-time = <500>; 907 nvidia,cpu-pwr-off-time = <300>; 908 nvidia,core-pwr-good-time = <641 3845>; 909 nvidia,core-pwr-off-time = <61036>; 910 nvidia,core-power-req-active-high; 911 nvidia,sys-clock-req-active-high; 912 }; 913 914 hda@70030000 { 915 status = "okay"; 916 }; 917 918 usb@70090000 { 919 phys = <&{/padctl@7009f000/pads/usb2/lanes/usb2-0}>, /* 1st USB A */ 920 <&{/padctl@7009f000/pads/usb2/lanes/usb2-1}>, /* Internal USB */ 921 <&{/padctl@7009f000/pads/usb2/lanes/usb2-2}>, /* 2nd USB A */ 922 <&{/padctl@7009f000/pads/pcie/lanes/pcie-0}>, /* 1st USB A */ 923 <&{/padctl@7009f000/pads/pcie/lanes/pcie-1}>; /* 2nd USB A */ 924 phy-names = "usb2-0", "usb2-1", "usb2-2", "usb3-0", "usb3-1"; 925 926 avddio-pex-supply = <&vdd_1v05_run>; 927 dvddio-pex-supply = <&vdd_1v05_run>; 928 avdd-usb-supply = <&vdd_3v3_lp0>; 929 avdd-pll-utmip-supply = <&vddio_1v8>; 930 avdd-pll-erefe-supply = <&avdd_1v05_run>; 931 avdd-usb-ss-pll-supply = <&vdd_1v05_run>; 932 hvdd-usb-ss-supply = <&vdd_3v3_lp0>; 933 hvdd-usb-ss-pll-e-supply = <&vdd_3v3_lp0>; 934 935 status = "okay"; 936 }; 937 938 padctl@7009f000 { 939 avdd-pll-utmip-supply = <&vddio_1v8>; 940 avdd-pll-erefe-supply = <&avdd_1v05_run>; 941 avdd-pex-pll-supply = <&vdd_1v05_run>; 942 hvdd-pex-pll-e-supply = <&vdd_3v3_lp0>; 943 944 pads { 945 usb2 { 946 status = "okay"; 947 948 lanes { 949 usb2-0 { 950 nvidia,function = "xusb"; 951 status = "okay"; 952 }; 953 954 usb2-1 { 955 nvidia,function = "xusb"; 956 status = "okay"; 957 }; 958 959 usb2-2 { 960 nvidia,function = "xusb"; 961 status = "okay"; 962 }; 963 }; 964 }; 965 966 pcie { 967 status = "okay"; 968 969 lanes { 970 pcie-0 { 971 nvidia,function = "usb3-ss"; 972 status = "okay"; 973 }; 974 975 pcie-1 { 976 nvidia,function = "usb3-ss"; 977 status = "okay"; 978 }; 979 }; 980 }; 981 }; 982 983 ports { 984 usb2-0 { 985 status = "okay"; 986 mode = "otg"; 987 usb-role-switch; 988 vbus-supply = <&vdd_usb1_vbus>; 989 }; 990 991 usb2-1 { 992 status = "okay"; 993 mode = "host"; 994 995 vbus-supply = <&vdd_run_cam>; 996 }; 997 998 usb2-2 { 999 status = "okay"; 1000 mode = "host"; 1001 1002 vbus-supply = <&vdd_usb3_vbus>; 1003 }; 1004 1005 usb3-0 { 1006 nvidia,usb2-companion = <0>; 1007 status = "okay"; 1008 }; 1009 1010 usb3-1 { 1011 nvidia,usb2-companion = <2>; 1012 status = "okay"; 1013 }; 1014 }; 1015 }; 1016 1017 mmc@700b0400 { 1018 cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>; 1019 power-gpios = <&gpio TEGRA_GPIO(R, 0) GPIO_ACTIVE_HIGH>; 1020 wp-gpios = <&gpio TEGRA_GPIO(Q, 4) GPIO_ACTIVE_LOW>; 1021 status = "okay"; 1022 bus-width = <4>; 1023 vqmmc-supply = <&vddio_sdmmc3>; 1024 }; 1025 1026 mmc@700b0600 { 1027 status = "okay"; 1028 bus-width = <8>; 1029 non-removable; 1030 }; 1031 1032 ahub@70300000 { 1033 i2s@70301100 { 1034 status = "okay"; 1035 }; 1036 }; 1037 1038 usb@7d000000 { 1039 status = "okay"; 1040 }; 1041 1042 usb-phy@7d000000 { 1043 status = "okay"; 1044 vbus-supply = <&vdd_usb1_vbus>; 1045 }; 1046 1047 usb@7d004000 { 1048 status = "okay"; 1049 }; 1050 1051 usb-phy@7d004000 { 1052 status = "okay"; 1053 vbus-supply = <&vdd_run_cam>; 1054 }; 1055 1056 usb@7d008000 { 1057 status = "okay"; 1058 }; 1059 1060 usb-phy@7d008000 { 1061 status = "okay"; 1062 vbus-supply = <&vdd_usb3_vbus>; 1063 }; 1064 1065 backlight: backlight { 1066 compatible = "pwm-backlight"; 1067 1068 enable-gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_HIGH>; 1069 power-supply = <&vdd_led>; 1070 pwms = <&pwm 1 1000000>; 1071 1072 brightness-levels = <0 4 8 16 32 64 128 255>; 1073 default-brightness-level = <6>; 1074 }; 1075 1076 clk32k_in: clock-32k { 1077 compatible = "fixed-clock"; 1078 clock-frequency = <32768>; 1079 #clock-cells = <0>; 1080 }; 1081 1082 gpio-keys { 1083 compatible = "gpio-keys"; 1084 1085 key-power { 1086 label = "Power"; 1087 gpios = <&gpio TEGRA_GPIO(Q, 0) GPIO_ACTIVE_LOW>; 1088 linux,code = <KEY_POWER>; 1089 debounce-interval = <10>; 1090 wakeup-source; 1091 }; 1092 }; 1093 1094 vdd_mux: regulator-mux { 1095 compatible = "regulator-fixed"; 1096 regulator-name = "+VDD_MUX"; 1097 regulator-min-microvolt = <12000000>; 1098 regulator-max-microvolt = <12000000>; 1099 regulator-always-on; 1100 regulator-boot-on; 1101 }; 1102 1103 vdd_5v0_sys: regulator-5v0sys { 1104 compatible = "regulator-fixed"; 1105 regulator-name = "+5V_SYS"; 1106 regulator-min-microvolt = <5000000>; 1107 regulator-max-microvolt = <5000000>; 1108 regulator-always-on; 1109 regulator-boot-on; 1110 vin-supply = <&vdd_mux>; 1111 }; 1112 1113 vdd_3v3_sys: regulator-3v3sys { 1114 compatible = "regulator-fixed"; 1115 regulator-name = "+3.3V_SYS"; 1116 regulator-min-microvolt = <3300000>; 1117 regulator-max-microvolt = <3300000>; 1118 regulator-always-on; 1119 regulator-boot-on; 1120 vin-supply = <&vdd_mux>; 1121 }; 1122 1123 vdd_3v3_run: regulator-3v3run { 1124 compatible = "regulator-fixed"; 1125 regulator-name = "+3.3V_RUN"; 1126 regulator-min-microvolt = <3300000>; 1127 regulator-max-microvolt = <3300000>; 1128 regulator-always-on; 1129 regulator-boot-on; 1130 gpio = <&pmic 1 GPIO_ACTIVE_HIGH>; 1131 enable-active-high; 1132 vin-supply = <&vdd_3v3_sys>; 1133 }; 1134 1135 vdd_3v3_hdmi: regulator-hdmi { 1136 compatible = "regulator-fixed"; 1137 regulator-name = "+3.3V_AVDD_HDMI_AP_GATED"; 1138 regulator-min-microvolt = <3300000>; 1139 regulator-max-microvolt = <3300000>; 1140 vin-supply = <&vdd_3v3_run>; 1141 }; 1142 1143 vdd_led: regulator-led { 1144 compatible = "regulator-fixed"; 1145 regulator-name = "+VDD_LED"; 1146 regulator-min-microvolt = <3300000>; 1147 regulator-max-microvolt = <3300000>; 1148 gpio = <&gpio TEGRA_GPIO(P, 2) GPIO_ACTIVE_HIGH>; 1149 enable-active-high; 1150 vin-supply = <&vdd_mux>; 1151 }; 1152 1153 vdd_5v0_ts: regulator-ts { 1154 compatible = "regulator-fixed"; 1155 regulator-name = "+5V_VDD_TS_SW"; 1156 regulator-min-microvolt = <5000000>; 1157 regulator-max-microvolt = <5000000>; 1158 regulator-boot-on; 1159 gpio = <&gpio TEGRA_GPIO(K, 1) GPIO_ACTIVE_HIGH>; 1160 enable-active-high; 1161 vin-supply = <&vdd_5v0_sys>; 1162 }; 1163 1164 vdd_usb1_vbus: regulator-usb1 { 1165 compatible = "regulator-fixed"; 1166 regulator-name = "+5V_USB_HS"; 1167 regulator-min-microvolt = <5000000>; 1168 regulator-max-microvolt = <5000000>; 1169 gpio = <&gpio TEGRA_GPIO(N, 4) GPIO_ACTIVE_HIGH>; 1170 enable-active-high; 1171 gpio-open-drain; 1172 vin-supply = <&vdd_5v0_sys>; 1173 }; 1174 1175 vdd_usb3_vbus: regulator-usb3 { 1176 compatible = "regulator-fixed"; 1177 regulator-name = "+5V_USB_SS"; 1178 regulator-min-microvolt = <5000000>; 1179 regulator-max-microvolt = <5000000>; 1180 gpio = <&gpio TEGRA_GPIO(N, 5) GPIO_ACTIVE_HIGH>; 1181 enable-active-high; 1182 gpio-open-drain; 1183 vin-supply = <&vdd_5v0_sys>; 1184 }; 1185 1186 vdd_3v3_panel: regulator-panel { 1187 compatible = "regulator-fixed"; 1188 regulator-name = "+3.3V_PANEL"; 1189 regulator-min-microvolt = <3300000>; 1190 regulator-max-microvolt = <3300000>; 1191 gpio = <&pmic 4 GPIO_ACTIVE_HIGH>; 1192 enable-active-high; 1193 vin-supply = <&vdd_3v3_run>; 1194 }; 1195 1196 vdd_3v3_lp0: regulator-lp0 { 1197 compatible = "regulator-fixed"; 1198 regulator-name = "+3.3V_LP0"; 1199 regulator-min-microvolt = <3300000>; 1200 regulator-max-microvolt = <3300000>; 1201 /* 1202 * TODO: find a way to wire this up with the USB EHCI 1203 * controllers so that it can be enabled on demand. 1204 */ 1205 regulator-always-on; 1206 gpio = <&pmic 2 GPIO_ACTIVE_HIGH>; 1207 enable-active-high; 1208 vin-supply = <&vdd_3v3_sys>; 1209 }; 1210 1211 vdd_hdmi_pll: regulator-hdmipll { 1212 compatible = "regulator-fixed"; 1213 regulator-name = "+1.05V_RUN_AVDD_HDMI_PLL"; 1214 regulator-min-microvolt = <1050000>; 1215 regulator-max-microvolt = <1050000>; 1216 gpio = <&gpio TEGRA_GPIO(H, 7) GPIO_ACTIVE_LOW>; 1217 vin-supply = <&vdd_1v05_run>; 1218 }; 1219 1220 vdd_5v0_hdmi: regulator-hdmicon { 1221 compatible = "regulator-fixed"; 1222 regulator-name = "+5V_HDMI_CON"; 1223 regulator-min-microvolt = <5000000>; 1224 regulator-max-microvolt = <5000000>; 1225 gpio = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>; 1226 enable-active-high; 1227 vin-supply = <&vdd_5v0_sys>; 1228 }; 1229 1230 sound { 1231 compatible = "nvidia,tegra-audio-max98090-venice2", 1232 "nvidia,tegra-audio-max98090"; 1233 nvidia,model = "NVIDIA Tegra Venice2"; 1234 1235 nvidia,audio-routing = 1236 "Headphones", "HPR", 1237 "Headphones", "HPL", 1238 "Speakers", "SPKR", 1239 "Speakers", "SPKL", 1240 "Mic Jack", "MICBIAS", 1241 "IN34", "Mic Jack"; 1242 1243 nvidia,i2s-controller = <&tegra_i2s1>; 1244 nvidia,audio-codec = <&acodec>; 1245 1246 clocks = <&tegra_car TEGRA124_CLK_PLL_A>, 1247 <&tegra_car TEGRA124_CLK_PLL_A_OUT0>, 1248 <&tegra_pmc TEGRA_PMC_CLK_OUT_1>; 1249 clock-names = "pll_a", "pll_a_out0", "mclk"; 1250 1251 assigned-clocks = <&tegra_car TEGRA124_CLK_EXTERN1>, 1252 <&tegra_pmc TEGRA_PMC_CLK_OUT_1>; 1253 1254 assigned-clock-parents = <&tegra_car TEGRA124_CLK_PLL_A_OUT0>, 1255 <&tegra_car TEGRA124_CLK_EXTERN1>; 1256 }; 1257}; 1258 1259#include "../cros-ec-keyboard.dtsi" 1260