xref: /linux/arch/arm/boot/dts/nspire/nspire-classic.dtsi (revision a1ff5a7d78a036d6c2178ee5acd6ba4946243800)
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 *  Copyright (C) 2013 Daniel Tang <tangrs@tangrs.id.au>
4 */
5
6/include/ "nspire.dtsi"
7
8&lcd {
9	port {
10		clcd_pads: endpoint {
11			remote-endpoint = <&panel_in>;
12		};
13	};
14};
15
16&fast_timer {
17	/* compatible = "lsi,zevio-timer"; */
18	reg = <0x90010000 0x1000>, <0x900a0010 0x8>;
19};
20
21&uart {
22	compatible = "ns16550";
23	reg-shift = <2>;
24	reg-io-width = <4>;
25	clocks = <&apb_pclk>;
26	no-loopback-test;
27};
28
29&timer0 {
30	/* compatible = "lsi,zevio-timer"; */
31	reg = <0x900c0000 0x1000>, <0x900a0018 0x8>;
32};
33
34&timer1 {
35	compatible = "lsi,zevio-timer";
36	reg = <0x900d0000 0x1000>, <0x900a0020 0x8>;
37};
38
39&keypad {
40	active-low;
41
42};
43
44&base_clk {
45	compatible = "lsi,nspire-classic-clock";
46};
47
48&ahb_clk {
49	compatible = "lsi,nspire-classic-ahb-divider";
50};
51
52
53&vbus_reg {
54	gpio = <&gpio 5 0>;
55};
56
57/ {
58	memory@10000000 {
59		device_type = "memory";
60		reg = <0x10000000 0x2000000>; /* 32 MB */
61	};
62
63	ahb {
64		#address-cells = <1>;
65		#size-cells = <1>;
66
67		intc: interrupt-controller@dc000000 {
68			compatible = "lsi,zevio-intc";
69			interrupt-controller;
70			reg = <0xdc000000 0x1000>;
71			#interrupt-cells = <1>;
72		};
73	};
74
75	panel {
76		compatible = "ti,nspire-classic-lcd-panel";
77		port {
78			panel_in: endpoint {
79				remote-endpoint = <&clcd_pads>;
80			};
81		};
82	};
83	chosen {
84		bootargs = "debug earlyprintk console=tty0 console=ttyS0,115200n8 root=/dev/ram0";
85	};
86};
87