1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * lan966x-pcb8290.dts - Device Tree file for LAN966X-PCB8290 board 4 * 5 * Copyright (C) 2022 Microchip Technology Inc. and its subsidiaries 6 * 7 * Author: Horatiu Vultur <horatiu.vultur@microchip.com> 8 */ 9/dts-v1/; 10#include "lan966x.dtsi" 11#include "dt-bindings/phy/phy-lan966x-serdes.h" 12 13/ { 14 model = "Microchip EVB LAN9668"; 15 compatible = "microchip,lan9668-pcb8290", "microchip,lan9668", "microchip,lan966"; 16 17 gpio-restart { 18 compatible = "gpio-restart"; 19 gpios = <&gpio 56 GPIO_ACTIVE_LOW>; 20 priority = <200>; 21 }; 22}; 23 24&aes { 25 status = "disabled"; /* Reserved by secure OS */ 26}; 27 28&gpio { 29 miim_a_pins: mdio-pins { 30 /* MDC, MDIO */ 31 pins = "GPIO_28", "GPIO_29"; 32 function = "miim_a"; 33 }; 34 35 pps_out_pins: pps-out-pins { 36 /* 1pps output */ 37 pins = "GPIO_38"; 38 function = "ptpsync_3"; 39 }; 40 41 ptp_ext_pins: ptp-ext-pins { 42 /* 1pps input */ 43 pins = "GPIO_35"; 44 function = "ptpsync_0"; 45 }; 46 47 udc_pins: ucd-pins { 48 /* VBUS_DET B */ 49 pins = "GPIO_8"; 50 function = "usb_slave_b"; 51 }; 52}; 53 54&mdio0 { 55 pinctrl-0 = <&miim_a_pins>; 56 pinctrl-names = "default"; 57 reset-gpios = <&gpio 53 GPIO_ACTIVE_LOW>; 58 status = "okay"; 59 60 ext_phy0: ethernet-phy@7 { 61 reg = <7>; 62 interrupts = <24 IRQ_TYPE_LEVEL_LOW>; 63 interrupt-parent = <&gpio>; 64 coma-mode-gpios = <&gpio 60 GPIO_OPEN_DRAIN>; 65 }; 66 67 ext_phy1: ethernet-phy@8 { 68 reg = <8>; 69 interrupts = <24 IRQ_TYPE_LEVEL_LOW>; 70 interrupt-parent = <&gpio>; 71 coma-mode-gpios = <&gpio 60 GPIO_OPEN_DRAIN>; 72 }; 73 74 ext_phy2: ethernet-phy@9 { 75 reg = <9>; 76 interrupts = <24 IRQ_TYPE_LEVEL_LOW>; 77 interrupt-parent = <&gpio>; 78 coma-mode-gpios = <&gpio 60 GPIO_OPEN_DRAIN>; 79 }; 80 81 ext_phy3: ethernet-phy@10 { 82 reg = <10>; 83 interrupts = <24 IRQ_TYPE_LEVEL_LOW>; 84 interrupt-parent = <&gpio>; 85 coma-mode-gpios = <&gpio 60 GPIO_OPEN_DRAIN>; 86 }; 87 88 ext_phy4: ethernet-phy@15 { 89 reg = <15>; 90 interrupts = <24 IRQ_TYPE_LEVEL_LOW>; 91 interrupt-parent = <&gpio>; 92 coma-mode-gpios = <&gpio 60 GPIO_OPEN_DRAIN>; 93 }; 94 95 ext_phy5: ethernet-phy@16 { 96 reg = <16>; 97 interrupts = <24 IRQ_TYPE_LEVEL_LOW>; 98 interrupt-parent = <&gpio>; 99 coma-mode-gpios = <&gpio 60 GPIO_OPEN_DRAIN>; 100 }; 101 102 ext_phy6: ethernet-phy@17 { 103 reg = <17>; 104 interrupts = <24 IRQ_TYPE_LEVEL_LOW>; 105 interrupt-parent = <&gpio>; 106 coma-mode-gpios = <&gpio 60 GPIO_OPEN_DRAIN>; 107 }; 108 109 ext_phy7: ethernet-phy@18 { 110 reg = <18>; 111 interrupts = <24 IRQ_TYPE_LEVEL_LOW>; 112 interrupt-parent = <&gpio>; 113 coma-mode-gpios = <&gpio 60 GPIO_OPEN_DRAIN>; 114 }; 115}; 116 117&port0 { 118 reg = <2>; 119 phy-handle = <&ext_phy2>; 120 phy-mode = "qsgmii"; 121 phys = <&serdes 0 SERDES6G(1)>; 122 status = "okay"; 123}; 124 125&port1 { 126 reg = <3>; 127 phy-handle = <&ext_phy3>; 128 phy-mode = "qsgmii"; 129 phys = <&serdes 1 SERDES6G(1)>; 130 status = "okay"; 131}; 132 133&port2 { 134 reg = <0>; 135 phy-handle = <&ext_phy0>; 136 phy-mode = "qsgmii"; 137 phys = <&serdes 2 SERDES6G(1)>; 138 status = "okay"; 139}; 140 141&port3 { 142 reg = <1>; 143 phy-handle = <&ext_phy1>; 144 phy-mode = "qsgmii"; 145 phys = <&serdes 3 SERDES6G(1)>; 146 status = "okay"; 147}; 148 149&port4 { 150 reg = <6>; 151 phy-handle = <&ext_phy6>; 152 phy-mode = "qsgmii"; 153 phys = <&serdes 4 SERDES6G(2)>; 154 status = "okay"; 155}; 156 157&port5 { 158 reg = <7>; 159 phy-handle = <&ext_phy7>; 160 phy-mode = "qsgmii"; 161 phys = <&serdes 5 SERDES6G(2)>; 162 status = "okay"; 163}; 164 165&port6 { 166 reg = <4>; 167 phy-handle = <&ext_phy4>; 168 phy-mode = "qsgmii"; 169 phys = <&serdes 6 SERDES6G(2)>; 170 status = "okay"; 171}; 172 173&port7 { 174 reg = <5>; 175 phy-handle = <&ext_phy5>; 176 phy-mode = "qsgmii"; 177 phys = <&serdes 7 SERDES6G(2)>; 178 status = "okay"; 179}; 180 181&serdes { 182 status = "okay"; 183}; 184 185&switch { 186 pinctrl-0 = <&pps_out_pins>, <&ptp_ext_pins>; 187 pinctrl-names = "default"; 188 status = "okay"; 189}; 190 191&udc { 192 pinctrl-0 = <&udc_pins>; 193 pinctrl-names = "default"; 194 atmel,vbus-gpio = <&gpio 8 GPIO_ACTIVE_HIGH>; 195 status = "okay"; 196}; 197