1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * lan966x-pcb8290.dts - Device Tree file for LAN966X-PCB8290 board 4 * 5 * Copyright (C) 2022 Microchip Technology Inc. and its subsidiaries 6 * 7 * Author: Horatiu Vultur <horatiu.vultur@microchip.com> 8 */ 9/dts-v1/; 10#include "lan966x.dtsi" 11#include "dt-bindings/phy/phy-lan966x-serdes.h" 12 13/ { 14 model = "Microchip EVB LAN9668"; 15 compatible = "microchip,lan9668-pcb8290", "microchip,lan9668", "microchip,lan966"; 16 17 gpio-restart { 18 compatible = "gpio-restart"; 19 gpios = <&gpio 56 GPIO_ACTIVE_LOW>; 20 priority = <200>; 21 }; 22}; 23 24&aes { 25 status = "disabled"; /* Reserved by secure OS */ 26}; 27 28&gpio { 29 miim_a_pins: mdio-pins { 30 /* MDC, MDIO */ 31 pins = "GPIO_28", "GPIO_29"; 32 function = "miim_a"; 33 }; 34 35 pps_out_pins: pps-out-pins { 36 /* 1pps output */ 37 pins = "GPIO_38"; 38 function = "ptpsync_3"; 39 }; 40 41 ptp_ext_pins: ptp-ext-pins { 42 /* 1pps input */ 43 pins = "GPIO_35"; 44 function = "ptpsync_0"; 45 }; 46 47 udc_pins: ucd-pins { 48 /* VBUS_DET B */ 49 pins = "GPIO_8"; 50 function = "usb_slave_b"; 51 }; 52}; 53 54&mdio0 { 55 pinctrl-0 = <&miim_a_pins>; 56 pinctrl-names = "default"; 57 status = "okay"; 58 59 ext_phy0: ethernet-phy@7 { 60 reg = <7>; 61 interrupts = <24 IRQ_TYPE_LEVEL_LOW>; 62 interrupt-parent = <&gpio>; 63 coma-mode-gpios = <&gpio 60 GPIO_OPEN_DRAIN>; 64 }; 65 66 ext_phy1: ethernet-phy@8 { 67 reg = <8>; 68 interrupts = <24 IRQ_TYPE_LEVEL_LOW>; 69 interrupt-parent = <&gpio>; 70 coma-mode-gpios = <&gpio 60 GPIO_OPEN_DRAIN>; 71 }; 72 73 ext_phy2: ethernet-phy@9 { 74 reg = <9>; 75 interrupts = <24 IRQ_TYPE_LEVEL_LOW>; 76 interrupt-parent = <&gpio>; 77 coma-mode-gpios = <&gpio 60 GPIO_OPEN_DRAIN>; 78 }; 79 80 ext_phy3: ethernet-phy@10 { 81 reg = <10>; 82 interrupts = <24 IRQ_TYPE_LEVEL_LOW>; 83 interrupt-parent = <&gpio>; 84 coma-mode-gpios = <&gpio 60 GPIO_OPEN_DRAIN>; 85 }; 86 87 ext_phy4: ethernet-phy@15 { 88 reg = <15>; 89 interrupts = <24 IRQ_TYPE_LEVEL_LOW>; 90 interrupt-parent = <&gpio>; 91 coma-mode-gpios = <&gpio 60 GPIO_OPEN_DRAIN>; 92 }; 93 94 ext_phy5: ethernet-phy@16 { 95 reg = <16>; 96 interrupts = <24 IRQ_TYPE_LEVEL_LOW>; 97 interrupt-parent = <&gpio>; 98 coma-mode-gpios = <&gpio 60 GPIO_OPEN_DRAIN>; 99 }; 100 101 ext_phy6: ethernet-phy@17 { 102 reg = <17>; 103 interrupts = <24 IRQ_TYPE_LEVEL_LOW>; 104 interrupt-parent = <&gpio>; 105 coma-mode-gpios = <&gpio 60 GPIO_OPEN_DRAIN>; 106 }; 107 108 ext_phy7: ethernet-phy@18 { 109 reg = <18>; 110 interrupts = <24 IRQ_TYPE_LEVEL_LOW>; 111 interrupt-parent = <&gpio>; 112 coma-mode-gpios = <&gpio 60 GPIO_OPEN_DRAIN>; 113 }; 114}; 115 116&port0 { 117 reg = <2>; 118 phy-handle = <&ext_phy2>; 119 phy-mode = "qsgmii"; 120 phys = <&serdes 0 SERDES6G(1)>; 121 status = "okay"; 122}; 123 124&port1 { 125 reg = <3>; 126 phy-handle = <&ext_phy3>; 127 phy-mode = "qsgmii"; 128 phys = <&serdes 1 SERDES6G(1)>; 129 status = "okay"; 130}; 131 132&port2 { 133 reg = <0>; 134 phy-handle = <&ext_phy0>; 135 phy-mode = "qsgmii"; 136 phys = <&serdes 2 SERDES6G(1)>; 137 status = "okay"; 138}; 139 140&port3 { 141 reg = <1>; 142 phy-handle = <&ext_phy1>; 143 phy-mode = "qsgmii"; 144 phys = <&serdes 3 SERDES6G(1)>; 145 status = "okay"; 146}; 147 148&port4 { 149 reg = <6>; 150 phy-handle = <&ext_phy6>; 151 phy-mode = "qsgmii"; 152 phys = <&serdes 4 SERDES6G(2)>; 153 status = "okay"; 154}; 155 156&port5 { 157 reg = <7>; 158 phy-handle = <&ext_phy7>; 159 phy-mode = "qsgmii"; 160 phys = <&serdes 5 SERDES6G(2)>; 161 status = "okay"; 162}; 163 164&port6 { 165 reg = <4>; 166 phy-handle = <&ext_phy4>; 167 phy-mode = "qsgmii"; 168 phys = <&serdes 6 SERDES6G(2)>; 169 status = "okay"; 170}; 171 172&port7 { 173 reg = <5>; 174 phy-handle = <&ext_phy5>; 175 phy-mode = "qsgmii"; 176 phys = <&serdes 7 SERDES6G(2)>; 177 status = "okay"; 178}; 179 180&serdes { 181 status = "okay"; 182}; 183 184&switch { 185 pinctrl-0 = <&pps_out_pins>, <&ptp_ext_pins>; 186 pinctrl-names = "default"; 187 status = "okay"; 188}; 189 190&udc { 191 pinctrl-0 = <&udc_pins>; 192 pinctrl-names = "default"; 193 atmel,vbus-gpio = <&gpio 8 GPIO_ACTIVE_HIGH>; 194 status = "okay"; 195}; 196