xref: /linux/arch/arm/boot/dts/microchip/at91sam9x5_usart3.dtsi (revision f9bff0e31881d03badf191d3b0005839391f5f2b)
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * at91sam9x5_usart3.dtsi - Device Tree Include file for AT91SAM9x5 SoC with
4 * 4 USART.
5 *
6 * Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
7 */
8
9#include <dt-bindings/pinctrl/at91.h>
10#include <dt-bindings/interrupt-controller/irq.h>
11#include <dt-bindings/mfd/at91-usart.h>
12
13/ {
14	aliases {
15		serial4 = &usart3;
16	};
17
18	ahb {
19		apb {
20			pinctrl@fffff400 {
21				usart3 {
22					pinctrl_usart3: usart3-0 {
23						atmel,pins =
24							<AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE
25							 AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;
26					};
27
28					pinctrl_usart3_rts: usart3_rts-0 {
29						atmel,pins =
30							<AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>;		/* PC24 periph B */
31					};
32
33					pinctrl_usart3_cts: usart3_cts-0 {
34						atmel,pins =
35							<AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE>;		/* PC25 periph B */
36					};
37
38					pinctrl_usart3_sck: usart3_sck-0 {
39						atmel,pins =
40							<AT91_PIOC 26 AT91_PERIPH_B AT91_PINCTRL_NONE>;		/* PC26 periph B */
41					};
42				};
43			};
44
45			usart3: serial@f8028000 {
46				compatible = "atmel,at91sam9260-usart";
47				reg = <0xf8028000 0x200>;
48				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
49				interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
50				pinctrl-names = "default";
51				pinctrl-0 = <&pinctrl_usart3>;
52				dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(14)>,
53				       <&dma1 1 (AT91_DMA_CFG_PER_ID(15) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
54				dma-names = "tx", "rx";
55				clocks = <&pmc PMC_TYPE_PERIPHERAL 8>;
56				clock-names = "usart";
57				status = "disabled";
58			};
59		};
60	};
61};
62