1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * at91-sama7g5ek.dts - Device Tree file for SAMA7G5-EK board 4 * 5 * Copyright (c) 2020 Microchip Technology Inc. and its subsidiaries 6 * 7 * Author: Eugen Hristev <eugen.hristev@microchip.com> 8 * Author: Claudiu Beznea <claudiu.beznea@microchip.com> 9 * 10 */ 11/dts-v1/; 12#include "sama7g5-pinfunc.h" 13#include "sama7g5.dtsi" 14#include <dt-bindings/mfd/atmel-flexcom.h> 15#include <dt-bindings/input/input.h> 16#include <dt-bindings/pinctrl/at91.h> 17#include <dt-bindings/sound/microchip,pdmc.h> 18 19/ { 20 model = "Microchip SAMA7G5-EK"; 21 compatible = "microchip,sama7g5ek", "microchip,sama7g5", "microchip,sama7"; 22 23 chosen { 24 bootargs = "rw root=/dev/mmcblk1p2 rootfstype=ext4 rootwait"; 25 stdout-path = "serial0:115200n8"; 26 }; 27 28 aliases { 29 serial0 = &uart3; 30 serial1 = &uart4; 31 serial2 = &uart7; 32 serial3 = &uart0; 33 i2c0 = &i2c1; 34 i2c1 = &i2c8; 35 i2c2 = &i2c9; 36 }; 37 38 gpio-keys { 39 compatible = "gpio-keys"; 40 41 pinctrl-names = "default"; 42 pinctrl-0 = <&pinctrl_key_gpio_default>; 43 44 button { 45 label = "PB_USER"; 46 gpios = <&pioA PIN_PA12 GPIO_ACTIVE_LOW>; 47 linux,code = <KEY_PROG1>; 48 wakeup-source; 49 }; 50 }; 51 52 leds { 53 compatible = "gpio-leds"; 54 pinctrl-names = "default"; 55 pinctrl-0 = <&pinctrl_led_gpio_default>; 56 status = "okay"; /* Conflict with pwm. */ 57 58 red_led { 59 label = "red"; 60 gpios = <&pioA PIN_PB8 GPIO_ACTIVE_HIGH>; 61 }; 62 63 green_led { 64 label = "green"; 65 gpios = <&pioA PIN_PA13 GPIO_ACTIVE_HIGH>; 66 }; 67 68 blue_led { 69 label = "blue"; 70 gpios = <&pioA PIN_PD20 GPIO_ACTIVE_HIGH>; 71 linux,default-trigger = "heartbeat"; 72 }; 73 }; 74 75 /* 512 M */ 76 memory@60000000 { 77 device_type = "memory"; 78 reg = <0x60000000 0x20000000>; 79 }; 80 81 reg_5v: regulator-5v { 82 compatible = "regulator-fixed"; 83 regulator-name = "5V_MAIN"; 84 regulator-min-microvolt = <5000000>; 85 regulator-max-microvolt = <5000000>; 86 regulator-always-on; 87 }; 88 89 sound: sound { 90 compatible = "simple-audio-card"; 91 simple-audio-card,name = "sama7g5ek audio"; 92 #address-cells = <1>; 93 #size-cells = <0>; 94 simple-audio-card,dai-link@0 { 95 reg = <0>; 96 cpu { 97 sound-dai = <&spdiftx>; 98 }; 99 codec { 100 sound-dai = <&spdif_out>; 101 }; 102 }; 103 simple-audio-card,dai-link@1 { 104 reg = <1>; 105 cpu { 106 sound-dai = <&spdifrx>; 107 }; 108 codec { 109 sound-dai = <&spdif_in>; 110 }; 111 }; 112 }; 113 114 spdif_in: spdif-in { 115 #sound-dai-cells = <0>; 116 compatible = "linux,spdif-dir"; 117 }; 118 119 spdif_out: spdif-out { 120 #sound-dai-cells = <0>; 121 compatible = "linux,spdif-dit"; 122 }; 123}; 124 125&adc { 126 vddana-supply = <&vddout25>; 127 vref-supply = <&vddout25>; 128 pinctrl-names = "default"; 129 pinctrl-0 = <&pinctrl_mikrobus1_an_default &pinctrl_mikrobus2_an_default>; 130 atmel,trigger-edge-type = <IRQ_TYPE_EDGE_RISING>; 131 status = "okay"; 132}; 133 134&can0 { 135 pinctrl-names = "default"; 136 pinctrl-0 = <&pinctrl_can0_default>; 137 status = "okay"; 138}; 139 140&can1 { 141 pinctrl-names = "default"; 142 pinctrl-0 = <&pinctrl_can1_default>; 143 status = "okay"; 144}; 145 146&cpu0 { 147 cpu-supply = <&vddcpu>; 148}; 149 150&qspi0 { 151 pinctrl-names = "default"; 152 pinctrl-0 = <&pinctrl_qspi>; 153 status = "okay"; 154 155 flash@0 { 156 #address-cells = <1>; 157 #size-cells = <1>; 158 compatible = "jedec,spi-nor"; 159 reg = <0>; 160 spi-max-frequency = <133000000>; 161 spi-tx-bus-width = <8>; 162 spi-rx-bus-width = <8>; 163 m25p,fast-read; 164 165 at91bootstrap@0 { 166 label = "ospi: at91bootstrap"; 167 reg = <0x0 0x40000>; 168 }; 169 170 bootloader@40000 { 171 label = "ospi: bootloader"; 172 reg = <0x40000 0xc0000>; 173 }; 174 175 bootloaderenvred@100000 { 176 label = "ospi: bootloader env redundant"; 177 reg = <0x100000 0x40000>; 178 }; 179 180 bootloaderenv@140000 { 181 label = "ospi: bootloader env"; 182 reg = <0x140000 0x40000>; 183 }; 184 185 dtb@180000 { 186 label = "ospi: device tree"; 187 reg = <0x180000 0x80000>; 188 }; 189 190 kernel@200000 { 191 label = "ospi: kernel"; 192 reg = <0x200000 0x600000>; 193 }; 194 195 rootfs@800000 { 196 label = "ospi: rootfs"; 197 reg = <0x800000 0x7800000>; 198 }; 199 200 }; 201}; 202 203&dma0 { 204 status = "okay"; 205}; 206 207&dma1 { 208 status = "okay"; 209}; 210 211&dma2 { 212 status = "okay"; 213}; 214 215&flx0 { 216 atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_USART>; 217 status = "disabled"; 218 219 uart0: serial@200 { 220 pinctrl-names = "default"; 221 pinctrl-0 = <&pinctrl_flx0_default>; 222 status = "disabled"; 223 }; 224}; 225 226&flx1 { 227 atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_TWI>; 228 status = "okay"; 229 230 i2c1: i2c@600 { 231 pinctrl-names = "default"; 232 pinctrl-0 = <&pinctrl_i2c1_default>; 233 i2c-analog-filter; 234 i2c-digital-filter; 235 i2c-digital-filter-width-ns = <35>; 236 status = "okay"; 237 238 power-monitor@10 { 239 compatible = "microchip,pac1934"; 240 reg = <0x10>; 241 #address-cells = <1>; 242 #size-cells = <0>; 243 244 channel@1 { 245 reg = <0x1>; 246 shunt-resistor-micro-ohms = <10000>; 247 label = "VDD3V3"; 248 }; 249 250 channel@2 { 251 reg = <0x2>; 252 shunt-resistor-micro-ohms = <10000>; 253 label = "VDDIODDR"; 254 }; 255 256 channel@3 { 257 reg = <0x3>; 258 shunt-resistor-micro-ohms = <10000>; 259 label = "VDDCORE"; 260 }; 261 262 channel@4 { 263 reg = <0x4>; 264 shunt-resistor-micro-ohms = <10000>; 265 label = "VDDCPU"; 266 }; 267 }; 268 269 pmic@5b { 270 compatible = "microchip,mcp16502"; 271 reg = <0x5b>; 272 lvin-supply = <®_5v>; 273 pvin1-supply = <®_5v>; 274 pvin2-supply = <®_5v>; 275 pvin3-supply = <®_5v>; 276 pvin4-supply = <®_5v>; 277 status = "okay"; 278 279 regulators { 280 vdd_3v3: VDD_IO { 281 regulator-name = "VDD_IO"; 282 regulator-min-microvolt = <3300000>; 283 regulator-max-microvolt = <3300000>; 284 regulator-initial-mode = <2>; 285 regulator-allowed-modes = <2>, <4>; 286 regulator-always-on; 287 288 regulator-state-standby { 289 regulator-on-in-suspend; 290 regulator-suspend-microvolt = <3300000>; 291 regulator-mode = <4>; 292 }; 293 294 regulator-state-mem { 295 regulator-off-in-suspend; 296 regulator-mode = <4>; 297 }; 298 }; 299 300 vddioddr: VDD_DDR { 301 regulator-name = "VDD_DDR"; 302 regulator-min-microvolt = <1350000>; 303 regulator-max-microvolt = <1350000>; 304 regulator-initial-mode = <2>; 305 regulator-allowed-modes = <2>, <4>; 306 regulator-always-on; 307 308 regulator-state-standby { 309 regulator-on-in-suspend; 310 regulator-suspend-microvolt = <1350000>; 311 regulator-mode = <4>; 312 }; 313 314 regulator-state-mem { 315 regulator-on-in-suspend; 316 regulator-suspend-microvolt = <1350000>; 317 regulator-mode = <4>; 318 }; 319 }; 320 321 vddcore: VDD_CORE { 322 regulator-name = "VDD_CORE"; 323 regulator-min-microvolt = <1150000>; 324 regulator-max-microvolt = <1150000>; 325 regulator-initial-mode = <2>; 326 regulator-allowed-modes = <2>, <4>; 327 regulator-always-on; 328 329 regulator-state-standby { 330 regulator-on-in-suspend; 331 regulator-suspend-microvolt = <1150000>; 332 regulator-mode = <4>; 333 }; 334 335 regulator-state-mem { 336 regulator-off-in-suspend; 337 regulator-mode = <4>; 338 }; 339 }; 340 341 vddcpu: VDD_OTHER { 342 regulator-name = "VDD_OTHER"; 343 regulator-min-microvolt = <1050000>; 344 regulator-max-microvolt = <1250000>; 345 regulator-initial-mode = <2>; 346 regulator-allowed-modes = <2>, <4>; 347 regulator-ramp-delay = <3125>; 348 regulator-always-on; 349 350 regulator-state-standby { 351 regulator-on-in-suspend; 352 regulator-suspend-microvolt = <1050000>; 353 regulator-mode = <4>; 354 }; 355 356 regulator-state-mem { 357 regulator-off-in-suspend; 358 regulator-mode = <4>; 359 }; 360 }; 361 362 vldo1: LDO1 { 363 regulator-name = "LDO1"; 364 regulator-min-microvolt = <1800000>; 365 regulator-max-microvolt = <1800000>; 366 regulator-always-on; 367 368 regulator-state-standby { 369 regulator-suspend-microvolt = <1800000>; 370 regulator-on-in-suspend; 371 }; 372 373 regulator-state-mem { 374 regulator-off-in-suspend; 375 }; 376 }; 377 378 vldo2: LDO2 { 379 regulator-name = "LDO2"; 380 regulator-min-microvolt = <1200000>; 381 regulator-max-microvolt = <3700000>; 382 383 regulator-state-standby { 384 regulator-suspend-microvolt = <1800000>; 385 regulator-on-in-suspend; 386 }; 387 388 regulator-state-mem { 389 regulator-off-in-suspend; 390 }; 391 }; 392 }; 393 }; 394 }; 395}; 396 397&flx3 { 398 atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_USART>; 399 status = "okay"; 400 401 uart3: serial@200 { 402 pinctrl-names = "default"; 403 pinctrl-0 = <&pinctrl_flx3_default>; 404 status = "okay"; 405 }; 406}; 407 408&flx4 { 409 atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_USART>; 410 status = "okay"; 411 412 uart4: serial@200 { 413 pinctrl-names = "default"; 414 pinctrl-0 = <&pinctrl_flx4_default>; 415 status = "okay"; 416 }; 417}; 418 419&flx7 { 420 atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_USART>; 421 status = "okay"; 422 423 uart7: serial@200 { 424 pinctrl-names = "default"; 425 pinctrl-0 = <&pinctrl_flx7_default>; 426 status = "okay"; 427 }; 428}; 429 430&flx8 { 431 atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_TWI>; 432 status = "okay"; 433 434 i2c8: i2c@600 { 435 pinctrl-names = "default"; 436 pinctrl-0 = <&pinctrl_i2c8_default>; 437 i2c-analog-filter; 438 i2c-digital-filter; 439 i2c-digital-filter-width-ns = <35>; 440 status = "okay"; 441 442 eeprom0: eeprom@52 { 443 compatible = "microchip,24aa025e48"; 444 reg = <0x52>; 445 size = <256>; 446 pagesize = <16>; 447 vcc-supply = <&vdd_3v3>; 448 449 nvmem-layout { 450 compatible = "fixed-layout"; 451 #address-cells = <1>; 452 #size-cells = <1>; 453 454 eeprom0_eui48: eui48@fa { 455 reg = <0xfa 0x6>; 456 }; 457 }; 458 }; 459 460 eeprom1: eeprom@53 { 461 compatible = "microchip,24aa025e48"; 462 reg = <0x53>; 463 size = <256>; 464 pagesize = <16>; 465 vcc-supply = <&vdd_3v3>; 466 467 nvmem-layout { 468 compatible = "fixed-layout"; 469 #address-cells = <1>; 470 #size-cells = <1>; 471 472 eeprom1_eui48: eui48@fa { 473 reg = <0xfa 0x6>; 474 }; 475 }; 476 }; 477 }; 478}; 479 480&flx9 { 481 atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_TWI>; 482 status = "okay"; 483 484 i2c9: i2c@600 { 485 pinctrl-names = "default"; 486 pinctrl-0 = <&pinctrl_i2c9_default>; 487 i2c-analog-filter; 488 i2c-digital-filter; 489 i2c-digital-filter-width-ns = <35>; 490 status = "okay"; 491 }; 492}; 493 494&flx11 { 495 atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_SPI>; 496 status = "okay"; 497 498 spi11: spi@400 { 499 pinctrl-names = "default"; 500 pinctrl-0 = <&pinctrl_mikrobus1_spi &pinctrl_mikrobus1_spi_cs>; 501 status = "okay"; 502 }; 503}; 504 505&gmac0 { 506 #address-cells = <1>; 507 #size-cells = <0>; 508 pinctrl-names = "default"; 509 pinctrl-0 = <&pinctrl_gmac0_default 510 &pinctrl_gmac0_mdio_default 511 &pinctrl_gmac0_txck_default 512 &pinctrl_gmac0_phy_irq>; 513 phy-mode = "rgmii-id"; 514 nvmem-cells = <&eeprom0_eui48>; 515 nvmem-cell-names = "mac-address"; 516 status = "okay"; 517 518 ethernet-phy@7 { 519 reg = <0x7>; 520 interrupt-parent = <&pioA>; 521 interrupts = <PIN_PA31 IRQ_TYPE_LEVEL_LOW>; 522 }; 523}; 524 525&gmac1 { 526 #address-cells = <1>; 527 #size-cells = <0>; 528 pinctrl-names = "default"; 529 pinctrl-0 = <&pinctrl_gmac1_default 530 &pinctrl_gmac1_mdio_default 531 &pinctrl_gmac1_phy_irq>; 532 phy-mode = "rmii"; 533 nvmem-cells = <&eeprom1_eui48>; 534 nvmem-cell-names = "mac-address"; 535 status = "okay"; /* Conflict with pdmc0. */ 536 537 ethernet-phy@0 { 538 reg = <0x0>; 539 interrupt-parent = <&pioA>; 540 interrupts = <PIN_PA21 IRQ_TYPE_LEVEL_LOW>; 541 }; 542}; 543 544&i2s0 { 545 pinctrl-names = "default"; 546 pinctrl-0 = <&pinctrl_i2s0_default>; 547}; 548 549&main_xtal { 550 clock-frequency = <24000000>; 551}; 552 553&pdmc0 { 554 #sound-dai-cells = <0>; 555 microchip,mic-pos = <MCHP_PDMC_DS0 MCHP_PDMC_CLK_NEGATIVE>, /* MIC 1 */ 556 <MCHP_PDMC_DS1 MCHP_PDMC_CLK_NEGATIVE>, /* MIC 2 */ 557 <MCHP_PDMC_DS0 MCHP_PDMC_CLK_POSITIVE>, /* MIC 3 */ 558 <MCHP_PDMC_DS1 MCHP_PDMC_CLK_POSITIVE>; /* MIC 4 */ 559 status = "disabled"; /* Conflict with gmac1. */ 560 pinctrl-names = "default"; 561 pinctrl-0 = <&pinctrl_pdmc0_default>; 562}; 563 564&pioA { 565 566 pinctrl_can0_default: can0_default { 567 pinmux = <PIN_PD12__CANTX0>, 568 <PIN_PD13__CANRX0 >; 569 bias-disable; 570 }; 571 572 pinctrl_can1_default: can1_default { 573 pinmux = <PIN_PD14__CANTX1>, 574 <PIN_PD15__CANRX1 >; 575 bias-disable; 576 }; 577 578 pinctrl_flx0_default: flx0_default { 579 pinmux = <PIN_PE3__FLEXCOM0_IO0>, 580 <PIN_PE4__FLEXCOM0_IO1>, 581 <PIN_PE6__FLEXCOM0_IO3>, 582 <PIN_PE7__FLEXCOM0_IO4>; 583 bias-disable; 584 }; 585 586 pinctrl_flx3_default: flx3_default { 587 pinmux = <PIN_PD16__FLEXCOM3_IO0>, 588 <PIN_PD17__FLEXCOM3_IO1>; 589 bias-pull-up; 590 }; 591 592 pinctrl_flx4_default: flx4_default { 593 pinmux = <PIN_PD18__FLEXCOM4_IO0>, 594 <PIN_PD19__FLEXCOM4_IO1>; 595 bias-disable; 596 }; 597 598 pinctrl_flx7_default: flx7_default { 599 pinmux = <PIN_PC23__FLEXCOM7_IO0>, 600 <PIN_PC24__FLEXCOM7_IO1>; 601 bias-disable; 602 }; 603 604 pinctrl_gmac0_default: gmac0_default { 605 pinmux = <PIN_PA16__G0_TX0>, 606 <PIN_PA17__G0_TX1>, 607 <PIN_PA26__G0_TX2>, 608 <PIN_PA27__G0_TX3>, 609 <PIN_PA19__G0_RX0>, 610 <PIN_PA20__G0_RX1>, 611 <PIN_PA28__G0_RX2>, 612 <PIN_PA29__G0_RX3>, 613 <PIN_PA15__G0_TXEN>, 614 <PIN_PA30__G0_RXCK>, 615 <PIN_PA18__G0_RXDV>, 616 <PIN_PA25__G0_125CK>; 617 slew-rate = <0>; 618 bias-disable; 619 }; 620 621 pinctrl_gmac0_mdio_default: gmac0_mdio_default { 622 pinmux = <PIN_PA22__G0_MDC>, 623 <PIN_PA23__G0_MDIO>; 624 bias-disable; 625 }; 626 627 pinctrl_gmac0_txck_default: gmac0_txck_default { 628 pinmux = <PIN_PA24__G0_TXCK>; 629 slew-rate = <0>; 630 bias-pull-up; 631 }; 632 633 pinctrl_gmac0_phy_irq: gmac0_phy_irq { 634 pinmux = <PIN_PA31__GPIO>; 635 bias-disable; 636 }; 637 638 pinctrl_gmac1_default: gmac1_default { 639 pinmux = <PIN_PD30__G1_TXCK>, 640 <PIN_PD22__G1_TX0>, 641 <PIN_PD23__G1_TX1>, 642 <PIN_PD21__G1_TXEN>, 643 <PIN_PD25__G1_RX0>, 644 <PIN_PD26__G1_RX1>, 645 <PIN_PD27__G1_RXER>, 646 <PIN_PD24__G1_RXDV>; 647 slew-rate = <0>; 648 bias-disable; 649 }; 650 651 pinctrl_gmac1_mdio_default: gmac1_mdio_default { 652 pinmux = <PIN_PD28__G1_MDC>, 653 <PIN_PD29__G1_MDIO>; 654 bias-disable; 655 }; 656 657 pinctrl_gmac1_phy_irq: gmac1_phy_irq { 658 pinmux = <PIN_PA21__GPIO>; 659 bias-disable; 660 }; 661 662 pinctrl_i2c1_default: i2c1_default { 663 pinmux = <PIN_PC9__FLEXCOM1_IO0>, 664 <PIN_PC10__FLEXCOM1_IO1>; 665 bias-disable; 666 }; 667 668 pinctrl_i2c8_default: i2c8_default { 669 pinmux = <PIN_PC14__FLEXCOM8_IO0>, 670 <PIN_PC13__FLEXCOM8_IO1>; 671 bias-disable; 672 }; 673 674 pinctrl_i2c9_default: i2c9_default { 675 pinmux = <PIN_PC18__FLEXCOM9_IO0>, 676 <PIN_PC19__FLEXCOM9_IO1>; 677 bias-disable; 678 }; 679 680 pinctrl_i2s0_default: i2s0_default { 681 pinmux = <PIN_PB23__I2SMCC0_CK>, 682 <PIN_PB24__I2SMCC0_WS>, 683 <PIN_PB25__I2SMCC0_DOUT1>, 684 <PIN_PB26__I2SMCC0_DOUT0>, 685 <PIN_PB27__I2SMCC0_MCK>; 686 bias-disable; 687 }; 688 689 pinctrl_key_gpio_default: key_gpio_default { 690 pinmux = <PIN_PA12__GPIO>; 691 bias-pull-up; 692 }; 693 694 pinctrl_led_gpio_default: led_gpio_default { 695 pinmux = <PIN_PA13__GPIO>, 696 <PIN_PB8__GPIO>, 697 <PIN_PD20__GPIO>; 698 bias-pull-up; 699 }; 700 701 pinctrl_mikrobus1_an_default: mikrobus1_an_default { 702 pinmux = <PIN_PD0__GPIO>; 703 bias-disable; 704 }; 705 706 pinctrl_mikrobus2_an_default: mikrobus2_an_default { 707 pinmux = <PIN_PD1__GPIO>; 708 bias-disable; 709 }; 710 711 pinctrl_mikrobus1_pwm2_default: mikrobus1_pwm2_default { 712 pinmux = <PIN_PA13__PWMH2>; 713 bias-disable; 714 }; 715 716 pinctrl_mikrobus2_pwm3_default: mikrobus2_pwm3_default { 717 pinmux = <PIN_PD20__PWMH3>; 718 bias-disable; 719 }; 720 721 pinctrl_mikrobus1_spi_cs: mikrobus1_spi_cs { 722 pinmux = <PIN_PB6__FLEXCOM11_IO3>; 723 bias-disable; 724 }; 725 726 pinctrl_mikrobus1_spi: mikrobus1_spi { 727 pinmux = <PIN_PB3__FLEXCOM11_IO0>, 728 <PIN_PB4__FLEXCOM11_IO1>, 729 <PIN_PB5__FLEXCOM11_IO2>; 730 bias-disable; 731 }; 732 733 pinctrl_pdmc0_default: pdmc0_default { 734 pinmux = <PIN_PD23__PDMC0_DS0>, 735 <PIN_PD24__PDMC0_DS1>, 736 <PIN_PD22__PDMC0_CLK>; 737 bias_disable; 738 }; 739 740 pinctrl_qspi: qspi { 741 pinmux = <PIN_PB12__QSPI0_IO0>, 742 <PIN_PB11__QSPI0_IO1>, 743 <PIN_PB10__QSPI0_IO2>, 744 <PIN_PB9__QSPI0_IO3>, 745 <PIN_PB16__QSPI0_IO4>, 746 <PIN_PB17__QSPI0_IO5>, 747 <PIN_PB18__QSPI0_IO6>, 748 <PIN_PB19__QSPI0_IO7>, 749 <PIN_PB13__QSPI0_CS>, 750 <PIN_PB14__QSPI0_SCK>, 751 <PIN_PB15__QSPI0_SCKN>, 752 <PIN_PB20__QSPI0_DQS>, 753 <PIN_PB21__QSPI0_INT>; 754 bias-disable; 755 slew-rate = <0>; 756 atmel,drive-strength = <ATMEL_PIO_DRVSTR_ME>; 757 }; 758 759 pinctrl_sdmmc0_default: sdmmc0_default { 760 cmd_data { 761 pinmux = <PIN_PA1__SDMMC0_CMD>, 762 <PIN_PA3__SDMMC0_DAT0>, 763 <PIN_PA4__SDMMC0_DAT1>, 764 <PIN_PA5__SDMMC0_DAT2>, 765 <PIN_PA6__SDMMC0_DAT3>, 766 <PIN_PA7__SDMMC0_DAT4>, 767 <PIN_PA8__SDMMC0_DAT5>, 768 <PIN_PA9__SDMMC0_DAT6>, 769 <PIN_PA10__SDMMC0_DAT7>; 770 slew-rate = <0>; 771 bias-pull-up; 772 }; 773 774 ck_cd_rstn_vddsel { 775 pinmux = <PIN_PA0__SDMMC0_CK>, 776 <PIN_PA2__SDMMC0_RSTN>, 777 <PIN_PA11__SDMMC0_DS>; 778 slew-rate = <0>; 779 bias-pull-up; 780 }; 781 }; 782 783 pinctrl_sdmmc1_default: sdmmc1_default { 784 cmd_data { 785 pinmux = <PIN_PB29__SDMMC1_CMD>, 786 <PIN_PB31__SDMMC1_DAT0>, 787 <PIN_PC0__SDMMC1_DAT1>, 788 <PIN_PC1__SDMMC1_DAT2>, 789 <PIN_PC2__SDMMC1_DAT3>; 790 slew-rate = <0>; 791 bias-pull-up; 792 }; 793 794 ck_cd_rstn_vddsel { 795 pinmux = <PIN_PB30__SDMMC1_CK>, 796 <PIN_PB28__SDMMC1_RSTN>, 797 <PIN_PC5__SDMMC1_1V8SEL>, 798 <PIN_PC4__SDMMC1_CD>; 799 slew-rate = <0>; 800 bias-pull-up; 801 }; 802 }; 803 804 pinctrl_sdmmc2_default: sdmmc2_default { 805 cmd_data { 806 pinmux = <PIN_PD3__SDMMC2_CMD>, 807 <PIN_PD5__SDMMC2_DAT0>, 808 <PIN_PD6__SDMMC2_DAT1>, 809 <PIN_PD7__SDMMC2_DAT2>, 810 <PIN_PD8__SDMMC2_DAT3>; 811 slew-rate = <0>; 812 bias-pull-up; 813 }; 814 815 ck { 816 pinmux = <PIN_PD4__SDMMC2_CK>; 817 slew-rate = <0>; 818 bias-pull-up; 819 }; 820 }; 821 822 pinctrl_spdifrx_default: spdifrx_default { 823 pinmux = <PIN_PB0__SPDIF_RX>; 824 bias-disable; 825 }; 826 827 pinctrl_spdiftx_default: spdiftx_default { 828 pinmux = <PIN_PB1__SPDIF_TX>; 829 bias-disable; 830 }; 831}; 832 833&pwm { 834 pinctrl-names = "default"; 835 pinctrl-0 = <&pinctrl_mikrobus1_pwm2_default &pinctrl_mikrobus2_pwm3_default>; 836 status = "disabled"; /* Conflict with leds. */ 837}; 838 839&rtt { 840 atmel,rtt-rtc-time-reg = <&gpbr 0x0>; 841}; 842 843&sdmmc0 { 844 bus-width = <8>; 845 non-removable; 846 sdhci-caps-mask = <0x0 0x00200000>; 847 vmmc-supply = <&vdd_3v3>; 848 vqmmc-supply = <&vldo1>; 849 pinctrl-names = "default"; 850 pinctrl-0 = <&pinctrl_sdmmc0_default>; 851 status = "okay"; 852}; 853 854&sdmmc1 { 855 bus-width = <4>; 856 no-1-8-v; 857 sdhci-caps-mask = <0x0 0x00200000>; 858 vmmc-supply = <&vdd_3v3>; 859 vqmmc-supply = <&vdd_3v3>; 860 pinctrl-names = "default"; 861 pinctrl-0 = <&pinctrl_sdmmc1_default>; 862 status = "okay"; 863}; 864 865&sdmmc2 { 866 bus-width = <4>; 867 no-1-8-v; 868 sdhci-caps-mask = <0x0 0x00200000>; 869 pinctrl-names = "default"; 870 pinctrl-0 = <&pinctrl_sdmmc2_default>; 871}; 872 873&shdwc { 874 debounce-delay-us = <976>; 875 status = "okay"; 876 877 input@0 { 878 reg = <0>; 879 }; 880}; 881 882&slow_xtal { 883 clock-frequency = <32768>; 884}; 885 886&spdifrx { 887 pinctrl-names = "default"; 888 pinctrl-0 = <&pinctrl_spdifrx_default>; 889 status = "okay"; 890}; 891 892&spdiftx { 893 pinctrl-names = "default"; 894 pinctrl-0 = <&pinctrl_spdiftx_default>; 895 status = "okay"; 896}; 897 898&tcb0 { 899 timer0: timer@0 { 900 compatible = "atmel,tcb-timer"; 901 reg = <0>; 902 }; 903 904 timer1: timer@1 { 905 compatible = "atmel,tcb-timer"; 906 reg = <1>; 907 }; 908}; 909 910&trng { 911 status = "okay"; 912}; 913 914&vddout25 { 915 vin-supply = <&vdd_3v3>; 916 status = "okay"; 917}; 918