1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * at91-sama7d65_curiosity.dts - Device Tree file for SAMA7D65 Curiosity board 4 * 5 * Copyright (c) 2024 Microchip Technology Inc. and its subsidiaries 6 * 7 * Author: Romain Sioen <romain.sioen@microchip.com> 8 * 9 */ 10/dts-v1/; 11#include "sama7d65-pinfunc.h" 12#include "sama7d65.dtsi" 13#include <dt-bindings/mfd/atmel-flexcom.h> 14#include <dt-bindings/pinctrl/at91.h> 15 16/ { 17 model = "Microchip SAMA7D65 Curiosity"; 18 compatible = "microchip,sama7d65-curiosity", "microchip,sama7d65", 19 "microchip,sama7d6", "microchip,sama7"; 20 21 aliases { 22 serial0 = &uart6; 23 }; 24 25 chosen { 26 stdout-path = "serial0:115200n8"; 27 }; 28 29 memory@60000000 { 30 device_type = "memory"; 31 reg = <0x60000000 0x40000000>; 32 }; 33 34 reg_5v: regulator-5v { 35 compatible = "regulator-fixed"; 36 regulator-name = "5V_MAIN"; 37 regulator-min-microvolt = <5000000>; 38 regulator-max-microvolt = <5000000>; 39 regulator-always-on; 40 }; 41}; 42 43&can1 { 44 pinctrl-names = "default"; 45 pinctrl-0 = <&pinctrl_can1_default>; 46 status = "okay"; 47}; 48 49&can2 { 50 pinctrl-names = "default"; 51 pinctrl-0 = <&pinctrl_can2_default>; 52 status = "okay"; 53}; 54 55&can3 { 56 pinctrl-names = "default"; 57 pinctrl-0 = <&pinctrl_can3_default>; 58 status = "okay"; 59}; 60 61&dma0 { 62 status = "okay"; 63}; 64 65&dma1 { 66 status = "okay"; 67}; 68 69&dma2 { 70 status = "okay"; 71}; 72 73&flx6 { 74 atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_USART>; 75 status = "okay"; 76}; 77 78&uart6 { 79 pinctrl-names = "default"; 80 pinctrl-0 = <&pinctrl_uart6_default>; 81 status = "okay"; 82}; 83 84&flx10 { 85 atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_TWI>; 86 status = "okay"; 87}; 88 89&gmac0 { 90 #address-cells = <1>; 91 #size-cells = <0>; 92 pinctrl-names = "default"; 93 pinctrl-0 = <&pinctrl_gmac0_default 94 &pinctrl_gmac0_mdio_default 95 &pinctrl_gmac0_txck_default 96 &pinctrl_gmac0_phy_irq>; 97 phy-mode = "rgmii-id"; 98 nvmem-cells = <&eeprom0_eui48>; 99 nvmem-cell-names = "mac-address"; 100 status = "okay"; 101 102 ethernet-phy@7 { 103 reg = <0x7>; 104 interrupt-parent = <&pioa>; 105 interrupts = <PIN_PC1 IRQ_TYPE_LEVEL_LOW>; 106 }; 107}; 108 109&i2c10 { 110 dmas = <0>, <0>; 111 i2c-analog-filter; 112 i2c-digital-filter; 113 i2c-digital-filter-width-ns = <35>; 114 pinctrl-names = "default"; 115 pinctrl-0 = <&pinctrl_i2c10_default>; 116 status = "okay"; 117 118 power-monitor@10 { 119 compatible = "microchip,pac1934"; 120 reg = <0x10>; 121 #address-cells = <1>; 122 #size-cells = <0>; 123 124 channel@1 { 125 reg = <0x1>; 126 shunt-resistor-micro-ohms = <47000>; 127 label = "VDD3V3"; 128 }; 129 130 channel@2 { 131 reg = <0x2>; 132 shunt-resistor-micro-ohms = <47000>; 133 label = "VDDIODDR"; 134 }; 135 136 channel@3 { 137 reg = <0x3>; 138 shunt-resistor-micro-ohms = <47000>; 139 label = "VDDCORE"; 140 }; 141 142 channel@4 { 143 reg = <0x4>; 144 shunt-resistor-micro-ohms = <47000>; 145 label = "VDDCPU"; 146 }; 147 }; 148 149 pmic@5b { 150 compatible = "microchip,mcp16502"; 151 reg = <0x5b>; 152 lvin-supply = <®_5v>; 153 pvin1-supply = <®_5v>; 154 pvin2-supply = <®_5v>; 155 pvin3-supply = <®_5v>; 156 pvin4-supply = <®_5v>; 157 status = "okay"; 158 159 regulators { 160 vdd_3v3: VDD_IO { 161 regulator-name = "VDD_IO"; 162 regulator-min-microvolt = <3300000>; 163 regulator-max-microvolt = <3300000>; 164 regulator-initial-mode = <2>; 165 regulator-allowed-modes = <2>, <4>; 166 regulator-always-on; 167 168 regulator-state-standby { 169 regulator-on-in-suspend; 170 regulator-suspend-microvolt = <3300000>; 171 regulator-mode = <4>; 172 }; 173 174 regulator-state-mem { 175 regulator-off-in-suspend; 176 regulator-mode = <4>; 177 }; 178 }; 179 180 vddioddr: VDD_DDR { 181 regulator-name = "VDD_DDR"; 182 regulator-min-microvolt = <1350000>; 183 regulator-max-microvolt = <1350000>; 184 regulator-initial-mode = <2>; 185 regulator-allowed-modes = <2>, <4>; 186 regulator-always-on; 187 188 regulator-state-standby { 189 regulator-on-in-suspend; 190 regulator-suspend-microvolt = <1350000>; 191 regulator-mode = <4>; 192 }; 193 194 regulator-state-mem { 195 regulator-on-in-suspend; 196 regulator-suspend-microvolt = <1350000>; 197 regulator-mode = <4>; 198 }; 199 }; 200 201 vddcore: VDD_CORE { 202 regulator-name = "VDD_CORE"; 203 regulator-min-microvolt = <1050000>; 204 regulator-max-microvolt = <1050000>; 205 regulator-initial-mode = <2>; 206 regulator-allowed-modes = <2>, <4>; 207 regulator-always-on; 208 209 regulator-state-standby { 210 regulator-on-in-suspend; 211 regulator-suspend-microvolt = <1050000>; 212 regulator-mode = <4>; 213 }; 214 215 regulator-state-mem { 216 regulator-off-in-suspend; 217 regulator-mode = <4>; 218 }; 219 }; 220 221 vddcpu: VDD_OTHER { 222 regulator-name = "VDD_OTHER"; 223 regulator-min-microvolt = <1050000>; 224 regulator-max-microvolt = <1250000>; 225 regulator-initial-mode = <2>; 226 regulator-allowed-modes = <2>, <4>; 227 regulator-ramp-delay = <3125>; 228 regulator-always-on; 229 230 regulator-state-standby { 231 regulator-on-in-suspend; 232 regulator-suspend-microvolt = <1050000>; 233 regulator-mode = <4>; 234 }; 235 236 regulator-state-mem { 237 regulator-off-in-suspend; 238 regulator-mode = <4>; 239 }; 240 }; 241 242 vldo1: LDO1 { 243 regulator-name = "LDO1"; 244 regulator-min-microvolt = <1800000>; 245 regulator-max-microvolt = <1800000>; 246 regulator-always-on; 247 248 regulator-state-standby { 249 regulator-suspend-microvolt = <1800000>; 250 regulator-on-in-suspend; 251 }; 252 253 regulator-state-mem { 254 regulator-off-in-suspend; 255 }; 256 }; 257 258 vldo2: LDO2 { 259 regulator-name = "LDO2"; 260 regulator-min-microvolt = <1200000>; 261 regulator-max-microvolt = <3700000>; 262 263 regulator-state-standby { 264 regulator-on-in-suspend; 265 }; 266 267 regulator-state-mem { 268 regulator-off-in-suspend; 269 }; 270 }; 271 }; 272 }; 273 274 eeprom0: eeprom@51 { 275 compatible = "microchip,24aa025e48"; 276 reg = <0x51>; 277 size = <256>; 278 pagesize = <16>; 279 vcc-supply = <&vdd_3v3>; 280 281 nvmem-layout { 282 compatible = "fixed-layout"; 283 #address-cells = <1>; 284 #size-cells = <1>; 285 286 eeprom0_eui48: eui48@fa { 287 reg = <0xfa 0x6>; 288 }; 289 }; 290 }; 291}; 292 293&main_xtal { 294 clock-frequency = <24000000>; 295}; 296 297&pioa { 298 pinctrl_can1_default: can1-default { 299 pinmux = <PIN_PD10__CANTX1>, 300 <PIN_PD11__CANRX1>; 301 bias-disable; 302 }; 303 304 pinctrl_can2_default: can2-default { 305 pinmux = <PIN_PD12__CANTX2>, 306 <PIN_PD13__CANRX2>; 307 bias-disable; 308 }; 309 310 pinctrl_can3_default: can3-default { 311 pinmux = <PIN_PD14__CANTX3>, 312 <PIN_PD15__CANRX3>; 313 bias-disable; 314 }; 315 316 pinctrl_gmac0_default: gmac0-default { 317 pinmux = <PIN_PA26__G0_TX0>, 318 <PIN_PA27__G0_TX1>, 319 <PIN_PB4__G0_TX2>, 320 <PIN_PB5__G0_TX3>, 321 <PIN_PA29__G0_RX0>, 322 <PIN_PA30__G0_RX1>, 323 <PIN_PB2__G0_RX2>, 324 <PIN_PB6__G0_RX3>, 325 <PIN_PA25__G0_TXCTL>, 326 <PIN_PB3__G0_RXCK>, 327 <PIN_PA28__G0_RXCTL>; 328 slew-rate = <0>; 329 bias-disable; 330 }; 331 332 pinctrl_gmac0_mdio_default: gmac0-mdio-default { 333 pinmux = <PIN_PA31__G0_MDC>, 334 <PIN_PB0__G0_MDIO>; 335 bias-disable; 336 }; 337 338 pinctrl_gmac0_phy_irq: gmac0-phy-irq { 339 pinmux = <PIN_PC1__GPIO>; 340 bias-disable; 341 }; 342 343 pinctrl_gmac0_txck_default: gmac0-txck-default { 344 pinmux = <PIN_PB1__G0_REFCK>; 345 slew-rate = <0>; 346 bias-pull-up; 347 }; 348 349 pinctrl_i2c10_default: i2c10-default{ 350 pinmux = <PIN_PB19__FLEXCOM10_IO1>, 351 <PIN_PB20__FLEXCOM10_IO0>; 352 bias-pull-up; 353 }; 354 355 pinctrl_sdmmc1_default: sdmmc1-default { 356 cmd-data { 357 pinmux = <PIN_PB22__SDMMC1_CMD>, 358 <PIN_PB24__SDMMC1_DAT0>, 359 <PIN_PB25__SDMMC1_DAT1>, 360 <PIN_PB26__SDMMC1_DAT2>, 361 <PIN_PB27__SDMMC1_DAT3>; 362 slew-rate = <0>; 363 bias-disable; 364 }; 365 366 ck-cd-rstn-vddsel { 367 pinmux = <PIN_PB23__SDMMC1_CK>, 368 <PIN_PB21__SDMMC1_RSTN>, 369 <PIN_PB30__SDMMC1_1V8SEL>, 370 <PIN_PB29__SDMMC1_CD>, 371 <PIN_PB28__SDMMC1_WP>; 372 slew-rate = <0>; 373 bias-disable; 374 }; 375 }; 376 377 pinctrl_uart6_default: uart6-default { 378 pinmux = <PIN_PD18__FLEXCOM6_IO0>, 379 <PIN_PD19__FLEXCOM6_IO1>; 380 bias-disable; 381 }; 382}; 383 384&rtt { 385 atmel,rtt-rtc-time-reg = <&gpbr 0x0>; 386}; 387 388&sdmmc1 { 389 bus-width = <4>; 390 pinctrl-names = "default"; 391 pinctrl-0 = <&pinctrl_sdmmc1_default>; 392 status = "okay"; 393}; 394 395&shdwc { 396 debounce-delay-us = <976>; 397 status = "okay"; 398 399 input@0 { 400 reg = <0>; 401 }; 402}; 403 404&slow_xtal { 405 clock-frequency = <32768>; 406}; 407