xref: /linux/arch/arm/boot/dts/microchip/at91-sama7d65_curiosity.dts (revision 115e74a29b530d121891238e9551c4bcdf7b04b5)
1deaa14abSRomain Sioen// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2deaa14abSRomain Sioen/*
3deaa14abSRomain Sioen *  at91-sama7d65_curiosity.dts - Device Tree file for SAMA7D65 Curiosity board
4deaa14abSRomain Sioen *
5deaa14abSRomain Sioen *  Copyright (c) 2024 Microchip Technology Inc. and its subsidiaries
6deaa14abSRomain Sioen *
7deaa14abSRomain Sioen *  Author: Romain Sioen <romain.sioen@microchip.com>
8deaa14abSRomain Sioen *
9deaa14abSRomain Sioen */
10deaa14abSRomain Sioen/dts-v1/;
11deaa14abSRomain Sioen#include "sama7d65-pinfunc.h"
12deaa14abSRomain Sioen#include "sama7d65.dtsi"
13deaa14abSRomain Sioen#include <dt-bindings/mfd/atmel-flexcom.h>
14deaa14abSRomain Sioen#include <dt-bindings/pinctrl/at91.h>
15deaa14abSRomain Sioen
16deaa14abSRomain Sioen/ {
17deaa14abSRomain Sioen	model = "Microchip SAMA7D65 Curiosity";
18deaa14abSRomain Sioen	compatible = "microchip,sama7d65-curiosity", "microchip,sama7d65",
19deaa14abSRomain Sioen		     "microchip,sama7d6", "microchip,sama7";
20deaa14abSRomain Sioen
21deaa14abSRomain Sioen	aliases {
22deaa14abSRomain Sioen		serial0 = &uart6;
23deaa14abSRomain Sioen	};
24deaa14abSRomain Sioen
25deaa14abSRomain Sioen	chosen {
26deaa14abSRomain Sioen		stdout-path = "serial0:115200n8";
27deaa14abSRomain Sioen	};
28deaa14abSRomain Sioen
29deaa14abSRomain Sioen	memory@60000000 {
30deaa14abSRomain Sioen		device_type = "memory";
31deaa14abSRomain Sioen		reg = <0x60000000 0x40000000>;
32deaa14abSRomain Sioen	};
33e65a13a2SRyan Wanner
34e65a13a2SRyan Wanner	reg_5v: regulator-5v {
35e65a13a2SRyan Wanner		compatible = "regulator-fixed";
36e65a13a2SRyan Wanner		regulator-name = "5V_MAIN";
37e65a13a2SRyan Wanner		regulator-min-microvolt = <5000000>;
38e65a13a2SRyan Wanner		regulator-max-microvolt = <5000000>;
39e65a13a2SRyan Wanner		regulator-always-on;
40e65a13a2SRyan Wanner	};
41deaa14abSRomain Sioen};
42deaa14abSRomain Sioen
43*198b54b0SRyan Wanner&can1 {
44*198b54b0SRyan Wanner	pinctrl-names = "default";
45*198b54b0SRyan Wanner	pinctrl-0 = <&pinctrl_can1_default>;
46*198b54b0SRyan Wanner	status = "okay";
47*198b54b0SRyan Wanner};
48*198b54b0SRyan Wanner
49*198b54b0SRyan Wanner&can2 {
50*198b54b0SRyan Wanner	pinctrl-names = "default";
51*198b54b0SRyan Wanner	pinctrl-0 = <&pinctrl_can2_default>;
52*198b54b0SRyan Wanner	status = "okay";
53*198b54b0SRyan Wanner};
54*198b54b0SRyan Wanner
55*198b54b0SRyan Wanner&can3 {
56*198b54b0SRyan Wanner	pinctrl-names = "default";
57*198b54b0SRyan Wanner	pinctrl-0 = <&pinctrl_can3_default>;
58*198b54b0SRyan Wanner	status = "okay";
59*198b54b0SRyan Wanner};
60*198b54b0SRyan Wanner
6169c98f63SRyan Wanner&dma0 {
6269c98f63SRyan Wanner	status = "okay";
6369c98f63SRyan Wanner};
6469c98f63SRyan Wanner
6569c98f63SRyan Wanner&dma1 {
6669c98f63SRyan Wanner	status = "okay";
6769c98f63SRyan Wanner};
6869c98f63SRyan Wanner
6969c98f63SRyan Wanner&dma2 {
7069c98f63SRyan Wanner	status = "okay";
7169c98f63SRyan Wanner};
7269c98f63SRyan Wanner
73deaa14abSRomain Sioen&flx6 {
74deaa14abSRomain Sioen	atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_USART>;
75deaa14abSRomain Sioen	status = "okay";
76deaa14abSRomain Sioen};
77deaa14abSRomain Sioen
78deaa14abSRomain Sioen&uart6 {
79deaa14abSRomain Sioen	pinctrl-names = "default";
80deaa14abSRomain Sioen	pinctrl-0 = <&pinctrl_uart6_default>;
81deaa14abSRomain Sioen	status = "okay";
82deaa14abSRomain Sioen};
83deaa14abSRomain Sioen
842e60cf9dSMihai Sain&flx10 {
852e60cf9dSMihai Sain	atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_TWI>;
862e60cf9dSMihai Sain	status = "okay";
872e60cf9dSMihai Sain};
882e60cf9dSMihai Sain
897116fb2fSRyan Wanner&gmac0 {
907116fb2fSRyan Wanner	#address-cells = <1>;
917116fb2fSRyan Wanner	#size-cells = <0>;
927116fb2fSRyan Wanner	pinctrl-names = "default";
937116fb2fSRyan Wanner	pinctrl-0 = <&pinctrl_gmac0_default
947116fb2fSRyan Wanner		     &pinctrl_gmac0_mdio_default
957116fb2fSRyan Wanner		     &pinctrl_gmac0_txck_default
967116fb2fSRyan Wanner		     &pinctrl_gmac0_phy_irq>;
977116fb2fSRyan Wanner	phy-mode = "rgmii-id";
980bbc54daSRyan Wanner	nvmem-cells = <&eeprom0_eui48>;
990bbc54daSRyan Wanner	nvmem-cell-names = "mac-address";
1007116fb2fSRyan Wanner	status = "okay";
1017116fb2fSRyan Wanner
1027116fb2fSRyan Wanner	ethernet-phy@7 {
1037116fb2fSRyan Wanner		reg = <0x7>;
1047116fb2fSRyan Wanner		interrupt-parent = <&pioa>;
1057116fb2fSRyan Wanner		interrupts = <PIN_PC1 IRQ_TYPE_LEVEL_LOW>;
1067116fb2fSRyan Wanner	};
1077116fb2fSRyan Wanner};
1087116fb2fSRyan Wanner
1092e60cf9dSMihai Sain&i2c10 {
1102e60cf9dSMihai Sain	dmas = <0>, <0>;
1112e60cf9dSMihai Sain	i2c-analog-filter;
1122e60cf9dSMihai Sain	i2c-digital-filter;
1132e60cf9dSMihai Sain	i2c-digital-filter-width-ns = <35>;
1142e60cf9dSMihai Sain	pinctrl-names = "default";
1152e60cf9dSMihai Sain	pinctrl-0 = <&pinctrl_i2c10_default>;
1162e60cf9dSMihai Sain	status = "okay";
1172e60cf9dSMihai Sain
1182e60cf9dSMihai Sain	power-monitor@10 {
1192e60cf9dSMihai Sain		compatible = "microchip,pac1934";
1202e60cf9dSMihai Sain		reg = <0x10>;
1212e60cf9dSMihai Sain		#address-cells = <1>;
1222e60cf9dSMihai Sain		#size-cells = <0>;
1232e60cf9dSMihai Sain
1242e60cf9dSMihai Sain		channel@1 {
1252e60cf9dSMihai Sain			reg = <0x1>;
1262e60cf9dSMihai Sain			shunt-resistor-micro-ohms = <47000>;
1272e60cf9dSMihai Sain			label = "VDD3V3";
1282e60cf9dSMihai Sain		};
1292e60cf9dSMihai Sain
1302e60cf9dSMihai Sain		channel@2 {
1312e60cf9dSMihai Sain			reg = <0x2>;
1322e60cf9dSMihai Sain			shunt-resistor-micro-ohms = <47000>;
1332e60cf9dSMihai Sain			label = "VDDIODDR";
1342e60cf9dSMihai Sain		};
1352e60cf9dSMihai Sain
1362e60cf9dSMihai Sain		channel@3 {
1372e60cf9dSMihai Sain			reg = <0x3>;
1382e60cf9dSMihai Sain			shunt-resistor-micro-ohms = <47000>;
1392e60cf9dSMihai Sain			label = "VDDCORE";
1402e60cf9dSMihai Sain		};
1412e60cf9dSMihai Sain
1422e60cf9dSMihai Sain		channel@4 {
1432e60cf9dSMihai Sain			reg = <0x4>;
1442e60cf9dSMihai Sain			shunt-resistor-micro-ohms = <47000>;
1452e60cf9dSMihai Sain			label = "VDDCPU";
1462e60cf9dSMihai Sain		};
1472e60cf9dSMihai Sain	};
148e65a13a2SRyan Wanner
149e65a13a2SRyan Wanner	pmic@5b {
150e65a13a2SRyan Wanner		compatible = "microchip,mcp16502";
151e65a13a2SRyan Wanner		reg = <0x5b>;
152e65a13a2SRyan Wanner		lvin-supply = <&reg_5v>;
153e65a13a2SRyan Wanner		pvin1-supply = <&reg_5v>;
154e65a13a2SRyan Wanner		pvin2-supply = <&reg_5v>;
155e65a13a2SRyan Wanner		pvin3-supply = <&reg_5v>;
156e65a13a2SRyan Wanner		pvin4-supply = <&reg_5v>;
157e65a13a2SRyan Wanner		status = "okay";
158e65a13a2SRyan Wanner
159e65a13a2SRyan Wanner		regulators {
160e65a13a2SRyan Wanner			vdd_3v3: VDD_IO {
161e65a13a2SRyan Wanner				regulator-name = "VDD_IO";
162e65a13a2SRyan Wanner				regulator-min-microvolt = <3300000>;
163e65a13a2SRyan Wanner				regulator-max-microvolt = <3300000>;
164e65a13a2SRyan Wanner				regulator-initial-mode = <2>;
165e65a13a2SRyan Wanner				regulator-allowed-modes = <2>, <4>;
166e65a13a2SRyan Wanner				regulator-always-on;
167e65a13a2SRyan Wanner
168e65a13a2SRyan Wanner				regulator-state-standby {
169e65a13a2SRyan Wanner					regulator-on-in-suspend;
170e65a13a2SRyan Wanner					regulator-suspend-microvolt = <3300000>;
171e65a13a2SRyan Wanner					regulator-mode = <4>;
172e65a13a2SRyan Wanner				};
173e65a13a2SRyan Wanner
174e65a13a2SRyan Wanner				regulator-state-mem {
175e65a13a2SRyan Wanner					regulator-off-in-suspend;
176e65a13a2SRyan Wanner					regulator-mode = <4>;
177e65a13a2SRyan Wanner				};
178e65a13a2SRyan Wanner			};
179e65a13a2SRyan Wanner
180e65a13a2SRyan Wanner			vddioddr: VDD_DDR {
181e65a13a2SRyan Wanner				regulator-name = "VDD_DDR";
182e65a13a2SRyan Wanner				regulator-min-microvolt = <1350000>;
183e65a13a2SRyan Wanner				regulator-max-microvolt = <1350000>;
184e65a13a2SRyan Wanner				regulator-initial-mode = <2>;
185e65a13a2SRyan Wanner				regulator-allowed-modes = <2>, <4>;
186e65a13a2SRyan Wanner				regulator-always-on;
187e65a13a2SRyan Wanner
188e65a13a2SRyan Wanner				regulator-state-standby {
189e65a13a2SRyan Wanner					regulator-on-in-suspend;
190e65a13a2SRyan Wanner					regulator-suspend-microvolt = <1350000>;
191e65a13a2SRyan Wanner					regulator-mode = <4>;
192e65a13a2SRyan Wanner				};
193e65a13a2SRyan Wanner
194e65a13a2SRyan Wanner				regulator-state-mem {
195e65a13a2SRyan Wanner					regulator-on-in-suspend;
196e65a13a2SRyan Wanner					regulator-suspend-microvolt = <1350000>;
197e65a13a2SRyan Wanner					regulator-mode = <4>;
198e65a13a2SRyan Wanner				};
199e65a13a2SRyan Wanner			};
200e65a13a2SRyan Wanner
201e65a13a2SRyan Wanner			vddcore: VDD_CORE {
202e65a13a2SRyan Wanner				regulator-name = "VDD_CORE";
203e65a13a2SRyan Wanner				regulator-min-microvolt = <1050000>;
204e65a13a2SRyan Wanner				regulator-max-microvolt = <1050000>;
205e65a13a2SRyan Wanner				regulator-initial-mode = <2>;
206e65a13a2SRyan Wanner				regulator-allowed-modes = <2>, <4>;
207e65a13a2SRyan Wanner				regulator-always-on;
208e65a13a2SRyan Wanner
209e65a13a2SRyan Wanner				regulator-state-standby {
210e65a13a2SRyan Wanner					regulator-on-in-suspend;
211e65a13a2SRyan Wanner					regulator-suspend-microvolt = <1050000>;
212e65a13a2SRyan Wanner					regulator-mode = <4>;
213e65a13a2SRyan Wanner				};
214e65a13a2SRyan Wanner
215e65a13a2SRyan Wanner				regulator-state-mem {
216e65a13a2SRyan Wanner					regulator-off-in-suspend;
217e65a13a2SRyan Wanner					regulator-mode = <4>;
218e65a13a2SRyan Wanner				};
219e65a13a2SRyan Wanner			};
220e65a13a2SRyan Wanner
221e65a13a2SRyan Wanner			vddcpu: VDD_OTHER {
222e65a13a2SRyan Wanner				regulator-name = "VDD_OTHER";
223e65a13a2SRyan Wanner				regulator-min-microvolt = <1050000>;
224e65a13a2SRyan Wanner				regulator-max-microvolt = <1250000>;
225e65a13a2SRyan Wanner				regulator-initial-mode = <2>;
226e65a13a2SRyan Wanner				regulator-allowed-modes = <2>, <4>;
227e65a13a2SRyan Wanner				regulator-ramp-delay = <3125>;
228e65a13a2SRyan Wanner				regulator-always-on;
229e65a13a2SRyan Wanner
230e65a13a2SRyan Wanner				regulator-state-standby {
231e65a13a2SRyan Wanner					regulator-on-in-suspend;
232e65a13a2SRyan Wanner					regulator-suspend-microvolt = <1050000>;
233e65a13a2SRyan Wanner					regulator-mode = <4>;
234e65a13a2SRyan Wanner				};
235e65a13a2SRyan Wanner
236e65a13a2SRyan Wanner				regulator-state-mem {
237e65a13a2SRyan Wanner					regulator-off-in-suspend;
238e65a13a2SRyan Wanner					regulator-mode = <4>;
239e65a13a2SRyan Wanner				};
240e65a13a2SRyan Wanner			};
241e65a13a2SRyan Wanner
242e65a13a2SRyan Wanner			vldo1: LDO1 {
243e65a13a2SRyan Wanner				regulator-name = "LDO1";
244e65a13a2SRyan Wanner				regulator-min-microvolt = <1800000>;
245e65a13a2SRyan Wanner				regulator-max-microvolt = <1800000>;
246e65a13a2SRyan Wanner				regulator-always-on;
247e65a13a2SRyan Wanner
248e65a13a2SRyan Wanner				regulator-state-standby {
249e65a13a2SRyan Wanner					regulator-suspend-microvolt = <1800000>;
250e65a13a2SRyan Wanner					regulator-on-in-suspend;
251e65a13a2SRyan Wanner				};
252e65a13a2SRyan Wanner
253e65a13a2SRyan Wanner				regulator-state-mem {
254e65a13a2SRyan Wanner					regulator-off-in-suspend;
255e65a13a2SRyan Wanner				};
256e65a13a2SRyan Wanner			};
257e65a13a2SRyan Wanner
258e65a13a2SRyan Wanner			vldo2: LDO2 {
259e65a13a2SRyan Wanner				regulator-name = "LDO2";
260e65a13a2SRyan Wanner				regulator-min-microvolt = <1200000>;
261e65a13a2SRyan Wanner				regulator-max-microvolt = <3700000>;
262e65a13a2SRyan Wanner
263e65a13a2SRyan Wanner				regulator-state-standby {
264e65a13a2SRyan Wanner					regulator-on-in-suspend;
265e65a13a2SRyan Wanner				};
266e65a13a2SRyan Wanner
267e65a13a2SRyan Wanner				regulator-state-mem {
268e65a13a2SRyan Wanner					regulator-off-in-suspend;
269e65a13a2SRyan Wanner				};
270e65a13a2SRyan Wanner			};
271e65a13a2SRyan Wanner		};
272e65a13a2SRyan Wanner	};
2730bbc54daSRyan Wanner
2740bbc54daSRyan Wanner	eeprom0: eeprom@51 {
2750bbc54daSRyan Wanner		compatible = "microchip,24aa025e48";
2760bbc54daSRyan Wanner		reg = <0x51>;
2770bbc54daSRyan Wanner		size = <256>;
2780bbc54daSRyan Wanner		pagesize = <16>;
2790bbc54daSRyan Wanner		vcc-supply = <&vdd_3v3>;
2800bbc54daSRyan Wanner
2810bbc54daSRyan Wanner		nvmem-layout {
2820bbc54daSRyan Wanner			compatible = "fixed-layout";
2830bbc54daSRyan Wanner			#address-cells = <1>;
2840bbc54daSRyan Wanner			#size-cells = <1>;
2850bbc54daSRyan Wanner
2860bbc54daSRyan Wanner			eeprom0_eui48: eui48@fa {
2870bbc54daSRyan Wanner				reg = <0xfa 0x6>;
2880bbc54daSRyan Wanner			};
2890bbc54daSRyan Wanner		};
2900bbc54daSRyan Wanner	};
2912e60cf9dSMihai Sain};
2922e60cf9dSMihai Sain
293deaa14abSRomain Sioen&main_xtal {
294deaa14abSRomain Sioen	clock-frequency = <24000000>;
295deaa14abSRomain Sioen};
296deaa14abSRomain Sioen
297deaa14abSRomain Sioen&pioa {
298*198b54b0SRyan Wanner	pinctrl_can1_default: can1-default {
299*198b54b0SRyan Wanner		pinmux = <PIN_PD10__CANTX1>,
300*198b54b0SRyan Wanner			 <PIN_PD11__CANRX1>;
301*198b54b0SRyan Wanner		bias-disable;
302*198b54b0SRyan Wanner	};
303*198b54b0SRyan Wanner
304*198b54b0SRyan Wanner	pinctrl_can2_default: can2-default {
305*198b54b0SRyan Wanner		pinmux = <PIN_PD12__CANTX2>,
306*198b54b0SRyan Wanner			 <PIN_PD13__CANRX2>;
307*198b54b0SRyan Wanner		bias-disable;
308*198b54b0SRyan Wanner	};
309*198b54b0SRyan Wanner
310*198b54b0SRyan Wanner	pinctrl_can3_default: can3-default {
311*198b54b0SRyan Wanner		pinmux = <PIN_PD14__CANTX3>,
312*198b54b0SRyan Wanner			 <PIN_PD15__CANRX3>;
313*198b54b0SRyan Wanner		bias-disable;
314*198b54b0SRyan Wanner	};
315*198b54b0SRyan Wanner
3167116fb2fSRyan Wanner	pinctrl_gmac0_default: gmac0-default {
3177116fb2fSRyan Wanner		pinmux = <PIN_PA26__G0_TX0>,
3187116fb2fSRyan Wanner			 <PIN_PA27__G0_TX1>,
3197116fb2fSRyan Wanner			 <PIN_PB4__G0_TX2>,
3207116fb2fSRyan Wanner			 <PIN_PB5__G0_TX3>,
3217116fb2fSRyan Wanner			 <PIN_PA29__G0_RX0>,
3227116fb2fSRyan Wanner			 <PIN_PA30__G0_RX1>,
3237116fb2fSRyan Wanner			 <PIN_PB2__G0_RX2>,
3247116fb2fSRyan Wanner			 <PIN_PB6__G0_RX3>,
3257116fb2fSRyan Wanner			 <PIN_PA25__G0_TXCTL>,
3267116fb2fSRyan Wanner			 <PIN_PB3__G0_RXCK>,
3277116fb2fSRyan Wanner			 <PIN_PA28__G0_RXCTL>;
3287116fb2fSRyan Wanner		slew-rate = <0>;
3297116fb2fSRyan Wanner		bias-disable;
3307116fb2fSRyan Wanner	};
3317116fb2fSRyan Wanner
3327116fb2fSRyan Wanner	pinctrl_gmac0_mdio_default: gmac0-mdio-default {
3337116fb2fSRyan Wanner		pinmux = <PIN_PA31__G0_MDC>,
3347116fb2fSRyan Wanner			 <PIN_PB0__G0_MDIO>;
3357116fb2fSRyan Wanner		bias-disable;
3367116fb2fSRyan Wanner	};
3377116fb2fSRyan Wanner
3387116fb2fSRyan Wanner	pinctrl_gmac0_phy_irq: gmac0-phy-irq {
3397116fb2fSRyan Wanner		pinmux = <PIN_PC1__GPIO>;
3407116fb2fSRyan Wanner		bias-disable;
3417116fb2fSRyan Wanner	};
3427116fb2fSRyan Wanner
3437116fb2fSRyan Wanner	pinctrl_gmac0_txck_default: gmac0-txck-default {
3447116fb2fSRyan Wanner		pinmux = <PIN_PB1__G0_REFCK>;
3457116fb2fSRyan Wanner		slew-rate = <0>;
3467116fb2fSRyan Wanner		bias-pull-up;
3477116fb2fSRyan Wanner	};
3487116fb2fSRyan Wanner
3492e60cf9dSMihai Sain	pinctrl_i2c10_default: i2c10-default{
3502e60cf9dSMihai Sain		pinmux = <PIN_PB19__FLEXCOM10_IO1>,
3512e60cf9dSMihai Sain			 <PIN_PB20__FLEXCOM10_IO0>;
3522e60cf9dSMihai Sain		bias-pull-up;
3532e60cf9dSMihai Sain	};
3542e60cf9dSMihai Sain
355deaa14abSRomain Sioen	pinctrl_sdmmc1_default: sdmmc1-default {
356deaa14abSRomain Sioen		cmd-data {
357deaa14abSRomain Sioen			pinmux = <PIN_PB22__SDMMC1_CMD>,
358deaa14abSRomain Sioen				 <PIN_PB24__SDMMC1_DAT0>,
359deaa14abSRomain Sioen				 <PIN_PB25__SDMMC1_DAT1>,
360deaa14abSRomain Sioen				 <PIN_PB26__SDMMC1_DAT2>,
361deaa14abSRomain Sioen				 <PIN_PB27__SDMMC1_DAT3>;
362deaa14abSRomain Sioen			slew-rate = <0>;
363deaa14abSRomain Sioen			bias-disable;
364deaa14abSRomain Sioen		};
365deaa14abSRomain Sioen
366deaa14abSRomain Sioen		ck-cd-rstn-vddsel {
367deaa14abSRomain Sioen			pinmux = <PIN_PB23__SDMMC1_CK>,
368deaa14abSRomain Sioen				 <PIN_PB21__SDMMC1_RSTN>,
369deaa14abSRomain Sioen				 <PIN_PB30__SDMMC1_1V8SEL>,
370deaa14abSRomain Sioen				 <PIN_PB29__SDMMC1_CD>,
371deaa14abSRomain Sioen				 <PIN_PB28__SDMMC1_WP>;
372deaa14abSRomain Sioen			slew-rate = <0>;
373deaa14abSRomain Sioen			bias-disable;
374deaa14abSRomain Sioen		};
375deaa14abSRomain Sioen	};
376deaa14abSRomain Sioen
377deaa14abSRomain Sioen	pinctrl_uart6_default: uart6-default {
378deaa14abSRomain Sioen		pinmux = <PIN_PD18__FLEXCOM6_IO0>,
379deaa14abSRomain Sioen			 <PIN_PD19__FLEXCOM6_IO1>;
380deaa14abSRomain Sioen		bias-disable;
381deaa14abSRomain Sioen	};
382deaa14abSRomain Sioen};
383deaa14abSRomain Sioen
384e634fd71SRyan Wanner&rtt {
385e634fd71SRyan Wanner	atmel,rtt-rtc-time-reg = <&gpbr 0x0>;
386e634fd71SRyan Wanner};
387e634fd71SRyan Wanner
388deaa14abSRomain Sioen&sdmmc1 {
389deaa14abSRomain Sioen	bus-width = <4>;
390deaa14abSRomain Sioen	pinctrl-names = "default";
391deaa14abSRomain Sioen	pinctrl-0 = <&pinctrl_sdmmc1_default>;
392deaa14abSRomain Sioen	status = "okay";
393deaa14abSRomain Sioen};
394deaa14abSRomain Sioen
395e89b7cc8SRyan Wanner&shdwc {
396e89b7cc8SRyan Wanner	debounce-delay-us = <976>;
397e89b7cc8SRyan Wanner	status = "okay";
398e89b7cc8SRyan Wanner
399e89b7cc8SRyan Wanner	input@0 {
400e89b7cc8SRyan Wanner		reg = <0>;
401e89b7cc8SRyan Wanner	};
402e89b7cc8SRyan Wanner};
403e89b7cc8SRyan Wanner
404deaa14abSRomain Sioen&slow_xtal {
405deaa14abSRomain Sioen	clock-frequency = <32768>;
406deaa14abSRomain Sioen};
407