1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Copyright (c) 2015 MediaTek Inc. 4 * Author: Erin Lo <erin.lo@mediatek.com> 5 * 6 */ 7 8/dts-v1/; 9#include <dt-bindings/gpio/gpio.h> 10#include "mt2701.dtsi" 11 12/ { 13 model = "MediaTek MT2701 evaluation board"; 14 compatible = "mediatek,mt2701-evb", "mediatek,mt2701"; 15 16 memory { 17 device_type = "memory"; 18 reg = <0 0x80000000 0 0x40000000>; 19 }; 20 21 sound:sound { 22 compatible = "mediatek,mt2701-cs42448-machine"; 23 mediatek,platform = <&afe>; 24 /* CS42448 Machine name */ 25 audio-routing = 26 "Line Out Jack", "AOUT1L", 27 "Line Out Jack", "AOUT1R", 28 "Line Out Jack", "AOUT2L", 29 "Line Out Jack", "AOUT2R", 30 "Line Out Jack", "AOUT3L", 31 "Line Out Jack", "AOUT3R", 32 "Line Out Jack", "AOUT4L", 33 "Line Out Jack", "AOUT4R", 34 "AIN1L", "AMIC", 35 "AIN1R", "AMIC", 36 "AIN2L", "Tuner In", 37 "AIN2R", "Tuner In", 38 "AIN3L", "Satellite Tuner In", 39 "AIN3R", "Satellite Tuner In", 40 "AIN3L", "AUX In", 41 "AIN3R", "AUX In"; 42 mediatek,audio-codec = <&cs42448>; 43 mediatek,audio-codec-bt-mrg = <&bt_sco_codec>; 44 pinctrl-names = "default"; 45 pinctrl-0 = <&aud_pins_default>; 46 i2s1-in-sel-gpio1 = <&pio 53 0>; 47 i2s1-in-sel-gpio2 = <&pio 54 0>; 48 status = "okay"; 49 }; 50 51 bt_sco_codec:bt_sco_codec { 52 compatible = "linux,bt-sco"; 53 #sound-dai-cells = <0>; 54 }; 55 56 backlight_lcd: backlight_lcd { 57 compatible = "pwm-backlight"; 58 pwms = <&bls 0 100000>; 59 brightness-levels = < 60 0 16 32 48 64 80 96 112 61 128 144 160 176 192 208 224 240 62 255 63 >; 64 default-brightness-level = <9>; 65 }; 66 67 usb_vbus: regulator@0 { 68 compatible = "regulator-fixed"; 69 regulator-name = "usb_vbus"; 70 regulator-min-microvolt = <5000000>; 71 regulator-max-microvolt = <5000000>; 72 gpio = <&pio 45 GPIO_ACTIVE_HIGH>; 73 enable-active-high; 74 }; 75}; 76 77&auxadc { 78 status = "okay"; 79}; 80 81&bls { 82 status = "okay"; 83 pinctrl-names = "default"; 84 pinctrl-0 = <&pwm_bls_gpio>; 85}; 86 87&i2c0 { 88 pinctrl-names = "default"; 89 pinctrl-0 = <&i2c0_pins_a>; 90 status = "okay"; 91}; 92 93&i2c1 { 94 pinctrl-names = "default"; 95 pinctrl-0 = <&i2c1_pins_a>; 96 status = "okay"; 97}; 98 99&i2c2 { 100 pinctrl-names = "default"; 101 pinctrl-0 = <&i2c2_pins_a>; 102 status = "okay"; 103 cs42448: cs42448@48 { 104 compatible = "cirrus,cs42448"; 105 reg = <0x48>; 106 clocks = <&topckgen CLK_TOP_AUD_I2S1_MCLK>; 107 clock-names = "mclk"; 108 }; 109}; 110 111&pio { 112 i2c0_pins_a: i2c0@0 { 113 pins1 { 114 pinmux = <MT2701_PIN_75_SDA0__FUNC_SDA0>, 115 <MT2701_PIN_76_SCL0__FUNC_SCL0>; 116 bias-disable; 117 }; 118 }; 119 120 i2c1_pins_a: i2c1@0 { 121 pins1 { 122 pinmux = <MT2701_PIN_57_SDA1__FUNC_SDA1>, 123 <MT2701_PIN_58_SCL1__FUNC_SCL1>; 124 bias-disable; 125 }; 126 }; 127 128 i2c2_pins_a: i2c2@0 { 129 pins1 { 130 pinmux = <MT2701_PIN_77_SDA2__FUNC_SDA2>, 131 <MT2701_PIN_78_SCL2__FUNC_SCL2>; 132 bias-disable; 133 }; 134 }; 135 136 pwm_bls_gpio: pwm_bls_gpio { 137 pins_cmd_dat { 138 pinmux = <MT2701_PIN_208_AUD_EXT_CK1__FUNC_DISP_PWM>; 139 }; 140 }; 141 142 spi_pins_a: spi0@0 { 143 pins_spi { 144 pinmux = <MT2701_PIN_53_SPI0_CSN__FUNC_SPI0_CS>, 145 <MT2701_PIN_54_SPI0_CK__FUNC_SPI0_CK>, 146 <MT2701_PIN_55_SPI0_MI__FUNC_SPI0_MI>, 147 <MT2701_PIN_56_SPI0_MO__FUNC_SPI0_MO>; 148 bias-disable; 149 }; 150 }; 151 152 aud_pins_default: audiodefault { 153 pins_cmd_dat { 154 pinmux = <MT2701_PIN_49_I2S0_DATA__FUNC_I2S0_DATA>, 155 <MT2701_PIN_72_I2S0_DATA_IN__FUNC_I2S0_DATA_IN>, 156 <MT2701_PIN_73_I2S0_LRCK__FUNC_I2S0_LRCK>, 157 <MT2701_PIN_74_I2S0_BCK__FUNC_I2S0_BCK>, 158 <MT2701_PIN_126_I2S0_MCLK__FUNC_I2S0_MCLK>, 159 <MT2701_PIN_33_I2S1_DATA__FUNC_I2S1_DATA>, 160 <MT2701_PIN_34_I2S1_DATA_IN__FUNC_I2S1_DATA_IN>, 161 <MT2701_PIN_35_I2S1_BCK__FUNC_I2S1_BCK>, 162 <MT2701_PIN_36_I2S1_LRCK__FUNC_I2S1_LRCK>, 163 <MT2701_PIN_37_I2S1_MCLK__FUNC_I2S1_MCLK>, 164 <MT2701_PIN_203_PWM0__FUNC_I2S2_DATA>, 165 <MT2701_PIN_204_PWM1__FUNC_I2S3_DATA>, 166 <MT2701_PIN_53_SPI0_CSN__FUNC_GPIO53>, 167 <MT2701_PIN_54_SPI0_CK__FUNC_GPIO54>, 168 <MT2701_PIN_18_PCM_CLK__FUNC_MRG_CLK>, 169 <MT2701_PIN_19_PCM_SYNC__FUNC_MRG_SYNC>, 170 <MT2701_PIN_20_PCM_RX__FUNC_MRG_TX>, 171 <MT2701_PIN_21_PCM_TX__FUNC_MRG_RX>; 172 drive-strength = <MTK_DRIVE_12mA>; 173 bias-pull-down; 174 }; 175 }; 176 177 spi_pins_b: spi1@0 { 178 pins_spi { 179 pinmux = <MT2701_PIN_7_SPI1_CSN__FUNC_SPI1_CS>, 180 <MT2701_PIN_8_SPI1_MI__FUNC_SPI1_MI>, 181 <MT2701_PIN_9_SPI1_MO__FUNC_SPI1_MO>, 182 <MT2701_PIN_199_SPI1_CLK__FUNC_SPI1_CK>; 183 bias-disable; 184 }; 185 }; 186 187 spi_pins_c: spi2@0 { 188 pins_spi { 189 pinmux = <MT2701_PIN_101_SPI2_CSN__FUNC_SPI2_CS>, 190 <MT2701_PIN_102_SPI2_MI__FUNC_SPI2_MI>, 191 <MT2701_PIN_103_SPI2_MO__FUNC_SPI2_MO>, 192 <MT2701_PIN_104_SPI2_CLK__FUNC_SPI2_CK>; 193 bias-disable; 194 }; 195 }; 196}; 197 198&spi0 { 199 pinctrl-names = "default"; 200 pinctrl-0 = <&spi_pins_a>; 201 status = "disabled"; 202}; 203 204&spi1 { 205 pinctrl-names = "default"; 206 pinctrl-0 = <&spi_pins_b>; 207 status = "disabled"; 208}; 209 210&spi2 { 211 pinctrl-names = "default"; 212 pinctrl-0 = <&spi_pins_c>; 213 status = "disabled"; 214}; 215 216&nor_flash { 217 pinctrl-names = "default"; 218 pinctrl-0 = <&nor_pins_default>; 219 status = "okay"; 220 flash@0 { 221 compatible = "jedec,spi-nor"; 222 reg = <0>; 223 }; 224}; 225 226&pio { 227 nor_pins_default: nor { 228 pins1 { 229 pinmux = <MT2701_PIN_240_EXT_XCS__FUNC_EXT_XCS>, 230 <MT2701_PIN_241_EXT_SCK__FUNC_EXT_SCK>, 231 <MT2701_PIN_239_EXT_SDIO0__FUNC_EXT_SDIO0>, 232 <MT2701_PIN_238_EXT_SDIO1__FUNC_EXT_SDIO1>, 233 <MT2701_PIN_237_EXT_SDIO2__FUNC_EXT_SDIO2>, 234 <MT2701_PIN_236_EXT_SDIO3__FUNC_EXT_SDIO3>; 235 drive-strength = <4>; 236 bias-pull-up; 237 }; 238 }; 239}; 240 241&uart0 { 242 status = "okay"; 243}; 244 245&usb2 { 246 status = "okay"; 247 usb-role-switch; 248 connector { 249 compatible = "gpio-usb-b-connector", "usb-b-connector"; 250 type = "micro"; 251 id-gpios = <&pio 44 GPIO_ACTIVE_HIGH>; 252 vbus-supply = <&usb_vbus>; 253 }; 254}; 255