xref: /linux/arch/arm/boot/dts/marvell/kirkwood-pogoplug-series-4.dts (revision 6efc0ab3b05de0d7bab8ec0597214e4788251071) 
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * kirkwood-pogoplug-series-4.dts - Device tree file for PogoPlug Series 4
4 * inspired by the board files made by Kevin Mihelich for ArchLinux,
5 * and their DTS file.
6 *
7 * Copyright (C) 2015 Linus Walleij <linus.walleij@linaro.org>
8 */
9
10/dts-v1/;
11
12#include "kirkwood.dtsi"
13#include "kirkwood-6192.dtsi"
14#include <dt-bindings/input/linux-event-codes.h>
15
16/ {
17	model = "Cloud Engines PogoPlug Series 4";
18	compatible = "cloudengines,pogoplugv4", "marvell,kirkwood-88f6192",
19		     "marvell,kirkwood";
20
21	memory {
22		device_type = "memory";
23		reg = <0x00000000 0x08000000>;
24	};
25
26	chosen {
27		stdout-path = "uart0:115200n8";
28	};
29
30	gpio_keys {
31		compatible = "gpio-keys";
32		pinctrl-0 = <&pmx_button_eject>;
33		pinctrl-names = "default";
34
35		button-eject {
36			debounce-interval = <50>;
37			wakeup-source;
38			linux,code = <KEY_EJECTCD>;
39			label = "Eject Button";
40			gpios = <&gpio0 29 GPIO_ACTIVE_LOW>;
41		};
42	};
43
44	gpio-leds {
45		compatible = "gpio-leds";
46		pinctrl-0 = <&pmx_led_green &pmx_led_red>;
47		pinctrl-names = "default";
48
49		led-health {
50			label = "pogoplugv4:green:health";
51			gpios = <&gpio0 22 GPIO_ACTIVE_LOW>;
52			default-state = "on";
53		};
54		led-fault {
55			label = "pogoplugv4:red:fault";
56			gpios = <&gpio0 24 GPIO_ACTIVE_LOW>;
57		};
58	};
59};
60
61&pinctrl {
62	pmx_sata0: pmx-sata0 {
63		marvell,pins = "mpp21";
64		marvell,function = "sata0";
65	};
66
67	pmx_sata1: pmx-sata1 {
68		marvell,pins = "mpp20";
69		marvell,function = "sata1";
70	};
71
72	pmx_sdio_cd: pmx-sdio-cd {
73		marvell,pins = "mpp27";
74		marvell,function = "gpio";
75	};
76
77	pmx_sdio_wp: pmx-sdio-wp {
78		marvell,pins = "mpp28";
79		marvell,function = "gpio";
80	};
81
82	pmx_button_eject: pmx-button-eject {
83		marvell,pins = "mpp29";
84		marvell,function = "gpio";
85	};
86
87	pmx_led_green: pmx-led-green {
88		marvell,pins = "mpp22";
89		marvell,function = "gpio";
90	};
91
92	pmx_led_red: pmx-led-red {
93		marvell,pins = "mpp24";
94		marvell,function = "gpio";
95	};
96};
97
98&uart0 {
99	status = "okay";
100};
101
102/*
103 * This PCIE controller has a USB 3.0 XHCI controller at 1,0
104 */
105&pciec {
106	status = "okay";
107};
108
109&pcie0 {
110	status = "okay";
111};
112
113&sata {
114	status = "okay";
115	pinctrl-0 = <&pmx_sata0 &pmx_sata1>;
116	pinctrl-names = "default";
117	nr-ports = <1>;
118};
119
120&sdio {
121	status = "okay";
122	pinctrl-0 = <&pmx_sdio &pmx_sdio_cd &pmx_sdio_wp>;
123	pinctrl-names = "default";
124	cd-gpios = <&gpio0 27 GPIO_ACTIVE_LOW>;
125	wp-gpios = <&gpio0 28 GPIO_ACTIVE_HIGH>;
126};
127
128&nand {
129	/* 128 MiB of NAND flash */
130	chip-delay = <40>;
131	status = "okay";
132	partitions {
133		compatible = "fixed-partitions";
134		#address-cells = <1>;
135		#size-cells = <1>;
136
137		partition@0 {
138			label = "u-boot";
139			reg = <0x00000000 0x200000>;
140			read-only;
141		};
142
143		partition@200000 {
144			label = "uImage";
145			reg = <0x00200000 0x300000>;
146		};
147
148		partition@500000 {
149			label = "uImage2";
150			reg = <0x00500000 0x300000>;
151		};
152
153		partition@800000 {
154			label = "failsafe";
155			reg = <0x00800000 0x800000>;
156		};
157
158		partition@1000000 {
159			label = "root";
160			reg = <0x01000000 0x7000000>;
161		};
162	};
163};
164
165&mdio {
166	status = "okay";
167
168	ethphy0: ethernet-phy@0 {
169		reg = <0>;
170	};
171};
172
173&eth0 {
174	status = "okay";
175	ethernet0-port@0 {
176		phy-handle = <&ethphy0>;
177	};
178};
179